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authorhathach <[email protected]>2018-11-22 17:40:20 +0700
committerhathach <[email protected]>2018-11-22 17:40:20 +0700
commit569e85a0c0a80848e3076b64363ce0e589d3a604 (patch)
treeaebb98121194b9a4333d4933701ce25a79baf071 /examples
parent60d8cde6951fa9fe9c43064ee701598e9da566f7 (diff)
cdc work ok with lpc43xx
Diffstat (limited to 'examples')
-rw-r--r--examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject2
-rw-r--r--examples/device/cdc_msc_hid/src/tusb_config.h18
2 files changed, 14 insertions, 6 deletions
diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject
index 3b91cf865..363fae3e2 100644
--- a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject
+++ b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject
@@ -19,7 +19,7 @@
arm_target_device_name="LPC4357_M4"
arm_target_interface_type="SWD"
build_treat_warnings_as_errors="Yes"
- c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4357;CFG_TUSB_MCU=OPT_MCU_LPC43XX"
+ c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4357;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(&quot;.bss2&quot;)))"
c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)/CMSIS_LPC43xx_DriverLib/inc"
debug_register_definition_file="LPC43xx_Registers.xml"
debug_target_connection="J-Link"
diff --git a/examples/device/cdc_msc_hid/src/tusb_config.h b/examples/device/cdc_msc_hid/src/tusb_config.h
index 3af109188..9bc97ecff 100644
--- a/examples/device/cdc_msc_hid/src/tusb_config.h
+++ b/examples/device/cdc_msc_hid/src/tusb_config.h
@@ -58,16 +58,24 @@
#define CFG_TUSB_DEBUG 2
#define CFG_TUSB_OS OPT_OS_NONE
-//--------------------------------------------------------------------
-// USB RAM PLACEMENT
-//--------------------------------------------------------------------
-#define CFG_TUSB_ATTR_USBRAM
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
+#endif
//--------------------------------------------------------------------
// DEVICE CONFIGURATION
//--------------------------------------------------------------------
-
#define CFG_TUD_ENDOINT0_SIZE 64
/*------------- Descriptors -------------*/