re-org bsp

22 files changed, 3936 insertions, 0 deletions

diff --git a/hw/bsp/ea4357/board_ea4357.c b/hw/bsp/ea4357/board_ea4357.c
new file mode 100644
index 000000000..1aec84871
--- /dev/null
+++ b/hw/bsp/ea4357/board_ea4357.c
@@ -0,0 +1,153 @@
+/**************************************************************************/
+/*!
+    @file     board_ea4357.c
+    @author   hathach (tinyusb.org)
+
+    @section LICENSE
+
+    Software License Agreement (BSD License)
+
+    Copyright (c) 2013, hathach (tinyusb.org)
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions are met:
+    1. Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holders nor the
+    names of its contributors may be used to endorse or promote products
+    derived from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
+    EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+    WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+    DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
+    DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+    LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
+    ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
+    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+    This file is part of the tinyusb stack.
+*/
+/**************************************************************************/
+
+#include "../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#define BOARD_UART_PORT           LPC_USART0
+#define BOARD_UART_PIN_PORT       0x0f
+#define BOARD_UART_PIN_TX         10 // PF.10 : UART0_TXD
+#define BOARD_UART_PIN_RX         11 // PF.11 : UART0_RXD
+
+static const struct {
+  uint8_t mux_port;
+  uint8_t mux_pin;
+
+  uint8_t gpio_port;
+  uint8_t gpio_pin;
+}buttons[] =
+{
+    {0x0a, 3, 4, 10 }, // Joystick up
+    {0x09, 1, 4, 13 }, // Joystick down
+    {0x0a, 2, 4, 9  }, // Joystick left
+    {0x09, 0, 4, 12 }, // Joystick right
+    {0x0a, 1, 4, 8  }, // Joystick press
+    {0x02, 7, 0, 7  }, // SW6
+};
+
+enum {
+  BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0])
+};
+
+void board_init(void)
+{
+  CGU_Init();
+
+#if TUSB_CFG_OS == TUSB_OS_NONE // TODO may move to main.c
+  SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE) / TUSB_CFG_TICKS_HZ); // 1 msec tick timer
+#endif
+
+  //------------- USB -------------//
+  // USB0 Power: EA4357 channel B U20 GPIO26 active low (base board), P2_3 on LPC4357
+  scu_pinmux(0x02, 3, MD_PUP | MD_EZI, FUNC7);		// USB0 VBus Power
+
+  #if TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_DEVICE
+  scu_pinmux(0x09, 5, GPIO_PDN, FUNC4); // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
+  GPIO_SetDir(5, BIT_(18), 1);
+  #endif
+
+  // USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required
+  // TODO Remove R170, R171, solder a pair of 15K to USB1 D+/D- to test with USB1 Host
+
+  //------------- LED -------------//
+  I2C_Init(LPC_I2C0, 100000);
+  I2C_Cmd(LPC_I2C0, ENABLE);
+  pca9532_init();
+
+  //------------- BUTTON -------------//
+  for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++)
+  {
+    scu_pinmux(buttons[i].mux_port, buttons[i].mux_pin, GPIO_NOPULL, FUNC0);
+    GPIO_SetDir(buttons[i].gpio_port, BIT_(buttons[i].gpio_pin), 0);
+  }
+
+  //------------- UART -------------//
+  scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_TX, MD_PDN, FUNC1);
+  scu_pinmux(BOARD_UART_PIN_PORT, BOARD_UART_PIN_RX, MD_PLN | MD_EZI | MD_ZI, FUNC1);
+
+  UART_CFG_Type UARTConfigStruct;
+  UART_ConfigStructInit(&UARTConfigStruct);
+  UARTConfigStruct.Baud_rate   = CFG_UART_BAUDRATE;
+  UARTConfigStruct.Clock_Speed = 0;
+
+  UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
+  UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
+
+  //------------- NAND Flash (K9FXX) Size = 128M, Page Size = 2K, Block Size = 128K, Number of Block = 1024 -------------//
+//  nand_init();
+}
+
+//--------------------------------------------------------------------+
+// LEDS
+//--------------------------------------------------------------------+
+void board_leds(uint32_t on_mask, uint32_t off_mask)
+{
+  pca9532_setLeds( on_mask << 8, off_mask << 8);
+}
+
+//--------------------------------------------------------------------+
+// BUTTONS
+//--------------------------------------------------------------------+
+static bool button_read(uint8_t id)
+{
+  return !BIT_TEST_( GPIO_ReadValue(buttons[id].gpio_port), buttons[id].gpio_pin ); // button is active low
+}
+
+uint32_t board_buttons(void)
+{
+  uint32_t result = 0;
+
+  for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) result |= (button_read(i) ? BIT_(i) : 0);
+
+  return result;
+}
+
+//--------------------------------------------------------------------+
+// UART
+//--------------------------------------------------------------------+
+uint8_t  board_uart_getchar(void)
+{
+  return UART_ReceiveByte(BOARD_UART_PORT);
+}
+void board_uart_putchar(uint8_t c)
+{
+  UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
+}
+
+#endif
diff --git a/hw/bsp/ea4357/board_ea4357.h b/hw/bsp/ea4357/board_ea4357.h
new file mode 100644
index 000000000..e241a2bfd
--- /dev/null
+++ b/hw/bsp/ea4357/board_ea4357.h
@@ -0,0 +1,64 @@
+/**************************************************************************/
+/*!
+    @file     board_ea4357.h
+    @author   hathach (tinyusb.org)
+
+    @section LICENSE
+
+    Software License Agreement (BSD License)
+
+    Copyright (c) 2013, hathach (tinyusb.org)
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions are met:
+    1. Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in the
+    documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holders nor the
+    names of its contributors may be used to endorse or promote products
+    derived from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
+    EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+    WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+    DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
+    DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+    LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
+    ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
+    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+    This file is part of the tinyusb stack.
+*/
+/**************************************************************************/
+
+#ifndef _TUSB_BOARD_EA4357_H_
+#define _TUSB_BOARD_EA4357_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "LPC43xx.h"
+#include "lpc43xx_scu.h"
+#include "lpc43xx_cgu.h"
+#include "lpc43xx_gpio.h"
+#include "lpc43xx_uart.h"
+#include "lpc43xx_i2c.h"
+
+
+#include "oem_base_board/pca9532.h" // LEDs
+
+
+//#define CFG_PRINTF_TARGET       PRINTF_TARGET_SWO
+#define CFG_PRINTF_TARGET       PRINTF_TARGET_UART
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_BOARD_EA4357_H_ */
diff --git a/hw/bsp/ea4357/emac.c b/hw/bsp/ea4357/emac.c
new file mode 100644
index 000000000..fce042259
--- /dev/null
+++ b/hw/bsp/ea4357/emac.c
@@ -0,0 +1,480 @@
+/******************************************************************
+ *****                                                        *****
+ *****  Name: cs8900.c                                        *****
+ *****  Ver.: 1.0                                             *****
+ *****  Date: 07/05/2001                                      *****
+ *****  Auth: Andreas Dannenberg                              *****
+ *****        HTWK Leipzig                                    *****
+ *****        university of applied sciences                  *****
+ *****        Germany                                         *****
+ *****  Func: ethernet packet-driver for use with LAN-        *****
+ *****        controller CS8900 from Crystal/Cirrus Logic     *****
+ *****                                                        *****
+ *****  NXP: Module modified for use with NXP            	  *****
+ *****        lpc43xx EMAC Ethernet controller                *****
+ *****                                                        *****
+ ******************************************************************/
+
+#include "../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "emac.h"
+//#include "tcpip.h"
+#include "LPC43xx.h"
+#include "lpc43xx_scu.h"
+#include "lpc43xx_rgu.h"
+
+#define		TIMEOUT		100000
+
+static unsigned short *rptr;
+static unsigned short *tptr;
+
+static unsigned int TxDescIndex = 0;
+static unsigned int RxDescIndex = 0;
+
+// Keil: function added to write PHY
+static void write_PHY (unsigned int PhyReg, unsigned short Value) {
+   
+   unsigned int tout;
+
+   /* Write a data 'Value' to PHY register 'PhyReg'. */
+   while(LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY);			// Check GMII busy bit
+   LPC_ETHERNET->MAC_MII_ADDR = (DP83848C_DEF_ADR<<11) | (PhyReg<<6) | GMII_WRITE;
+   LPC_ETHERNET->MAC_MII_DATA = Value;
+   LPC_ETHERNET->MAC_MII_ADDR |= GMII_BUSY;				// Start PHY Write Cycle
+
+   /* Wait utill operation completed */
+   for (tout = 0; tout < MII_WR_TOUT; tout++) {
+      if ((LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY) == 0) {
+         break;
+      }
+   }
+   if (tout == MII_WR_TOUT)								// Trap the timeout
+     while(1);
+}
+
+
+// Keil: function added to read PHY
+static unsigned short read_PHY (unsigned int PhyReg) {
+   
+   unsigned int tout, val;
+
+   /* Read a PHY register 'PhyReg'. */
+   while(LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY);			// Check GMII busy bit
+   LPC_ETHERNET->MAC_MII_ADDR = (DP83848C_DEF_ADR<<11) | (PhyReg<<6) | GMII_READ;
+   LPC_ETHERNET->MAC_MII_ADDR |= GMII_BUSY;				// Start PHY Read Cycle
+
+   /* Wait until operation completed */
+   for (tout = 0; tout < MII_RD_TOUT; tout++) {
+      if ((LPC_ETHERNET->MAC_MII_ADDR & GMII_BUSY) == 0) {
+         break;
+      }
+   }
+   if (tout == MII_RD_TOUT)								// Trap the timeout
+     while(1);
+   val = LPC_ETHERNET->MAC_MII_DATA;
+   return (val);
+}
+
+
+// Keil: function added to initialize Rx Descriptors
+void rx_descr_init (void)
+{
+  unsigned int i;
+
+  for (i = 0; i < NUM_RX_DESC; i++) {
+    RX_DESC_STAT(i) = OWN_BIT; 
+	RX_DESC_CTRL(i) = ETH_FRAG_SIZE;
+	RX_BUFADDR(i) = RX_BUF(i); 
+	if (i == (NUM_RX_DESC-1)) 			// Last Descriptor?
+	  RX_DESC_CTRL(i) |= RX_END_RING;
+  }
+
+  /* Set Starting address of RX Descriptor list */
+  LPC_ETHERNET->DMA_REC_DES_ADDR = RX_DESC_BASE;
+}
+
+
+// Keil: function added to initialize Tx Descriptors
+void tx_descr_init (void)
+{
+  unsigned int i;
+
+  for (i = 0; i < NUM_TX_DESC; i++) {						// Take it out!!!!
+	 TX_DESC_STAT(i) = 0;
+	 TX_DESC_CTRL(i) = 0;
+	 TX_BUFADDR(i) = 0;
+  }
+
+  for (i = 0; i < NUM_TX_DESC; i++) {
+    TX_DESC_STAT(i) = TX_LAST_SEGM | TX_FIRST_SEGM;
+	TX_DESC_CTRL(i) = 0;
+	TX_BUFADDR(i) = TX_BUF(i); 
+	if (i == (NUM_TX_DESC-1)) 		   // Last Descriptor?
+	  TX_DESC_STAT(i) |= TX_END_RING;
+  }
+
+  /* Set Starting address of RX Descriptor list */
+  LPC_ETHERNET->DMA_TRANS_DES_ADDR = TX_DESC_BASE;
+}
+
+
+
+// configure port-pins for use with LAN-controller,
+// reset it and send the configuration-sequence
+
+void Init_EMAC(void)
+{
+  int id1, id2, tout, regv;
+  unsigned phy_in_use = 0;
+  
+  /* Ethernet pins configuration		*/
+#if MII  
+  scu_pinmux(0xC ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_MDC: PC_1 -> FUNC3
+  scu_pinmux(0x1 ,17 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_MDIO: P1_17 -> FUNC3 
+  scu_pinmux(0x1 ,18 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD0: P1_18 -> FUNC3 
+  scu_pinmux(0x1 ,20 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD1: P1_20 -> FUNC3
+  scu_pinmux(0x1 ,19 , (MD_PLN | MD_EZI | MD_ZI), FUNC0); 	// ENET_REF: P1_19 -> FUNC0 (default)
+
+//  scu_pinmux(0xC ,4 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TX_EN: PC_4 -> FUNC3
+  scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC6); 	// ENET_TX_EN: P0_1 -> FUNC6
+
+  scu_pinmux(0x1 ,15 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXD0: P1_15 -> FUNC3
+  scu_pinmux(0x0 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC2); 	// ENET_RXD1: P0_0 -> FUNC2	
+
+//  scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_CRS: P1_16 -> FUNC3
+  scu_pinmux(0x9 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_CRS: P9_0 -> FUNC5
+
+//  scu_pinmux(0xC ,9 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RX_ER: PC_9 -> FUNC3
+  scu_pinmux(0x9 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC5);	// ENET_RX_ER: P9_1 -> FUNC5
+
+//  scu_pinmux(0xC ,8 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXDV: PC_8 -> FUNC3	 	
+  scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC7); 	// ENET_RXDV: P1_16 -> FUNC7	 	
+
+#else
+  scu_pinmux(0xC ,1 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_MDC: PC_1 -> FUNC3
+  scu_pinmux(0x1 ,17 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_MDIO: P1_17 -> FUNC3 
+  scu_pinmux(0x1 ,18 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD0: P1_18 -> FUNC3 
+  scu_pinmux(0x1 ,20 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD1: P1_20 -> FUNC3
+  scu_pinmux(0x1 ,19 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC0); 	// ENET_REF: P1_19 -> FUNC0 (default)
+//  scu_pinmux(0xC ,4 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TX_EN: PC_4 -> FUNC3
+  scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC6); 	// ENET_TX_EN: P0_1 -> FUNC6
+  scu_pinmux(0x1 ,15 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXD0: P1_15 -> FUNC3
+  scu_pinmux(0x0 ,0 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC2); 	// ENET_RXD1: P0_0 -> FUNC2	
+//  scu_pinmux(0x1 ,16 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_CRS: P1_16 -> FUNC3
+//  scu_pinmux(0x9 ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_CRS: P9_0 -> FUNC5
+//  scu_pinmux(0xC ,9 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RX_ER: PC_9 -> FUNC3
+//  scu_pinmux(0x9 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC5);	// ENET_RX_ER: P9_1 -> FUNC5
+//  scu_pinmux(0xC ,8 , (MD_EHS | MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXDV: PC_8 -> FUNC3
+  scu_pinmux(0x1 ,16 , (MD_PLN | MD_EZI | MD_ZI), FUNC7); 	// ENET_RXDV: P1_16 -> FUNC7
+#endif
+ 
+  
+#if MII				  /*   Select MII interface       */				 // check MUXING for new Eagle...
+//  scu_pinmux(0xC ,6 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXD2: PC_6 -> FUNC3
+  scu_pinmux(0x9 ,3 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_RXD2: P9_3 -> FUNC5
+
+//  scu_pinmux(0xC ,7 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_RXD3: PC_7 -> FUNC3
+  scu_pinmux(0x9 ,2 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_RXD3: P9_2 -> FUNC5
+
+  scu_pinmux(0xC ,0 , (MD_PLN | MD_EZI | MD_ZI), FUNC3);  // ENET_RXLK: PC_0 -> FUNC3
+
+//  scu_pinmux(0xC ,2 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD2: PC_2 -> FUNC3
+  scu_pinmux(0x9 ,4 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_TXD2: P9_4 -> FUNC5
+
+//  scu_pinmux(0xC ,3 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TXD3: PC_3 -> FUNC3
+  scu_pinmux(0x9 ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_TXD3: P9_5 -> FUNC5
+
+//  scu_pinmux(0xC ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TX_ER:  PC_5 -> FUNC3
+  scu_pinmux(0xC ,5 , (MD_PLN | MD_EZI | MD_ZI), FUNC3); 	// ENET_TX_ER:  PC_5 -> FUNC3
+  
+//  scu_pinmux(0x0 ,1 , (MD_PLN | MD_EZI | MD_ZI), FUNC2); 	// ENET_COL:  P0_1 -> FUNC2
+    scu_pinmux(0x9 ,6 , (MD_PLN | MD_EZI | MD_ZI), FUNC5); 	// ENET_COL:  P9_6 -> FUNC5
+#else				   /*   Select RMII interface     */
+  LPC_CREG->CREG6 |= RMII_SELECT;
+#endif
+
+
+  RGU_SoftReset(RGU_SIG_ETHERNET);
+  while(1){													  // Confirm the reset happened
+	 if (LPC_RGU->RESET_ACTIVE_STATUS0 & (1<<ETHERNET_RST))
+	   break;
+  }
+
+  LPC_ETHERNET->DMA_BUS_MODE |= DMA_SOFT_RESET; 	         // Reset all GMAC Subsystem internal registers and logic  
+  while(LPC_ETHERNET->DMA_BUS_MODE & DMA_SOFT_RESET);	     // Wait for software reset completion
+
+  /* Put the DP83848C in reset mode */
+  write_PHY (PHY_REG_BMCR, PHY_BMCR_RESET);
+
+  /* Wait for hardware reset to end. */
+  for (tout = 0; tout < TIMEOUT; tout++) {
+    regv = read_PHY (PHY_REG_BMCR);
+    if (!(regv & PHY_BMCR_RESET)) {
+      /* Reset complete */
+      break;
+    }
+  }
+
+  /* Check if this is a DP83848C PHY. */
+  id1 = read_PHY (PHY_REG_IDR1);
+  id2 = read_PHY (PHY_REG_IDR2);
+  if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
+    phy_in_use =  DP83848C_ID;
+  }
+  else if (((id1 << 16) | (id2 & 0xFFF0)) == LAN8720_ID) {
+    phy_in_use = LAN8720_ID;
+  }
+
+  if (phy_in_use != 0) {
+	/* Configure the PHY device */
+#if !MII
+  write_PHY (PHY_REG_RBR, 0x20);
+#endif
+
+    /* Use autonegotiation about the link speed. */
+    write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
+    /* Wait to complete Auto_Negotiation. */
+    for (tout = 0; tout < TIMEOUT; tout++) {
+      regv = read_PHY (PHY_REG_BMSR);
+      if (regv & PHY_AUTO_NEG_DONE) {
+        /* Autonegotiation Complete. */
+        break;
+      }
+    }
+  }
+
+
+
+  /* Check the link status. */
+  for (tout = 0; tout < TIMEOUT; tout++) {
+    regv = read_PHY (PHY_REG_STS);
+    if (regv & LINK_VALID_STS) {
+      /* Link is on. */
+      break;
+    }
+  }
+  
+  // Configure the EMAC with the established parameters
+  switch (phy_in_use) {
+  	  case DP83848C_ID:
+
+        /* Configure Full/Half Duplex mode. */
+        if (regv & FULL_DUP_STS) {
+          /* Full duplex is enabled. */
+          LPC_ETHERNET->MAC_CONFIG    |= MAC_DUPMODE;
+        }
+
+        /* Configure 100MBit/10MBit mode. */
+        if (~(regv & SPEED_10M_STS)) {
+          /* 100MBit mode. */
+          LPC_ETHERNET->MAC_CONFIG    |= MAC_100MPS;
+        }
+      
+//   		  value = ReadFromPHY (PHY_REG_STS);	/* PHY Extended Status Register  */
+//   		  // Now configure for full/half duplex mode
+//   		  if (value & 0x0004) {
+//   		    // We are in full duplex is enabled mode
+//   			  LPC_ETHERNET->MAC2    |= MAC2_FULL_DUP;
+//   			  LPC_ETHERNET->Command |= CR_FULL_DUP;
+//   			  LPC_ETHERNET->IPGT     = IPGT_FULL_DUP;
+//   		  }
+//   		  else {
+//   		    // Otherwise we are in half duplex mode
+//   			  LPC_ETHERNET->IPGT = IPGT_HALF_DUP;
+//   		  }
+
+//   		  // Now configure 100MBit or 10MBit mode
+//   		  if (value & 0x0002) {
+//   		    // 10MBit mode
+//   			  LPC_ETHERNET->SUPP = 0;
+//   		  }
+//   		  else {
+//   		    // 100MBit mode
+//   			  LPC_ETHERNET->SUPP = SUPP_SPEED;
+//   		  }
+  		  break;
+
+  	  case LAN8720_ID:
+
+  		  regv = read_PHY (PHY_REG_SCSR);	/* PHY Extended Status Register  */
+  		  // Now configure for full/half duplex mode
+  		  if (regv & (1<<4)) {		/* bit 4: 1 = Full Duplex, 0 = Half Duplex  */
+    		  // We are in full duplex is enabled mode
+          LPC_ETHERNET->MAC_CONFIG    |= MAC_DUPMODE;
+  		  }
+
+  		  // Now configure 100MBit or 10MBit mode
+  		  if (regv & (1<<3)) {	/* bit 3: 1 = 100Mbps, 0 = 10Mbps  */
+  			  // 100MBit mode
+          LPC_ETHERNET->MAC_CONFIG    |= MAC_100MPS;
+  		  }
+
+
+  		  break;
+
+  }
+   
+  /* Set the Ethernet MAC Address registers */
+  LPC_ETHERNET->MAC_ADDR0_HIGH = (MYMAC_6 << 8) | MYMAC_5;
+  LPC_ETHERNET->MAC_ADDR0_LOW =	(MYMAC_4 << 24) | (MYMAC_3 << 16) | (MYMAC_2 << 8) | MYMAC_1;
+
+  /* Initialize Descriptor Lists    */
+  rx_descr_init();
+  tx_descr_init();
+  
+  /* Configure Filter           */  
+  LPC_ETHERNET->MAC_FRAME_FILTER = MAC_PROMISCUOUS | MAC_RECEIVEALL;
+
+  /* Enable Receiver and Transmitter   */
+  LPC_ETHERNET->MAC_CONFIG |= (MAC_TX_ENABLE | MAC_RX_ENABLE); 
+
+  /* Enable interrupts    */
+  //LPC_ETHERNET->DMA_INT_EN =  DMA_INT_NOR_SUM | DMA_INT_RECEIVE | DMA_INT_TRANSMIT;	 
+
+  /* Start Transmission & Receive processes   */
+  LPC_ETHERNET->DMA_OP_MODE |= (DMA_SS_TRANSMIT | DMA_SS_RECEIVE );		 
+
+}
+
+
+// reads a word in little-endian byte order from RX_BUFFER
+
+unsigned short ReadFrame_EMAC(void)
+{
+  return (*rptr++);
+}
+
+
+// easyWEB internal function
+// help function to swap the byte order of a WORD
+
+unsigned short SwapBytes(unsigned short Data)
+{
+  return (Data >> 8) | (Data << 8);
+}
+
+// reads a word in big-endian byte order from RX_FRAME_PORT
+// (useful to avoid permanent byte-swapping while reading
+// TCP/IP-data)
+
+unsigned short ReadFrameBE_EMAC(void)
+{
+  unsigned short ReturnValue;
+
+  ReturnValue = SwapBytes (*rptr++);
+  return (ReturnValue);
+}
+
+
+// copies bytes from frame port to MCU-memory
+// NOTES: * an odd number of byte may only be transfered
+//          if the frame is read to the end!
+//        * MCU-memory MUST start at word-boundary
+
+void CopyFromFrame_EMAC(void *Dest, unsigned short Size)
+{
+  unsigned short * piDest;                       // Keil: Pointer added to correct expression
+
+  piDest = Dest;                                 // Keil: Line added
+  while (Size > 1) {
+    *piDest++ = ReadFrame_EMAC();
+    Size -= 2;
+  }
+  
+  if (Size) {                                         // check for leftover byte...
+    *(unsigned char *)piDest = (char)ReadFrame_EMAC();// the LAN-Controller will return 0
+  }                                                   // for the highbyte
+}
+
+// does a dummy read on frame-I/O-port
+// NOTE: only an even number of bytes is read!
+
+void DummyReadFrame_EMAC(unsigned short Size)    // discards an EVEN number of bytes
+{                                                // from RX-fifo
+  while (Size > 1) {
+    ReadFrame_EMAC();
+    Size -= 2;
+  }
+}
+
+// Reads the length of the received ethernet frame and checks if the 
+// destination address is a broadcast message or not
+// returns the frame length
+unsigned short StartReadFrame(void) {
+  unsigned short RxLen;
+
+  if ((RX_DESC_STAT(RxDescIndex) & OWN_BIT) == 0) {
+    RxLen = (RX_DESC_STAT(RxDescIndex) >> 16) & 0x03FFF; 
+	rptr = 	(unsigned short *)RX_BUFADDR(RxDescIndex);
+	return(RxLen);
+  }
+  return 0;
+
+}
+
+void EndReadFrame(void) {
+
+  RX_DESC_STAT(RxDescIndex) = OWN_BIT;
+  RxDescIndex++;
+  if (RxDescIndex == NUM_RX_DESC)
+	RxDescIndex = 0;
+}
+
+unsigned int CheckFrameReceived(void) {             // Packet received ?
+
+  if ((RX_DESC_STAT(RxDescIndex) & OWN_BIT) == 0) 		
+    return(1);
+  else 
+    return(0);
+}
+
+// requests space in EMAC memory for storing an outgoing frame
+
+void RequestSend(unsigned short FrameSize)
+{
+  tptr = (unsigned short *)TX_BUFADDR(TxDescIndex);
+  TX_DESC_CTRL(TxDescIndex)	= FrameSize;
+}
+
+// check if ethernet controller is ready to accept the
+// frame we want to send
+
+unsigned int Rdy4Tx(void)
+{
+  return (1);   // the ethernet controller transmits much faster
+}               // than the CPU can load its buffers
+
+
+// writes a word in little-endian byte order to TX_BUFFER
+void WriteFrame_EMAC(unsigned short Data)
+{
+  *tptr++ = Data;
+}
+
+// copies bytes from MCU-memory to frame port
+// NOTES: * an odd number of byte may only be transfered
+//          if the frame is written to the end!
+//        * MCU-memory MUST start at word-boundary
+
+void CopyToFrame_EMAC(void *Source, unsigned int Size)
+{
+  unsigned short * piSource;
+//  unsigned int idx;
+
+  piSource = Source;
+  Size = (Size + 1) & 0xFFFE;    // round Size up to next even number
+  while (Size > 0) {
+    WriteFrame_EMAC(*piSource++);
+    Size -= 2;
+  }
+  TX_DESC_STAT(TxDescIndex) |= OWN_BIT;
+  LPC_ETHERNET->DMA_TRANS_POLL_DEMAND = 1;   //  Wake Up the DMA if it's in Suspended Mode
+  TxDescIndex++;
+  if (TxDescIndex == NUM_TX_DESC)
+    TxDescIndex = 0;
+}
+
+#endif
+
diff --git a/hw/bsp/ea4357/emac.h b/hw/bsp/ea4357/emac.h
new file mode 100644
index 000000000..b9f0c3baa
--- /dev/null
+++ b/hw/bsp/ea4357/emac.h
@@ -0,0 +1,157 @@
+#ifndef __EMAC_H
+#define __EMAC_H
+
+
+/* Configuration */
+
+/* Interface Selection */
+#define MII				0		// =0 RMII  -  =1 MII
+
+/* MAC Configuration */
+#define MYMAC_1         0x1EU            /* our ethernet (MAC) address        */
+#define MYMAC_2         0x30U            /* (MUST be unique in LAN!)          */
+#define MYMAC_3         0x6cU
+#define MYMAC_4         0xa2U
+#define MYMAC_5         0x45U
+#define MYMAC_6         0x5eU
+
+
+#define ETH_FRAG_SIZE		1536		
+#define NUM_RX_DESC			3
+#define NUM_TX_DESC			3
+
+/* End of Configuration   */
+
+
+/* EMAC Descriptors and Buffers located in 16K SRAM */
+/*  Rx Descriptors   */
+#define RX_DESC_BASE		0x20008000
+#define RX_STAT_BASE		RX_DESC_BASE
+#define RX_CTRL_BASE		(RX_STAT_BASE + 4)
+#define RX_BUFADDR_BASE		(RX_CTRL_BASE + 4)
+#define RX_NEXTDESC_BASE	(RX_BUFADDR_BASE + 4)
+#define RX_BUF_BASE			(RX_DESC_BASE + NUM_RX_DESC*16)	 
+
+#define RX_DESC_STAT(i)		(*(unsigned int *)(RX_STAT_BASE + 16*i))	 
+#define RX_DESC_CTRL(i)		(*(unsigned int *)(RX_CTRL_BASE + 16*i))
+#define RX_BUFADDR(i)		(*(unsigned int *)(RX_BUFADDR_BASE + 16*i))
+#define RX_NEXTDESC(i)		(*(unsigned int *)(RX_NEXTDESC_BASE + 16*i))
+#define RX_BUF(i)			(RX_BUF_BASE + ETH_FRAG_SIZE*i)
+
+/*  Tx Descriptors   */
+#define TX_DESC_BASE		RX_BUF_BASE + (ETH_FRAG_SIZE * NUM_RX_DESC)
+#define TX_STAT_BASE		TX_DESC_BASE
+#define TX_CTRL_BASE		(TX_STAT_BASE + 4)
+#define TX_BUFADDR_BASE		(TX_CTRL_BASE + 4)
+#define TX_NEXTDESC_BASE	(TX_BUFADDR_BASE + 4)
+#define TX_BUF_BASE			(TX_DESC_BASE + NUM_TX_DESC*16)
+
+#define TX_DESC_STAT(i)		(*(unsigned int *)(TX_STAT_BASE + 16*i))
+#define TX_DESC_CTRL(i)		(*(unsigned int *)(TX_CTRL_BASE + 16*i))
+#define TX_BUFADDR(i)		(*(unsigned int *)(TX_BUFADDR_BASE + 16*i))
+#define TX_NEXTDESC(i)		(*(unsigned int *)(TX_NEXTDESC_BASE + 16*i))
+#define TX_BUF(i)			(TX_BUF_BASE + ETH_FRAG_SIZE*i)		
+
+/*  Descriptors Fields bits       */
+#define OWN_BIT				(1U<<31)	/*  Own bit in RDES0 & TDES0              */
+#define RX_END_RING			(1<<15)		/*  Receive End of Ring bit in RDES1      */
+#define RX_NXTDESC_FLAG		(1<<14)		/*  Second Address Chained bit in RDES1   */
+#define TX_LAST_SEGM		(1<<29)		/*  Last Segment bit in TDES0             */
+#define TX_FIRST_SEGM		(1<<28)		/*  First Segment bit in TDES0            */
+#define TX_END_RING			(1<<21)		/*  Transmit End of Ring bit in TDES0     */
+#define TX_NXTDESC_FLAG		(1<<20)		/*  Second Address Chained bit in TDES0   */
+
+
+
+
+
+/* EMAC Control and Status bits   */
+#define MAC_RX_ENABLE	 (1<<2)			/*  Receiver Enable in MAC_CONFIG reg      */
+#define MAC_TX_ENABLE	 (1<<3)			/*  Transmitter Enable in MAC_CONFIG reg   */
+#define MAC_PADCRC_STRIP (1<<7)			/*  Automatic Pad-CRC Stripping in MAC_CONFIG reg   */
+#define MAC_DUPMODE		 (1<<11)		/*  Duplex Mode in  MAC_CONFIG reg         */
+#define MAC_100MPS		 (1<<14)		/*  Speed is 100Mbps in MAC_CONFIG reg     */
+#define MAC_PROMISCUOUS  (1U<<0)		/*  Promiscuous Mode bit in MAC_FRAME_FILTER reg    */
+#define MAC_DIS_BROAD    (1U<<5)		/*  Disable Broadcast Frames bit in	MAC_FRAME_FILTER reg    */
+#define MAC_RECEIVEALL   (1U<<31)       /*  Receive All bit in MAC_FRAME_FILTER reg    */
+#define DMA_SOFT_RESET	  0x01          /*  Software Reset bit in DMA_BUS_MODE reg */
+#define DMA_SS_RECEIVE   (1<<1)         /*  Start/Stop Receive bit in DMA_OP_MODE reg  */
+#define DMA_SS_TRANSMIT  (1<<13)        /*  Start/Stop Transmission bit in DMA_OP_MODE reg  */
+#define DMA_INT_TRANSMIT (1<<0)         /*  Transmit Interrupt Enable bit in DMA_INT_EN reg */
+#define DMA_INT_OVERFLOW (1<<4)         /*  Overflow Interrupt Enable bit in DMA_INT_EN reg */ 
+#define DMA_INT_UNDERFLW (1<<5)         /*  Underflow Interrupt Enable bit in DMA_INT_EN reg */
+#define DMA_INT_RECEIVE  (1<<6)         /*  Receive Interrupt Enable bit in DMA_INT_EN reg */
+#define DMA_INT_ABN_SUM  (1<<15)        /*  Abnormal Interrupt Summary Enable bit in DMA_INT_EN reg */
+#define DMA_INT_NOR_SUM  (1<<16)        /*  Normal Interrupt Summary Enable bit in DMA_INT_EN reg */
+
+/* MII Management Command Register */
+#define GMII_READ           (0<<1)		/* GMII Read PHY                     */
+#define GMII_WRITE          (1<<1)      /* GMII Write PHY                    */
+#define GMII_BUSY           0x00000001  /* GMII is Busy / Start Read/Write   */
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */
+
+/* MII Management Address Register */
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */
+
+/* DP83848C PHY Registers */
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */
+
+/* PHY Extended Registers */
+#define PHY_REG_STS         0x10        /* Status Register                   */
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */
+
+/* PHY Control and Status bits  */
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */
+#define PHY_AUTO_NEG        0x1000      /* Select Auto Negotiation           */
+#define PHY_AUTO_NEG_DONE   0x0020		/* AutoNegotiation Complete in BMSR PHY reg  */
+#define PHY_BMCR_RESET		0x8000		/* Reset bit at BMCR PHY reg         */
+#define LINK_VALID_STS		0x0001		/* Link Valid Status at REG_STS PHY reg	 */
+#define FULL_DUP_STS		0x0004		/* Full Duplex Status at REG_STS PHY reg */
+#define SPEED_10M_STS		0x0002		/* 10Mbps Status at REG_STS PHY reg */
+
+#define DP83848C_DEF_ADR    0x01        /* Default PHY device address        */
+#define DP83848C_ID         0x20005C90  /* PHY Identifier (without Rev. info */
+
+#define LAN8720_ID          0x0007C0F0  /* PHY Identifier                    */
+#define PHY_REG_SCSR		0x1F		/* PHY Special Control/Status Register */
+
+/*  Misc    */
+#define ETHERNET_RST		22			/* 	Reset Output for EMAC at RGU     */
+#define RMII_SELECT			0x04		/*  Select RMII in EMACCFG           */
+
+
+/*  Prototypes               */
+void           Init_EMAC(void);
+unsigned short ReadFrameBE_EMAC(void);
+void           CopyToFrame_EMAC(void *Source, unsigned int Size);
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);
+void           DummyReadFrame_EMAC(unsigned short Size);
+unsigned short StartReadFrame(void);
+void           EndReadFrame(void);
+unsigned int   CheckFrameReceived(void);
+void           RequestSend(unsigned short FrameSize);
+unsigned int   Rdy4Tx(void);
+
+
+#endif
diff --git a/hw/bsp/ea4357/nand.c b/hw/bsp/ea4357/nand.c
new file mode 100644
index 000000000..21ec14fbe
--- /dev/null
+++ b/hw/bsp/ea4357/nand.c
@@ -0,0 +1,546 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "lpc_types.h"
+#include "lpc43xx_scu.h"
+#include "lpc43xx_timer.h"
+#include "nand.h"
+
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+#define K9F1G_CLE   ((volatile uint8_t *)0x1D100000)
+#define K9F1G_ALE   ((volatile uint8_t *)0x1D080000)
+#define K9F1G_DATA  ((volatile uint8_t *)0x1D000000)
+
+#define K9FXX_WAIT()
+
+#define K9FXX_READ_1            0x00                
+#define K9FXX_READ_2            0x30                
+
+#define K9FXX_SET_ADDR_A        0x00                
+#define K9FXX_SET_ADDR_B        0x01                
+#define K9FXX_SET_ADDR_C        0x50                
+#define K9FXX_READ_ID           0x90                
+#define K9FXX_RESET             0xff                
+#define K9FXX_BLOCK_PROGRAM_1   0x80                
+#define K9FXX_BLOCK_PROGRAM_2   0x10                
+#define K9FXX_BLOCK_ERASE_1     0x60                
+#define K9FXX_BLOCK_ERASE_2     0xd0                
+#define K9FXX_READ_STATUS       0x70                
+#define K9FXX_BUSY              (1 << 6)            
+#define K9FXX_OK                (1 << 0)   
+
+#define ID_MARKER_CODE (0xEC)
+#define ID_SAMSUNG     (0xF1)
+
+#define ID_PAGE_SZ_1KB (0x00)
+#define ID_PAGE_SZ_2KB (0x01)
+#define ID_PAGE_SZ_4KB (0x02)
+#define ID_PAGE_SZ_8KB (0x03)
+
+#define ID_BLOCK_SZ_64KB  (0x00)
+#define ID_BLOCK_SZ_128KB (0x01)
+#define ID_BLOCK_SZ_256KB (0x02)
+#define ID_BLOCK_SZ_512KB (0x03)
+
+#define ID_PAGE_SZ_1KB (0x00)
+#define ID_PAGE_SZ_2KB (0x01)
+#define ID_PAGE_SZ_4KB (0x02)
+#define ID_PAGE_SZ_8KB (0x03)
+
+#define ID_REDUND_SZ_8  (0x00)
+#define ID_REDUND_SZ_16 (0x01)
+
+
+
+/* This macro could be changed to check the ready pin */
+#define WAIT_READY() (TIM_Waitus(25))
+         
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+static uint32_t pageSize   = 0;
+static uint32_t blockSize  = 0;
+static uint32_t reduntSize = 0;
+
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+static void pinConfig(void)
+{
+	/* Set up EMC pin */
+	scu_pinmux(	 2	,	 9	,	MD_PLN_FAST	,	3	);//A0
+	scu_pinmux(	 2	,	10	,	MD_PLN_FAST	,	3	);//A1
+	scu_pinmux(	 2	,	11	,	MD_PLN_FAST	,	3	);//A2
+	scu_pinmux(	 2	,	12	,	MD_PLN_FAST	,	3	);//A3
+	scu_pinmux(	 2	,	13	,	MD_PLN_FAST	,	3	);//A4
+	scu_pinmux(	 1	,	 0	,	MD_PLN_FAST	,	2	);//A5
+	scu_pinmux(	 1	,	 1	,	MD_PLN_FAST	,	2	);//A6
+	scu_pinmux(	 1	,	 2	,	MD_PLN_FAST	,	2	);//A7
+	scu_pinmux(	 2	,	 8	,	MD_PLN_FAST	,	3	);//A8
+	scu_pinmux(	 2	,	 7	,	MD_PLN_FAST	,	3	);//A9
+	scu_pinmux(	 2	,	 6	,	MD_PLN_FAST	,	2	);//A10
+	scu_pinmux(	 2	,	 2	,	MD_PLN_FAST	,	2	);//A11
+	scu_pinmux(	 2	,	 1	,	MD_PLN_FAST	,	2	);//A12
+	scu_pinmux(	 2	,	 0	,	MD_PLN_FAST	,	2	);//A13
+	scu_pinmux(	 6	,	 8	,	MD_PLN_FAST	,	1	);//A14
+	scu_pinmux(	 6	,	 7	,	MD_PLN_FAST	,	1	);//A15
+	scu_pinmux(	13	,	16	,	MD_PLN_FAST	,	2	);//A16
+	scu_pinmux(	13	,	15	,	MD_PLN_FAST	,	2	);//A17
+	scu_pinmux(	14	,	 0	,	MD_PLN_FAST	,	3	);//A18
+	scu_pinmux(	14	,	 1	,	MD_PLN_FAST	,	3	);//A19
+	scu_pinmux(	14	,	 2	,	MD_PLN_FAST	,	3	);//A20
+	scu_pinmux(	14	,	 3	,	MD_PLN_FAST	,	3	);//A21
+	scu_pinmux(	14	,	 4	,	MD_PLN_FAST	,	3	);//A22
+	scu_pinmux(	10	,	 4	,	MD_PLN_FAST	,	3	);//A23
+	
+	scu_pinmux(	 1	,	 7	,	MD_PLN_FAST	,	3	);//D0
+	scu_pinmux(	 1	,	 8	,	MD_PLN_FAST	,	3	);//D1
+	scu_pinmux(	 1	,	 9	,	MD_PLN_FAST	,	3	);//D2
+	scu_pinmux(	 1	,	10	,	MD_PLN_FAST	,	3	);//D3
+	scu_pinmux(	 1	,	11	,	MD_PLN_FAST	,	3	);//D4
+	scu_pinmux(	 1	,	12	,	MD_PLN_FAST	,	3	);//D5
+	scu_pinmux(	 1	,	13	,	MD_PLN_FAST	,	3	);//D6
+	scu_pinmux(	 1	,	14	,	MD_PLN_FAST	,	3	);//D7
+	scu_pinmux(	 5	,	 4	,	MD_PLN_FAST	,	2	);//D8
+	scu_pinmux(	 5	,	 5	,	MD_PLN_FAST	,	2	);//D9
+	scu_pinmux(	 5	,	 6	,	MD_PLN_FAST	,	2	);//D10
+	scu_pinmux(	 5	,	 7	,	MD_PLN_FAST	,	2	);//D11
+	scu_pinmux(	 5	,	 0	,	MD_PLN_FAST	,	2	);//D12
+	scu_pinmux(	 5	,	 1	,	MD_PLN_FAST	,	2	);//D13
+	scu_pinmux(	 5	,	 2	,	MD_PLN_FAST	,	2	);//D14
+	scu_pinmux(	 5	,	 3	,	MD_PLN_FAST	,	2	);//D15
+	scu_pinmux(	13	,	 2	,	MD_PLN_FAST	,	2	);//D16
+	scu_pinmux(	13	,	 3	,	MD_PLN_FAST	,	2	);//D17
+	scu_pinmux(	13	,	 4	,	MD_PLN_FAST	,	2	);//D18
+	scu_pinmux(	13	,	 5	,	MD_PLN_FAST	,	2	);//D19
+	scu_pinmux(	13	,	 6	,	MD_PLN_FAST	,	2	);//D20
+	scu_pinmux(	13	,	 7	,	MD_PLN_FAST	,	2	);//D21
+	scu_pinmux(	13	,	 8	,	MD_PLN_FAST	,	2	);//D22
+	scu_pinmux(	13	,	 9	,	MD_PLN_FAST	,	2	);//D23
+	scu_pinmux(	14	,	 5	,	MD_PLN_FAST	,	3	);//D24
+	scu_pinmux(	14	,	 6	,	MD_PLN_FAST	,	3	);//D25
+	scu_pinmux(	14	,	 7	,	MD_PLN_FAST	,	3	);//D26
+	scu_pinmux(	14	,	 8	,	MD_PLN_FAST	,	3	);//D27
+	scu_pinmux(	14	,	 9	,	MD_PLN_FAST	,	3	);//D28
+	scu_pinmux(	14	,	10	,	MD_PLN_FAST	,	3	);//D29
+	scu_pinmux(	14	,	11	,	MD_PLN_FAST	,	3	);//D30
+	scu_pinmux(	14	,	12	,	MD_PLN_FAST	,	3	);//D31
+		
+	scu_pinmux(	 1	,	 3	,	MD_PLN_FAST	,	3	);//OE
+	scu_pinmux(	 1	,	 6	,	MD_PLN_FAST	,	3	);//WE
+	
+	scu_pinmux(	 1	,	 4	,	MD_PLN_FAST	,	3	);//BLS0
+	scu_pinmux(	 6	,	 6	,	MD_PLN_FAST	,	1	);//BLS1	
+	scu_pinmux(	13	,	13	,	MD_PLN_FAST	,	2	);//BLS2
+	scu_pinmux(	13	,	10	,	MD_PLN_FAST	,	2	);//BLS3
+	
+	scu_pinmux(	 1	,	 5	,	MD_PLN_FAST	,	3	);//CS0	
+	scu_pinmux(	 6	,	 3	,	MD_PLN_FAST	,	3	);//CS1
+	scu_pinmux(	13	,	12	,	MD_PLN_FAST	,	2	);//CS2
+	scu_pinmux(	13	,	11	,	MD_PLN_FAST	,	2	);//CS3
+}
+
+
+static uint32_t nandReadId(void)
+{
+  uint8_t a, b, c, d;
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+  volatile uint8_t *pData;
+  
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+  pData = K9F1G_DATA;
+    
+  *pCLE = K9FXX_READ_ID;
+  *pALE = 0;
+    
+  a = *pData;
+  b = *pData;
+  c = *pData;
+  d = *pData;
+  
+    
+  return (a << 24) | (b << 16) | (c << 8) | d;
+}
+
+static uint8_t nandStatus(void)
+{
+  uint8_t status = 0;
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+  volatile uint8_t *pData;
+  
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+  pData = K9F1G_DATA;
+    
+  *pCLE = K9FXX_READ_STATUS;
+  *pALE = 0;
+    
+  status = *pData;
+      
+  /* remove bits not used */
+  return (status & 0xC1);  
+}
+
+static void nandWaitReady(void) 
+{
+  while( !(nandStatus() & (1<<6)) );
+}
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the NAND Flash
+ *
+ * Returns:
+ *    TRUE if initialization successful; otherwise FALSE
+ *
+ *****************************************************************************/
+uint32_t nand_init (void)
+{
+  uint32_t nandId = 0;
+  TIM_TIMERCFG_Type timerCfg;
+
+//  LPC_SC->PCONP     |= 0x00000800;
+  LPC_EMC->CONTROL   = 0x00000001;
+  LPC_EMC->CONFIG    = 0x00000000;
+
+  pinConfig();
+
+  TIM_ConfigStructInit(TIM_TIMER_MODE, &timerCfg);
+  TIM_Init(LPC_TIMER0, TIM_TIMER_MODE, &timerCfg);
+
+  LPC_EMC->STATICCONFIG1   = 0x00000080;
+
+  LPC_EMC->STATICWAITWEN1  = 0x00000002; 
+  LPC_EMC->STATICWAITOEN1  = 0x00000002; 
+  LPC_EMC->STATICWAITRD1   = 0x00000008; 
+  LPC_EMC->STATICWAITPAG1  = 0x0000001f; 
+  LPC_EMC->STATICWAITWR1   = 0x00000008; 
+  LPC_EMC->STATICWAITTURN1 = 0x0000000f;
+
+  nandId = nandReadId();
+
+  if ((nandId & 0xffff0000) != 
+    (((uint32_t)(ID_MARKER_CODE) << 24) | ID_SAMSUNG << 16)) {
+    /* unknown NAND chip */
+    return FALSE;
+  }
+
+  pageSize   = 1024 * (1 << (nandId & 0x03));  
+  blockSize  = 64*1024 * (1 << ((nandId>>4) & 0x03));
+  reduntSize = 8 * (1 << ((nandId >> 1) & 0x1));
+
+                         
+  return TRUE;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Get the page size of the NAND flash
+ *
+ * Returns:
+ *    page size in bytes
+ *
+ *****************************************************************************/
+uint32_t nand_getPageSize(void)
+{
+  return pageSize;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Get the block size of the NAND flash
+ *
+ * Returns:
+ *    block size in bytes
+ *
+ *****************************************************************************/
+uint32_t nand_getBlockSize(void)
+{
+  return blockSize;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Get the redundant (spare) size per page
+ *
+ * Returns:
+ *    redundant/spare size in bytes
+ *
+ *****************************************************************************/
+uint32_t nand_getRedundantSize(void)
+{
+  return reduntSize * (pageSize/512);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Check if a block is valid
+ *
+ * Returns:
+ *    TRUE if the block is valid; otherwise FALSE
+ *
+ *****************************************************************************/
+uint32_t nand_isBlockValid(uint32_t block)
+{
+  uint32_t addr = 0;
+  uint32_t page = 0;
+
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+  volatile uint8_t *pData;
+
+  
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+  pData = K9F1G_DATA;
+
+  if (block >= NAND_NUM_BLOCKS) {
+    return FALSE;
+  }
+
+  addr = block * (blockSize/pageSize);
+
+  /* 
+   * Check page 0 and page 1 in each block. If the first byte
+   * in the spare area (of either page 0 or page 1) is != 0xFF 
+   * the block is invalid.
+   */
+
+  nandWaitReady();
+
+  for (page = 0; page < 2; page++) {
+    addr += page;
+
+    *pCLE = K9FXX_READ_1;
+    *pALE = (uint8_t) (pageSize & 0x00FF);
+    *pALE = (uint8_t)((pageSize & 0xFF00) >> 8);
+    *pALE = (uint8_t)((addr & 0x00FF));
+    *pALE = (uint8_t)((addr & 0xFF00) >> 8);
+    *pCLE = K9FXX_READ_2;
+
+    WAIT_READY();
+
+    if (*pData != 0xFF) {
+      return FALSE;
+    }
+        
+  }
+
+  return TRUE;
+}
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Read a page from the NAND memory
+ *
+ * Params:
+ *    block - block number to read from
+ *    page  - page with�n block to read from
+ *    pageBuf - data is copied to this buffer. The size must be at least 
+ *              pageSize.
+ *
+ * Returns:
+ *    TRUE if read successful; otherwise FALSE
+ *
+ *****************************************************************************/
+uint32_t nand_readPage(uint32_t block, uint32_t page, uint8_t* pageBuf)
+{
+  uint32_t i = 0;
+  uint32_t addr = 0;
+
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+  volatile uint8_t *pData;
+
+  
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+  pData = K9F1G_DATA;
+
+  if (block >= NAND_NUM_BLOCKS) {
+    return FALSE;
+  }
+
+  if (page >= blockSize/pageSize) {
+    return FALSE;
+  }
+
+  addr = block * (blockSize/pageSize) + page;
+
+  /*
+   * Always reading from start of a page address.
+   * This means that the column address is always 0.
+   */
+
+  *pCLE = K9FXX_READ_1;
+  *pALE = 0;
+  *pALE = 0;
+  *pALE = (uint8_t)((addr & 0x00FF));
+  *pALE = (uint8_t)((addr & 0xFF00) >> 8);
+  *pCLE = K9FXX_READ_2;
+
+  WAIT_READY(); 
+  
+
+  for (i = 0; i < pageSize; i++) {
+    *pageBuf++ = *pData;  
+  }
+
+
+  return TRUE;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Write a page of data to the NAND memory
+ *
+ * Params:
+ *    block - block number to write to
+ *    page  - page within block to write to
+ *    pageBuf - data is copied from this buffer. The size must be at least 
+ *              pageSize.
+ *
+ * Returns:
+ *    TRUE if write successful; otherwise FALSE
+ *
+ *****************************************************************************/
+uint32_t nand_writePage(uint32_t block, uint32_t page, uint8_t* pageBuf)
+{
+  uint32_t i = 0;
+  uint32_t addr = 0;
+
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+  volatile uint8_t *pData;
+
+  
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+  pData = K9F1G_DATA;
+
+  if (block >= NAND_NUM_BLOCKS) {
+    return FALSE;
+  }
+
+  if (page >= blockSize/pageSize) {
+    return FALSE;
+  }
+
+  addr = block * (blockSize/pageSize) + page;
+
+  /*
+   * Always writing to start of a page address.
+   * This means that the column address is always 0.
+   */ 
+
+  *pCLE = K9FXX_BLOCK_PROGRAM_1;
+  *pALE = 0; 
+  *pALE = 0; 
+  *pALE = (uint8_t)((addr & 0x00FF));
+  *pALE = (uint8_t)((addr & 0xFF00) >> 8);
+
+
+  for (i = 0; i < pageSize; i++) {
+    *pData = *pageBuf++;
+  }
+
+  *pCLE = K9FXX_BLOCK_PROGRAM_2;
+
+  TIM_Waitus(700);  
+  nandWaitReady();
+  
+  return ((nandStatus() & 0x01) != 0x01); 
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Erase a block
+ *
+ * Params:
+ *    block - block number to erase
+ *
+ * Returns:
+ *    TRUE if eras successful; otherwise FALSE
+ *
+ *****************************************************************************/
+uint32_t nand_eraseBlock(uint32_t block)
+{
+  uint32_t addr = 0;
+
+  volatile uint8_t *pCLE;
+  volatile uint8_t *pALE;
+
+  pCLE  = K9F1G_CLE;
+  pALE  = K9F1G_ALE;
+
+  if (block >= NAND_NUM_BLOCKS) {
+    return FALSE;
+  }
+    
+  addr = block * (blockSize/pageSize);
+
+  *pCLE = K9FXX_BLOCK_ERASE_1;
+  *pALE = (uint8_t)(addr & 0x00FF);
+  *pALE = (uint8_t)((addr & 0xFF00) >> 8);
+  *pCLE = K9FXX_BLOCK_ERASE_2;
+
+  TIM_Waitus(700);
+  nandWaitReady();
+
+  return ((nandStatus() & 0x01) != 0x01); 
+}
+
+#endif
diff --git a/hw/bsp/ea4357/nand.h b/hw/bsp/ea4357/nand.h
new file mode 100644
index 000000000..693c67478
--- /dev/null
+++ b/hw/bsp/ea4357/nand.h
@@ -0,0 +1,36 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __NAND_H
+#define __NAND_H
+
+#define NAND_NUM_BLOCKS (1024)
+
+extern uint32_t nand_init (void);
+extern uint32_t nand_getPageSize(void);
+extern uint32_t nand_getBlockSize(void);
+extern uint32_t nand_getRedundantSize(void);
+extern uint32_t nand_isBlockValid(uint32_t blockNum);
+uint32_t nand_readPage(uint32_t block, uint32_t page, uint8_t* pageBuf);
+uint32_t nand_writePage(uint32_t block, uint32_t page, uint8_t* pageBuf);
+uint32_t nand_eraseBlock(uint32_t block);
+
+
+#endif /* end __NAND_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/acc.c b/hw/bsp/ea4357/oem_base_board/acc.c
new file mode 100644
index 000000000..a53634980
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/acc.c
@@ -0,0 +1,254 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "lpc_types.h"
+#include "lpc43xx_i2c.h"
+#include "acc.h"
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+#define I2C_PORT (LPC_I2C0)
+
+#define ACC_I2C_ADDR    (0x1D)
+
+#define ACC_ADDR_XOUTL  0x00
+#define ACC_ADDR_XOUTH  0x01
+#define ACC_ADDR_YOUTL  0x02
+#define ACC_ADDR_YOUTX  0x03
+#define ACC_ADDR_ZOUTL  0x04
+#define ACC_ADDR_ZOUTH  0x05
+#define ACC_ADDR_XOUT8  0x06
+#define ACC_ADDR_YOUT8  0x07
+#define ACC_ADDR_ZOUT8  0x08
+#define ACC_ADDR_STATUS 0x09
+#define ACC_ADDR_DETSRC 0x0A
+#define ACC_ADDR_TOUT   0x0B
+#define ACC_ADDR_I2CAD  0x0D
+#define ACC_ADDR_USRINF 0x0E
+#define ACC_ADDR_WHOAMI 0x0F
+#define ACC_ADDR_XOFFL  0x10
+#define ACC_ADDR_XOFFH  0x11
+#define ACC_ADDR_YOFFL  0x12
+#define ACC_ADDR_YOFFH  0x13
+#define ACC_ADDR_ZOFFL  0x14
+#define ACC_ADDR_ZOFFH  0x15
+#define ACC_ADDR_MCTL   0x16
+#define ACC_ADDR_INTRST 0x17
+#define ACC_ADDR_CTL1   0x18
+#define ACC_ADDR_CTL2   0x19
+#define ACC_ADDR_LDTH   0x1A
+#define ACC_ADDR_PDTH   0x1B
+#define ACC_ADDR_PW     0x1C
+#define ACC_ADDR_LT     0x1D
+#define ACC_ADDR_TW     0x1E
+
+#define ACC_MCTL_MODE(m) ((m) << 0)
+#define ACC_MCTL_GLVL(g) ((g) << 2)
+
+
+#define ACC_STATUS_DRDY 0x01
+#define ACC_STATUS_DOVR 0x02
+#define ACC_STATUS_PERR 0x04
+
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = buf;
+	i2cData.tx_length = len;
+	i2cData.rx_data = NULL;
+	i2cData.rx_length = 0;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = NULL;
+	i2cData.tx_length = 0;
+	i2cData.rx_data = buf;
+	i2cData.rx_length = len;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+
+static uint8_t getStatus(void)
+{
+    uint8_t buf[1];
+
+    buf[0] = ACC_ADDR_STATUS;
+    I2CWrite(ACC_I2C_ADDR, buf, 1);
+    I2CRead(ACC_I2C_ADDR, buf, 1);
+
+    return buf[0];
+}
+
+static uint8_t getModeControl(void)
+{
+    uint8_t buf[1];
+
+    buf[0] = ACC_ADDR_MCTL;
+    I2CWrite(ACC_I2C_ADDR, buf, 1);
+    I2CRead(ACC_I2C_ADDR, buf, 1);
+
+    return buf[0];
+}
+
+static void setModeControl(uint8_t mctl)
+{
+    uint8_t buf[2];
+
+    buf[0] = ACC_ADDR_MCTL;
+    buf[1] = mctl;
+    I2CWrite(ACC_I2C_ADDR, buf, 2);
+}
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the ISL29003 Device
+ *
+ *****************************************************************************/
+void acc_init (void)
+{
+
+    /* set to measurement mode by default */
+
+    setModeControl( (ACC_MCTL_MODE(ACC_MODE_MEASURE)
+            | ACC_MCTL_GLVL(ACC_RANGE_2G) ));
+
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Read accelerometer data
+ *
+ * Params:
+ *   [out] x - read x value
+ *   [out] y - read y value
+ *   [out] z - read z value
+ *
+ *****************************************************************************/
+void acc_read (int8_t *x, int8_t *y, int8_t *z)
+{
+    uint8_t buf[1];
+
+    /* wait for ready flag */
+    while ((getStatus() & ACC_STATUS_DRDY) == 0);
+
+    /*
+     * Have experienced problems reading all registers
+     * at once. Change to reading them one-by-one.
+     */
+    buf[0] = ACC_ADDR_XOUT8;
+    I2CWrite(ACC_I2C_ADDR, buf, 1);
+    I2CRead(ACC_I2C_ADDR, buf, 1);
+
+    *x = (int8_t)buf[0];
+
+    buf[0] = ACC_ADDR_YOUT8;
+    I2CWrite(ACC_I2C_ADDR, buf, 1);
+    I2CRead(ACC_I2C_ADDR, buf, 1);
+
+    *y = (int8_t)buf[0];
+
+    buf[0] = ACC_ADDR_ZOUT8;
+    I2CWrite(ACC_I2C_ADDR, buf, 1);
+    I2CRead(ACC_I2C_ADDR, buf, 1);
+
+    *z = (int8_t)buf[0];
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the g-Range
+ *
+ * Params:
+ *   [in] range - the g-Range
+ *
+ *****************************************************************************/
+void acc_setRange(acc_range_t range)
+{
+    uint8_t mctl = 0;
+
+    mctl = getModeControl();
+
+    mctl &= ~(0x03 << 2);
+    mctl |= ACC_MCTL_GLVL(range);
+
+    setModeControl(mctl);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set sensor mode
+ *
+ * Params:
+ *   [in] mode - the mode to set
+ *
+ *****************************************************************************/
+void acc_setMode(acc_mode_t mode)
+{
+    uint8_t mctl = 0;
+
+    mctl = getModeControl();
+
+    mctl &= ~(0x03 << 0);
+    mctl |= ACC_MCTL_MODE(mode);
+
+    setModeControl(mctl);
+}
+
+#endif
diff --git a/hw/bsp/ea4357/oem_base_board/acc.h b/hw/bsp/ea4357/oem_base_board/acc.h
new file mode 100644
index 000000000..3a739e0b0
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/acc.h
@@ -0,0 +1,49 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __ACC_H
+#define __ACC_H
+
+
+typedef enum
+{
+    ACC_MODE_STANDBY,
+    ACC_MODE_MEASURE,
+    ACC_MODE_LEVEL, /* level detection */
+    ACC_MODE_PULSE, /* pulse detection */
+} acc_mode_t;
+
+typedef enum
+{
+    ACC_RANGE_8G,
+    ACC_RANGE_2G,
+    ACC_RANGE_4G,
+} acc_range_t;
+
+
+void acc_init (void);
+
+void acc_read (int8_t *x, int8_t *y, int8_t *z);
+void acc_setRange(acc_range_t range);
+void acc_setMode(acc_mode_t mode);
+
+
+
+#endif /* end __LIGHT_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/base_eeprom.c b/hw/bsp/ea4357/oem_base_board/base_eeprom.c
new file mode 100644
index 000000000..7571744a6
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/base_eeprom.c
@@ -0,0 +1,200 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+/*
+ * NOTE: I2C must have been initialized before calling any functions in this
+ * file.
+ */
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include <string.h>
+#include <stdio.h>
+#include "lpc_types.h"
+#include "lpc43xx_i2c.h"
+#include "base_eeprom.h"
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+#define I2C_PORT (LPC_I2C0)
+
+#ifndef MIN
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#endif
+
+#define EEPROM_I2C_ADDR    (0x57)
+
+#define EEPROM_PAGE_SIZE     32
+
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+static void eepromDelay(void)
+{
+  volatile int i = 0;
+  for (i = 0; i <0x20000; i++);
+}
+
+static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = buf;
+	i2cData.tx_length = len;
+	i2cData.rx_data = NULL;
+	i2cData.rx_length = 0;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = NULL;
+	i2cData.tx_length = 0;
+	i2cData.rx_data = buf;
+	i2cData.rx_length = len;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the EEPROM Driver
+ *
+ *****************************************************************************/
+void base_eeprom_init (void)
+{
+  I2C_Cmd(I2C_PORT, ENABLE);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Read from the EEPROM
+ *
+ * Params:
+ *   [in] buf - read buffer
+ *   [in] offset - offset to start to read from
+ *   [in] len - number of bytes to read
+ *
+ * Returns:
+ *   number of read bytes or -1 in case of an error
+ *
+ *****************************************************************************/
+int16_t base_eeprom_read(uint8_t* buf, uint16_t offset, uint16_t len)
+{
+  uint8_t addr = 0;
+  int i = 0;
+  uint8_t off[2];
+
+  if (len > BASE_EEPROM_TOTAL_SIZE || offset+len > BASE_EEPROM_TOTAL_SIZE) {
+    return -1;
+  }
+
+  addr = EEPROM_I2C_ADDR;
+  off[0] = ((offset >> 8) & 0xff);
+  off[1] = (offset & 0xff);
+
+  I2CWrite((addr << 1), off, 2);
+  for ( i = 0; i < 0x2000; i++);
+  I2CRead((addr << 1), buf, len);
+
+  return len;
+
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Write to the EEPROM
+ *
+ * Params:
+ *   [in] buf - data to write
+ *   [in] offset - offset to start to write to
+ *   [in] len - number of bytes to write
+ *
+ * Returns:
+ *   number of written bytes or -1 in case of an error
+ *
+ *****************************************************************************/
+int16_t base_eeprom_write(uint8_t* buf, uint16_t offset, uint16_t len)
+{
+  uint8_t addr = 0;
+  int16_t written = 0;
+  uint16_t wLen = 0;
+  uint16_t off = offset;
+  uint8_t tmp[EEPROM_PAGE_SIZE+2];
+
+  if (len > BASE_EEPROM_TOTAL_SIZE || offset+len > BASE_EEPROM_TOTAL_SIZE) {
+    return -1;
+  }
+
+  addr = EEPROM_I2C_ADDR;
+
+  wLen = EEPROM_PAGE_SIZE - (off % EEPROM_PAGE_SIZE);
+  wLen = MIN(wLen, len);
+
+  while (len) {
+    tmp[0] = ((off >> 8) & 0xff);
+    tmp[1] = (off & 0xff);
+    memcpy(&tmp[2], (void*)&buf[written], wLen);
+    I2CWrite((addr << 1), tmp, wLen+2);
+
+    /* delay to wait for a write cycle */
+    eepromDelay();
+
+    len     -= wLen;
+    written += wLen;
+    off     += wLen;
+
+    wLen = MIN(EEPROM_PAGE_SIZE, len);
+  }
+
+  return written;
+}
+
+#endif
diff --git a/hw/bsp/ea4357/oem_base_board/base_eeprom.h b/hw/bsp/ea4357/oem_base_board/base_eeprom.h
new file mode 100644
index 000000000..0d7023093
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/base_eeprom.h
@@ -0,0 +1,31 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __BASE_EEPROM_H
+#define __BASE_EEPROM_H
+
+#define BASE_EEPROM_TOTAL_SIZE 8192
+
+void base_eeprom_init (void);
+int16_t base_eeprom_read(uint8_t* buf, uint16_t offset, uint16_t len);
+int16_t base_eeprom_write(uint8_t* buf, uint16_t offset, uint16_t len);
+
+
+#endif /* end __BASE_EEPROM_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/lm75a.c b/hw/bsp/ea4357/oem_base_board/lm75a.c
new file mode 100644
index 000000000..db8234405
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/lm75a.c
@@ -0,0 +1,132 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+/*
+ * NOTE: I2C must have been initialized before calling any functions in this
+ * file.
+ */
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include <string.h>
+#include <stdio.h>
+#include "lpc_types.h"
+#include "lpc43xx_i2c.h"
+
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+#define I2C_PORT (LPC_I2C0)
+
+#define LM75A_I2C_ADDR    (0x48)
+
+#define LM75A_CMD_TEMP 0x00
+
+#define I2CDEV LPC_I2C2
+
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = buf;
+	i2cData.tx_length = len;
+	i2cData.rx_data = NULL;
+	i2cData.rx_length = 0;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) 
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = NULL;
+	i2cData.tx_length = 0;
+	i2cData.rx_data = buf;
+	i2cData.rx_length = len;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the EEPROM Driver
+ *
+ *****************************************************************************/
+void lm75a_init (void)
+{
+
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Read the temperature
+ *
+ * Params: None
+ *
+ * Returns:
+ *   The measured temperature x 100, i.e. 26.50 degrees returned as 2650
+ *
+ *****************************************************************************/
+int32_t lm75a_readTemp(void)
+{
+    uint8_t temp[2];
+    int16_t t = 0;
+
+    I2CWrite(LM75A_I2C_ADDR, LM75A_CMD_TEMP, 1);
+    I2CRead(LM75A_I2C_ADDR, temp, 2);
+
+    /* 11 MSB bits used. Celcius is calculated as Temp data * 1/8 */
+    t = ((temp[0] << 8) | (temp[1]));
+
+    return ((t * 100) >> 8);
+
+}
+
+
+#endif
diff --git a/hw/bsp/ea4357/oem_base_board/lm75a.h b/hw/bsp/ea4357/oem_base_board/lm75a.h
new file mode 100644
index 000000000..0ed6c8dfe
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/lm75a.h
@@ -0,0 +1,29 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __LM75A_H
+#define __LM75A_H
+
+
+void lm75a_init (void);
+int32_t lm75a_readTemp(void);
+
+
+#endif /* end __LM75A_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/memreg.c b/hw/bsp/ea4357/oem_base_board/memreg.c
new file mode 100644
index 000000000..51bcada4b
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/memreg.c
@@ -0,0 +1,174 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "LPC43xx.h"
+#include "lpc_types.h"
+#include "lpc43xx_scu.h"
+#include "memreg.h"
+
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+static void pinConfig(void)
+{
+  /* Set up EMC pin */
+  scu_pinmux(   2  ,   9  ,  MD_PLN_FAST  ,  3  );//A0
+  scu_pinmux(   2  ,  10  ,  MD_PLN_FAST  ,  3  );//A1
+  scu_pinmux(   2  ,  11  ,  MD_PLN_FAST  ,  3  );//A2
+  scu_pinmux(   2  ,  12  ,  MD_PLN_FAST  ,  3  );//A3
+  scu_pinmux(   2  ,  13  ,  MD_PLN_FAST  ,  3  );//A4
+  scu_pinmux(   1  ,   0  ,  MD_PLN_FAST  ,  2  );//A5
+  scu_pinmux(   1  ,   1  ,  MD_PLN_FAST  ,  2  );//A6
+  scu_pinmux(   1  ,   2  ,  MD_PLN_FAST  ,  2  );//A7
+  scu_pinmux(   2  ,   8  ,  MD_PLN_FAST  ,  3  );//A8
+  scu_pinmux(   2  ,   7  ,  MD_PLN_FAST  ,  3  );//A9
+  scu_pinmux(   2  ,   6  ,  MD_PLN_FAST  ,  2  );//A10
+  scu_pinmux(   2  ,   2  ,  MD_PLN_FAST  ,  2  );//A11
+  scu_pinmux(   2  ,   1  ,  MD_PLN_FAST  ,  2  );//A12
+  scu_pinmux(   2  ,   0  ,  MD_PLN_FAST  ,  2  );//A13
+  scu_pinmux(   6  ,   8  ,  MD_PLN_FAST  ,  1  );//A14
+  scu_pinmux(   6  ,   7  ,  MD_PLN_FAST  ,  1  );//A15
+  scu_pinmux(  13  ,  16  ,  MD_PLN_FAST  ,  2  );//A16
+  scu_pinmux(  13  ,  15  ,  MD_PLN_FAST  ,  2  );//A17
+  scu_pinmux(  14  ,   0  ,  MD_PLN_FAST  ,  3  );//A18
+  scu_pinmux(  14  ,   1  ,  MD_PLN_FAST  ,  3  );//A19
+  scu_pinmux(  14  ,   2  ,  MD_PLN_FAST  ,  3  );//A20
+  scu_pinmux(  14  ,   3  ,  MD_PLN_FAST  ,  3  );//A21
+  scu_pinmux(  14  ,   4  ,  MD_PLN_FAST  ,  3  );//A22
+  scu_pinmux(  10  ,   4  ,  MD_PLN_FAST  ,  3  );//A23
+
+  scu_pinmux(   1  ,   7  ,  MD_PLN_FAST  ,  3  );//D0
+  scu_pinmux(   1  ,   8  ,  MD_PLN_FAST  ,  3  );//D1
+  scu_pinmux(   1  ,   9  ,  MD_PLN_FAST  ,  3  );//D2
+  scu_pinmux(   1  ,  10  ,  MD_PLN_FAST  ,  3  );//D3
+  scu_pinmux(   1  ,  11  ,  MD_PLN_FAST  ,  3  );//D4
+  scu_pinmux(   1  ,  12  ,  MD_PLN_FAST  ,  3  );//D5
+  scu_pinmux(   1  ,  13  ,  MD_PLN_FAST  ,  3  );//D6
+  scu_pinmux(   1  ,  14  ,  MD_PLN_FAST  ,  3  );//D7
+  scu_pinmux(   5  ,   4  ,  MD_PLN_FAST  ,  2  );//D8
+  scu_pinmux(   5  ,   5  ,  MD_PLN_FAST  ,  2  );//D9
+  scu_pinmux(   5  ,   6  ,  MD_PLN_FAST  ,  2  );//D10
+  scu_pinmux(   5  ,   7  ,  MD_PLN_FAST  ,  2  );//D11
+  scu_pinmux(   5  ,   0  ,  MD_PLN_FAST  ,  2  );//D12
+  scu_pinmux(   5  ,   1  ,  MD_PLN_FAST  ,  2  );//D13
+  scu_pinmux(   5  ,   2  ,  MD_PLN_FAST  ,  2  );//D14
+  scu_pinmux(   5  ,   3  ,  MD_PLN_FAST  ,  2  );//D15
+  scu_pinmux(  13  ,   2  ,  MD_PLN_FAST  ,  2  );//D16
+  scu_pinmux(  13  ,   3  ,  MD_PLN_FAST  ,  2  );//D17
+  scu_pinmux(  13  ,   4  ,  MD_PLN_FAST  ,  2  );//D18
+  scu_pinmux(  13  ,   5  ,  MD_PLN_FAST  ,  2  );//D19
+  scu_pinmux(  13  ,   6  ,  MD_PLN_FAST  ,  2  );//D20
+  scu_pinmux(  13  ,   7  ,  MD_PLN_FAST  ,  2  );//D21
+  scu_pinmux(  13  ,   8  ,  MD_PLN_FAST  ,  2  );//D22
+  scu_pinmux(  13  ,   9  ,  MD_PLN_FAST  ,  2  );//D23
+  scu_pinmux(  14  ,   5  ,  MD_PLN_FAST  ,  3  );//D24
+  scu_pinmux(  14  ,   6  ,  MD_PLN_FAST  ,  3  );//D25
+  scu_pinmux(  14  ,   7  ,  MD_PLN_FAST  ,  3  );//D26
+  scu_pinmux(  14  ,   8  ,  MD_PLN_FAST  ,  3  );//D27
+  scu_pinmux(  14  ,   9  ,  MD_PLN_FAST  ,  3  );//D28
+  scu_pinmux(  14  ,  10  ,  MD_PLN_FAST  ,  3  );//D29
+  scu_pinmux(  14  ,  11  ,  MD_PLN_FAST  ,  3  );//D30
+  scu_pinmux(  14  ,  12  ,  MD_PLN_FAST  ,  3  );//D31
+
+  scu_pinmux(   1  ,   3  ,  MD_PLN_FAST  ,  3  );//OE
+  scu_pinmux(   1  ,   6  ,  MD_PLN_FAST  ,  3  );//WE
+
+  scu_pinmux(   1  ,   4  ,  MD_PLN_FAST  ,  3  );//BLS0
+  scu_pinmux(   6  ,   6  ,  MD_PLN_FAST  ,  1  );//BLS1
+  scu_pinmux(  13  ,  13  ,  MD_PLN_FAST  ,  2  );//BLS2
+  scu_pinmux(  13  ,  10  ,  MD_PLN_FAST  ,  2  );//BLS3
+
+  scu_pinmux(   1  ,   5  ,  MD_PLN_FAST  ,  3  );//CS0
+  scu_pinmux(   6  ,   3  ,  MD_PLN_FAST  ,  3  );//CS1
+  scu_pinmux(  13  ,  12  ,  MD_PLN_FAST  ,  2  );//CS2
+  scu_pinmux(  13  ,  11  ,  MD_PLN_FAST  ,  2  );//CS3
+
+  scu_pinmux(   6  ,   4  ,  MD_PLN_FAST  ,  3  );//CAS
+  scu_pinmux(   6  ,   5  ,  MD_PLN_FAST  ,  3  );//RAS
+
+  scu_pinmux(   6  ,   9  ,  MD_PLN_FAST  ,  3  );//DYCS0
+  scu_pinmux(   6  ,   1  ,  MD_PLN_FAST  ,  1  );//DYCS1
+  scu_pinmux(  13  ,  14  ,  MD_PLN_FAST  ,  2  );//DYCS2
+  scu_pinmux(  15  ,  14  ,  MD_PLN_FAST  ,  3  );//DYCS3
+
+  scu_pinmux(   6  ,  11  ,  MD_PLN_FAST  ,  3  );//CKEOUT0
+  scu_pinmux(   6  ,   2  ,  MD_PLN_FAST  ,  1  );//CKEOUT1
+  scu_pinmux(  13  ,   1  ,  MD_PLN_FAST  ,  2  );//CKEOUT2
+  scu_pinmux(  14  ,  15  ,  MD_PLN_FAST  ,  3  );//CKEOUT3
+
+  scu_pinmux(   6  ,  12  ,  MD_PLN_FAST  ,  3  );//DQMOUT0
+  scu_pinmux(   6  ,  10  ,  MD_PLN_FAST  ,  3  );//DQMOUT1
+  scu_pinmux(  13  ,   0  ,  MD_PLN_FAST  ,  2  );//DQMOUT2
+  scu_pinmux(  14  ,  13  ,  MD_PLN_FAST  ,  3  );//DQMOUT3
+}
+
+
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the NOR Flash
+ *
+ *****************************************************************************/
+uint32_t memreg_init (void)
+{
+  LPC_EMC->CONTROL   = 0x00000001;
+  LPC_EMC->CONFIG    = 0x00000000;
+
+  pinConfig();
+
+  // Setup for 16-bit access
+  LPC_EMC->STATICCONFIG2   = 0x00000001;
+
+  return FALSE;
+}
+
+#endif
+
diff --git a/hw/bsp/ea4357/oem_base_board/memreg.h b/hw/bsp/ea4357/oem_base_board/memreg.h
new file mode 100644
index 000000000..e9ef85f03
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/memreg.h
@@ -0,0 +1,30 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __MEMREG_H
+#define __MEMREG_H
+
+#define MEMREG_BASE   0x1e000000
+
+
+extern uint32_t memreg_init (void);
+
+
+#endif /* end __MEMREG_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/norflash.c b/hw/bsp/ea4357/oem_base_board/norflash.c
new file mode 100644
index 000000000..0baf62c49
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/norflash.c
@@ -0,0 +1,547 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "lpc_types.h"
+#include "lpc43xx_scu.h"
+#include "lpc43xx_timer.h"
+#include "norflash.h"
+
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+#define CMD_SWID      0x90
+#define CMD_CFI_QRY   0x98
+#define CMD_ID_EXIT   0xF0
+
+#define CMD_ERASE_BLOCK  0x0050
+#define CMD_ERASE_SECTOR 0x0030
+#define CMD_ERASE_CHIP   0x0010
+
+#define MAN_ID_SST         0x00BF
+#define DEV_ID_SST39VF3201 0x235B 
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+static geometry_t chip_info;
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+static void pinConfig(void)
+{
+	/* Set up EMC pin */
+	scu_pinmux(	 2	,	 9	,	MD_PLN_FAST	,	3	);//A0
+	scu_pinmux(	 2	,	10	,	MD_PLN_FAST	,	3	);//A1
+	scu_pinmux(	 2	,	11	,	MD_PLN_FAST	,	3	);//A2
+	scu_pinmux(	 2	,	12	,	MD_PLN_FAST	,	3	);//A3
+	scu_pinmux(	 2	,	13	,	MD_PLN_FAST	,	3	);//A4
+	scu_pinmux(	 1	,	 0	,	MD_PLN_FAST	,	2	);//A5
+	scu_pinmux(	 1	,	 1	,	MD_PLN_FAST	,	2	);//A6
+	scu_pinmux(	 1	,	 2	,	MD_PLN_FAST	,	2	);//A7
+	scu_pinmux(	 2	,	 8	,	MD_PLN_FAST	,	3	);//A8
+	scu_pinmux(	 2	,	 7	,	MD_PLN_FAST	,	3	);//A9
+	scu_pinmux(	 2	,	 6	,	MD_PLN_FAST	,	2	);//A10
+	scu_pinmux(	 2	,	 2	,	MD_PLN_FAST	,	2	);//A11
+	scu_pinmux(	 2	,	 1	,	MD_PLN_FAST	,	2	);//A12
+	scu_pinmux(	 2	,	 0	,	MD_PLN_FAST	,	2	);//A13
+	scu_pinmux(	 6	,	 8	,	MD_PLN_FAST	,	1	);//A14
+	scu_pinmux(	 6	,	 7	,	MD_PLN_FAST	,	1	);//A15
+	scu_pinmux(	13	,	16	,	MD_PLN_FAST	,	2	);//A16
+	scu_pinmux(	13	,	15	,	MD_PLN_FAST	,	2	);//A17
+	scu_pinmux(	14	,	 0	,	MD_PLN_FAST	,	3	);//A18
+	scu_pinmux(	14	,	 1	,	MD_PLN_FAST	,	3	);//A19
+	scu_pinmux(	14	,	 2	,	MD_PLN_FAST	,	3	);//A20
+	scu_pinmux(	14	,	 3	,	MD_PLN_FAST	,	3	);//A21
+	scu_pinmux(	14	,	 4	,	MD_PLN_FAST	,	3	);//A22
+	scu_pinmux(	10	,	 4	,	MD_PLN_FAST	,	3	);//A23
+	
+	scu_pinmux(	 1	,	 7	,	MD_PLN_FAST	,	3	);//D0
+	scu_pinmux(	 1	,	 8	,	MD_PLN_FAST	,	3	);//D1
+	scu_pinmux(	 1	,	 9	,	MD_PLN_FAST	,	3	);//D2
+	scu_pinmux(	 1	,	10	,	MD_PLN_FAST	,	3	);//D3
+	scu_pinmux(	 1	,	11	,	MD_PLN_FAST	,	3	);//D4
+	scu_pinmux(	 1	,	12	,	MD_PLN_FAST	,	3	);//D5
+	scu_pinmux(	 1	,	13	,	MD_PLN_FAST	,	3	);//D6
+	scu_pinmux(	 1	,	14	,	MD_PLN_FAST	,	3	);//D7
+	scu_pinmux(	 5	,	 4	,	MD_PLN_FAST	,	2	);//D8
+	scu_pinmux(	 5	,	 5	,	MD_PLN_FAST	,	2	);//D9
+	scu_pinmux(	 5	,	 6	,	MD_PLN_FAST	,	2	);//D10
+	scu_pinmux(	 5	,	 7	,	MD_PLN_FAST	,	2	);//D11
+	scu_pinmux(	 5	,	 0	,	MD_PLN_FAST	,	2	);//D12
+	scu_pinmux(	 5	,	 1	,	MD_PLN_FAST	,	2	);//D13
+	scu_pinmux(	 5	,	 2	,	MD_PLN_FAST	,	2	);//D14
+	scu_pinmux(	 5	,	 3	,	MD_PLN_FAST	,	2	);//D15
+	scu_pinmux(	13	,	 2	,	MD_PLN_FAST	,	2	);//D16
+	scu_pinmux(	13	,	 3	,	MD_PLN_FAST	,	2	);//D17
+	scu_pinmux(	13	,	 4	,	MD_PLN_FAST	,	2	);//D18
+	scu_pinmux(	13	,	 5	,	MD_PLN_FAST	,	2	);//D19
+	scu_pinmux(	13	,	 6	,	MD_PLN_FAST	,	2	);//D20
+	scu_pinmux(	13	,	 7	,	MD_PLN_FAST	,	2	);//D21
+	scu_pinmux(	13	,	 8	,	MD_PLN_FAST	,	2	);//D22
+	scu_pinmux(	13	,	 9	,	MD_PLN_FAST	,	2	);//D23
+	scu_pinmux(	14	,	 5	,	MD_PLN_FAST	,	3	);//D24
+	scu_pinmux(	14	,	 6	,	MD_PLN_FAST	,	3	);//D25
+	scu_pinmux(	14	,	 7	,	MD_PLN_FAST	,	3	);//D26
+	scu_pinmux(	14	,	 8	,	MD_PLN_FAST	,	3	);//D27
+	scu_pinmux(	14	,	 9	,	MD_PLN_FAST	,	3	);//D28
+	scu_pinmux(	14	,	10	,	MD_PLN_FAST	,	3	);//D29
+	scu_pinmux(	14	,	11	,	MD_PLN_FAST	,	3	);//D30
+	scu_pinmux(	14	,	12	,	MD_PLN_FAST	,	3	);//D31
+		
+	scu_pinmux(	 1	,	 3	,	MD_PLN_FAST	,	3	);//OE
+	scu_pinmux(	 1	,	 6	,	MD_PLN_FAST	,	3	);//WE
+	
+	scu_pinmux(	 1	,	 4	,	MD_PLN_FAST	,	3	);//BLS0
+	scu_pinmux(	 6	,	 6	,	MD_PLN_FAST	,	1	);//BLS1	
+	scu_pinmux(	13	,	13	,	MD_PLN_FAST	,	2	);//BLS2
+	scu_pinmux(	13	,	10	,	MD_PLN_FAST	,	2	);//BLS3
+	
+	scu_pinmux(	 1	,	 5	,	MD_PLN_FAST	,	3	);//CS0	
+	scu_pinmux(	 6	,	 3	,	MD_PLN_FAST	,	3	);//CS1
+	scu_pinmux(	13	,	12	,	MD_PLN_FAST	,	2	);//CS2
+	scu_pinmux(	13	,	11	,	MD_PLN_FAST	,	2	);//CS3
+}
+
+#if 0
+static void getIdString(uint16_t idString[11])
+{
+  int i = 0;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_CFI_QRY;
+
+  for (i = 0; i < 11; i++) {
+    idString[i] = *(GET_ADDR(0x10 + i));
+  }
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_ID_EXIT;
+}
+#endif
+
+static void getGeoInfo(uint16_t info[14])
+{
+  int i = 0;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_CFI_QRY;
+
+  for (i = 0; i < 14; i++) {
+    info[i] = *(GET_ADDR(0x27 + i));
+  }
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_ID_EXIT;
+}
+
+static uint32_t getProductId(void)
+{
+  uint16_t manuid = 0;
+  uint16_t devid = 0;
+  uint32_t result = 0;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_SWID;
+
+  manuid = *(GET_ADDR(0x00));
+  devid  = *(GET_ADDR(0x01));
+
+  result = ((manuid << 16) | devid);
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2aaa)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_ID_EXIT;
+
+  return result;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    When the SST39VF160x/320x are in the internal Program operation, any 
+ *    attempt to read DQ7 will produce the complement of the true data. Once 
+ *    the Program operation is completed, DQ7 will produce true data. Note 
+ *    that even though DQ7 may have valid data immediately following the 
+ *    completion of an internal Write operation, the remaining data outputs 
+ *    may still be invalid: valid data on the entire data bus will appear in 
+ *    subsequent successive Read cycles after an interval of 1 �s. During 
+ *    internal Erase operation, any attempt to read DQ7 will produce a '0'. 
+ *    Once the internal Erase operation is completed, DQ7 will produce a '1'.
+ *
+ * Parameters:
+ *    addr      The device address 
+ *    data      The original (true) data
+ *    timeout   Maximum number of loops to delay
+ *
+ * Returns:
+ *    TRUE if success
+ *
+ *****************************************************************************/
+static uint16_t check_data_polling(uint32_t addr, uint16_t data, uint32_t timeout)
+{
+  volatile uint16_t *p = (uint16_t*) addr;
+  uint16_t true_data = data & 0x80;
+  int i;
+
+  for (i = 0; i < timeout; i++)
+  {
+    if ( true_data == (*p &0x80) )
+    {
+      TIM_Waitus(1);
+      return (TRUE);
+    } 
+  }  
+  return (FALSE);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    During the internal Program or Erase operation, any consecutive attempts 
+ *    to read DQ6 will produce alternating �1�s and �0�s, i.e., toggling 
+ *    between 1 and 0. When the internal Program or Erase operation is 
+ *    completed, the DQ6 bit will stop toggling. The device is then ready 
+ *    for the next operation. 
+ *
+ * Parameters:
+ *    addr      The device address 
+ *    timeout   Maximum number of loops to delay
+ *
+ * Returns:
+ *    TRUE if success
+ *
+ *****************************************************************************/
+static uint16_t check_toggle_ready(uint32_t addr, uint32_t timeout)
+{
+  volatile uint16_t *p = (uint16_t*) addr;
+  uint16_t predata, currdata;
+  int i;
+
+  predata = *p & 0x40;
+  for (i = 0; i < timeout; i++)
+  {
+    currdata = *p & 0x40;
+    if (predata == currdata)
+    {
+      TIM_Waitus(1);
+      return (TRUE);
+    }
+    predata = currdata;
+  }
+  return (FALSE);
+}
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the NOR Flash
+ *
+ *****************************************************************************/
+uint32_t norflash_init()
+{
+  uint32_t prodId = 0;
+
+//   LPC_SC->PCONP      |= 0x00000800;
+
+  LPC_EMC->CONTROL = 0x00000001;
+
+  LPC_EMC->CONFIG  = 0x00000000;
+
+  //Disable Auto-Byte Addressing (on boards designed for LPC24xx)
+  //LPC_SC->SCS |= 0x00000001;
+
+  pinConfig();
+
+  LPC_EMC->STATICCONFIG0   = 0x00000081;
+
+  LPC_EMC->STATICWAITWEN0  = 0x00000003; /* ( n + 1 ) -> 4 clock cycles */
+  LPC_EMC->STATICWAITOEN0  = 0x00000003; /* ( n ) -> 0 clock cycles */
+  LPC_EMC->STATICWAITRD0   = 0x00000006; /* ( n + 1 ) -> 7 clock cycles */
+  LPC_EMC->STATICWAITPAG0  = 0x00000003; /* ( n + 1 ) -> 4 clock cycles */
+  LPC_EMC->STATICWAITWR0   = 0x00000005; /* ( n + 2 ) -> 7 clock cycles */
+  LPC_EMC->STATICWAITTURN0 = 0x00000003; /* ( n + 1 ) -> 4 clock cycles */
+
+#if 0
+  M32(0x40086400) = 3;//SFSP8_0, pin config P8_0, FUNC3, (PUP_DISABLE | PDN_DISABLE | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x40086404) = 3;//SFSP8_1, pin config P8_1, FUNC3, (PUP_DISABLE | PDN_DISABLE | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x40086408) = 3;//SFSP8_2, pin config P8_2, FUNC3, (PUP_DISABLE | PDN_DISABLE | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x4008640C) = 3;//SFSP8_3, pin config P8_3, FUNC3, (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x40086410) = 3;//SFSP8_4, pin config P8_4, FUNC3, (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x40086414) = 3;//SFSP8_5, pin config P8_5, FUNC3, (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x40086418) = 3;//SFSP8_6, pin config P8_6, FUNC3, (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_DISABLE | FILTER_ENABLE) 
+  M32(0x4008641C) = 3;//SFSP8_7, pin config P8_7, FUNC3, (PUP_DISABLE | PDN_DISABLE | SLEWRATE_SLOW | INBUF_DISABLE | FILTER_ENABLE) 
+#endif
+
+  prodId = getProductId();
+
+  if (prodId == ((MAN_ID_SST << 16) | DEV_ID_SST39VF3201)) {
+
+    uint16_t info[14];
+    getGeoInfo(info);
+    chip_info.device_size = 1 << info[0];
+    chip_info.num_sectors = ((info[7] << 8) | info[6]) + 1;
+    chip_info.sector_size = ((info[9] << 8) | info[8]) * 256;
+    chip_info.num_blocks =  ((info[11] << 8) | info[10]) + 1;
+    chip_info.block_size = ((info[13] << 8) | info[12]) * 256;
+
+    return TRUE;
+  }
+
+  return FALSE;
+}
+
+void norflash_getGeometry(geometry_t* geometry)
+{
+  *geometry = chip_info;
+}
+
+
+uint32_t norflash_eraseSector(uint32_t addr)
+{
+  volatile uint16_t* p;
+
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+  *(GET_ADDR(0x5555)) 	= 0x0080;
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+
+  p  = (uint16_t*) addr;
+  *p = CMD_ERASE_SECTOR;
+
+  return check_data_polling(addr, 0xffff, 500000);
+}
+
+uint32_t norflash_eraseBlock(uint32_t addr)
+{
+  volatile uint16_t* p;
+
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+  *(GET_ADDR(0x5555)) 	= 0x0080;
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+
+  p  = (uint16_t*) addr;
+  *p = CMD_ERASE_BLOCK;
+
+  return check_toggle_ready(addr, 500000);
+}
+
+uint32_t norflash_eraseEntireChip(void)
+{
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+  *(GET_ADDR(0x5555)) 	= 0x0080;
+  *(GET_ADDR(0x5555)) 	= 0x00AA;
+  *(GET_ADDR(0x2AAA)) 	= 0x0055;
+  *(GET_ADDR(0x5555)) 	= CMD_ERASE_CHIP;
+
+  return check_toggle_ready(NORFLASH_BASE, 500000);
+}
+
+uint32_t norflash_writeWord(uint32_t addr, uint16_t data)
+{
+  volatile uint16_t *p;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2AAA)) = 0x0055;
+  *(GET_ADDR(0x5555)) = 0x00A0;
+
+  p  = (uint16_t*) addr;
+  *p = data;
+
+  return check_toggle_ready(addr, 500000);
+}
+
+uint32_t norflash_writeBuff(uint32_t addr, uint16_t* data, uint16_t len)
+{
+  uint16_t i;
+  for (i = 0; i < len; i++)
+  {
+    if (!norflash_writeWord(addr, data[i]))
+    {
+      return (FALSE);
+    }
+  }
+  return (TRUE);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Reads the security information from the chip. For an explanation
+ *    see the user manual. 
+ *
+ * Parameters:
+ *    SST_SecID   The factory programmed security segment 
+ *    User_SecID  The user defined security segment
+ *
+ *****************************************************************************/
+void norflash_secid_read(uint16_t SST_SecID[8], uint16_t User_SecID[8])
+{
+  uint16_t i;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2AAA)) = 0x0055;
+  *(GET_ADDR(0x5555)) = 0x0088;
+
+  for (i = 0; i < 7; i++)
+  {
+    SST_SecID[i] = *(GET_ADDR(i));          // SST security is 0x00 - 0x07
+    User_SecID[i] = *(GET_ADDR(i + 0x10)); // User security is 0x10 - 0x17
+  }
+
+  // exit command
+  *(GET_ADDR(0x5555)) = CMD_ID_EXIT;
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Checks if the user defined security segment has been locked or not.
+ *    See the user manual for more information. 
+ *
+ * Returns:
+ *    TRUE if the segment is locked
+ *
+ *****************************************************************************/
+uint32_t norflash_secid_getLockStatus(void)
+{
+  uint16_t status;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2AAA)) = 0x0055;
+  *(GET_ADDR(0x5555)) = 0x0088;
+
+  // read status
+  status = *(GET_ADDR(0xff));
+  status &= 0x0008;
+
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2AAA)) = 0x0055;
+  *(GET_ADDR(0x5555)) = CMD_ID_EXIT;
+
+  if (!status)
+    return TRUE; // locked
+  return FALSE;  // not locked
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Lock the user security segment. CANNOT BE UNDONE. 
+ *    See the user manual for more information. 
+ *
+ * Returns:
+ *    TRUE if the segment is locked after programming
+ *
+ *****************************************************************************/
+uint32_t norflash_secid_lockOut()
+{
+  // Code not verified. Use at own risk
+#if 0
+  *(GET_ADDR(0x5555)) = 0x00AA;
+  *(GET_ADDR(0x2AAA)) = 0x0055;
+  *(GET_ADDR(0x5555)) = 0x0085;
+  *(GET_ADDR(0x0   )) = 0x0000;  // Write 0x0000 to any address
+  
+  if (check_toggle_ready(GET_ADDR(0x0), 500000)) 
+  {
+    return norflash_secid_getLockStatus();
+  }
+#endif    
+  return FALSE;  
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Writes data to the user security segment (0x0010 - 0x0017). 
+ *    See the user manual for more information. 
+ *
+ * Parameters:
+ *    target   Must be in the range 0x10 to 0x17 
+ *    data     The data to write
+ *    len      The number of words to write
+ * 
+ * Returns:
+ *    TRUE if the programming was successful
+ *
+ *****************************************************************************/
+uint32_t norflash_secid_writeWord(uint16_t target, uint16_t* data, uint16_t len)
+{
+  // Code not verified. Use at own risk
+#if 0
+  uint16_t i;
+
+  if ((target < 0x10) || (target > 0x17))
+    return FALSE;
+
+  if ((len > 8) || ((target + len) > 0x17))
+    return FALSE;
+
+  for (i = 0; i < len; i++)
+  {
+    *(GET_ADDR(0x5555)) = 0x00AA;
+    *(GET_ADDR(0x2AAA)) = 0x0055;
+    *(GET_ADDR(0x5555)) = 0x00A5;
+    *(GET_ADDR(target + i)) = data;
+
+    data++;
+
+    /* Read the toggle bit to detect end-of-programming for User Sec ID.
+       Do Not use Data# Polling for User_SecID_Word_Program!! */
+    if (!check_toggle_ready(GET_ADDR(target + i), 500000))
+      return FALSE;
+  }
+#endif
+
+  return TRUE;
+}
+
+#endif
diff --git a/hw/bsp/ea4357/oem_base_board/norflash.h b/hw/bsp/ea4357/oem_base_board/norflash.h
new file mode 100644
index 000000000..11eb675e6
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/norflash.h
@@ -0,0 +1,56 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __NORFLASH_H
+#define __NORFLASH_H
+
+#define NORFLASH_SIZE           0x400000  /*Bytes or 0x200000 16bit words*/
+#define NORFLASH_BLOCK_SIZE     0x10000   /*Bytes, or 32K 16bit words*/
+#define NORFLASH_BASE           0x1C000000
+
+//16 bit data
+#define GET_ADDR(addr)  (volatile uint16_t *)(NORFLASH_BASE | ((addr) << 1))
+
+typedef struct
+{
+  uint32_t device_size;  /* Device size in bytes */
+  uint32_t num_sectors;  /* Number of sectors */
+  uint32_t sector_size;  /* Sector size in bytes */
+  uint32_t num_blocks;   /* Number of blocks */
+  uint32_t block_size;   /* Block size in bytes */
+} geometry_t;
+
+extern uint32_t norflash_init(void);
+
+extern void norflash_getGeometry(geometry_t* geometry);
+
+extern uint32_t norflash_eraseBlock(uint32_t addr);
+extern uint32_t norflash_eraseSector(uint32_t addr);
+extern uint32_t norflash_eraseEntireChip(void);
+
+extern uint32_t norflash_writeWord(uint32_t addr, uint16_t data);
+extern uint32_t norflash_writeBuff(uint32_t addr, uint16_t* data, uint16_t len);
+
+extern void norflash_secid_read(uint16_t SST_SecID[8], uint16_t user_SecID[8]);
+extern uint32_t norflash_secid_getLockStatus(void);
+extern uint32_t norflash_secid_lockOut(void);
+extern uint32_t norflash_secid_writeWord(uint16_t target, uint16_t* data, uint16_t len);
+
+#endif /* end __NORFLASH_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/pca9532.c b/hw/bsp/ea4357/oem_base_board/pca9532.c
new file mode 100644
index 000000000..05e73cc2e
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/pca9532.c
@@ -0,0 +1,349 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+/*
+ * NOTE: I2C must have been initialized before calling any functions in this
+ * file.
+ */
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "lpc43xx_i2c.h"
+#include "lpc43xx_cgu.h"
+#include "lpc_types.h"
+#include "pca9532.h"
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+#define I2C_PORT (LPC_I2C0)
+
+#define LS_MODE_ON     0x01
+#define LS_MODE_BLINK0 0x02
+#define LS_MODE_BLINK1 0x03
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+static uint16_t blink0Shadow = 0;
+static uint16_t blink1Shadow = 0;
+static uint16_t ledStateShadow = 0;
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len)
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = buf;
+	i2cData.tx_length = len;
+	i2cData.rx_data = NULL;
+	i2cData.rx_length = 0;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len)
+{
+  I2C_M_SETUP_Type i2cData;
+
+	i2cData.sl_addr7bit = addr;
+	i2cData.tx_data = NULL;
+	i2cData.tx_length = 0;
+	i2cData.rx_data = buf;
+	i2cData.rx_length = len;
+	i2cData.retransmissions_max = 3;
+
+  return I2C_MasterTransferData(I2C_PORT, &i2cData, I2C_TRANSFER_POLLING);
+}
+
+static void setLsStates(uint16_t states, uint8_t* ls, uint8_t mode)
+{
+#define IS_LED_SET(bit, x) ( ( ((x) & (bit)) != 0 ) ? 1 : 0 )
+
+    int i = 0;
+
+    for (i = 0; i < 4; i++) {
+
+        ls[i] |= ( (IS_LED_SET(0x0001, states)*mode << 0)
+                | (IS_LED_SET(0x0002, states)*mode << 2)
+                | (IS_LED_SET(0x0004, states)*mode << 4)
+                | (IS_LED_SET(0x0008, states)*mode << 6) );
+
+        states >>= 4;
+    }
+}
+
+static void setLeds(void)
+{
+    uint8_t buf[5];
+    uint8_t ls[4] = {0,0,0,0};
+    uint16_t states = ledStateShadow;
+
+    /* LEDs in On/Off state */
+    setLsStates(states, ls, LS_MODE_ON);
+
+    /* set the LEDs that should blink */
+    setLsStates(blink0Shadow, ls, LS_MODE_BLINK0);
+    setLsStates(blink1Shadow, ls, LS_MODE_BLINK1);
+
+
+    buf[0] = PCA9532_LS0 | PCA9532_AUTO_INC;
+    buf[1] = ls[0];
+    buf[2] = ls[1];
+    buf[3] = ls[2];
+    buf[4] = ls[3];
+    I2CWrite(PCA9532_I2C_ADDR, buf, 5);
+}
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the PCA9532 Device
+ *
+ *****************************************************************************/
+void pca9532_init (void)
+{
+    /* nothing to initialize */
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Get the LED states
+ *
+ * Params:
+ *    [in]  shadow  - TRUE if the states should be retrieved from the shadow
+ *                    variables. The shadow variable are updated when any
+ *                    of setLeds, setBlink0Leds and/or setBlink1Leds are
+ *                    called.
+ *
+ *                    FALSE if the state should be retrieved from the PCA9532
+ *                    device. A blinkin LED may be reported as on or off
+ *                    depending on the state when calling the function.
+ *
+ * Returns:
+ *      A mask where a 1 indicates that a LED is on (or blinking).
+ *
+ *****************************************************************************/
+uint16_t pca9532_getLedState (uint32_t shadow)
+{
+    uint8_t buf[2];
+    uint16_t ret = 0;
+
+    if (shadow) {
+        /* a blink LED is reported as on*/
+        ret = (ledStateShadow | blink0Shadow | blink1Shadow);
+    }
+    else {
+
+        /*
+         * A blinking LED may be reported as on or off depending on
+         * its state when reading the Input register.
+         */
+
+        buf[0] = PCA9532_INPUT0;
+        I2CWrite(PCA9532_I2C_ADDR, buf, 1);
+
+        I2CRead(PCA9532_I2C_ADDR, buf, 1);
+        ret = buf[0];
+
+
+        buf[0] = PCA9532_INPUT1;
+        I2CWrite(PCA9532_I2C_ADDR, buf, 1);
+
+        I2CRead(PCA9532_I2C_ADDR, buf, 1);
+        ret |= (buf[0] << 8);
+
+
+        /* invert since LEDs are active low */
+        ret = ((~ret) & 0xFFFF);
+    }
+
+    return (ret & ~PCA9532_NOT_USED);
+}
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set LED states (on or off).
+ *
+ * Params:
+ *    [in]  ledOnMask  - The LEDs that should be turned on. This mask has
+ *                       priority over ledOffMask
+ *    [in]  ledOffMask - The LEDs that should be turned off.
+ *
+ *****************************************************************************/
+void pca9532_setLeds (uint16_t ledOnMask, uint16_t ledOffMask)
+{
+    /* turn off leds */
+    ledStateShadow &= (~(ledOffMask) & 0xffff);
+
+    /* ledOnMask has priority over ledOffMask */
+    ledStateShadow |= ledOnMask;
+
+    /* turn off blinking */
+    blink0Shadow &= (~(ledOffMask) & 0xffff);
+    blink1Shadow &= (~(ledOffMask) & 0xffff);
+
+    setLeds();
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the blink period for PWM0. Valid values are 0 - 255 where 0
+ *    means 152 Hz and 255 means 0.59 Hz. A value of 151 means 1 Hz.
+ *
+ * Params:
+ *    [in]  period  - the period for pwm0
+ *
+ *****************************************************************************/
+void pca9532_setBlink0Period(uint8_t period)
+{
+    uint8_t buf[2];
+
+    buf[0] = PCA9532_PSC0;
+    buf[1] = period;
+    I2CWrite(PCA9532_I2C_ADDR, buf, 2);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the duty cycle for PWM0. Valid values are 0 - 100. 25 means the LED
+ *    is on 25% of the period.
+ *
+ * Params:
+ *    [in]  duty  - duty cycle
+ *
+ *****************************************************************************/
+void pca9532_setBlink0Duty(uint8_t duty)
+{
+    uint8_t buf[2];
+    uint32_t tmp = duty;
+    if (tmp > 100) {
+        tmp = 100;
+    }
+
+    tmp = (256 * tmp)/100;
+
+    buf[0] = PCA9532_PWM0;
+    buf[1] = tmp;
+    I2CWrite(PCA9532_I2C_ADDR, buf, 2);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the LEDs that should blink with rate and duty cycle from PWM0.
+ *    Blinking is turned off with pca9532_setLeds.
+ *
+ * Params:
+ *    [in]  ledMask  - LEDs that should blink.
+ *
+ *****************************************************************************/
+void pca9532_setBlink0Leds(uint16_t ledMask)
+{
+    blink0Shadow |= ledMask;
+    setLeds();
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the blink period for PWM1. Valid values are 0 - 255 where 0
+ *    means 152 Hz and 255 means 0.59 Hz. A value of 151 means 1 Hz.
+ *
+ * Params:
+ *    [in]  period  - The period for PWM1
+ *
+ *****************************************************************************/
+void pca9532_setBlink1Period(uint8_t period)
+{
+    uint8_t buf[2];
+
+    buf[0] = PCA9532_PSC1;
+    buf[1] = period;
+    I2CWrite(PCA9532_I2C_ADDR, buf, 2);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the duty cycle for PWM1. Valid values are 0 - 100. 25 means the LED
+ *    is on 25% of the period.
+ *
+ * Params:
+ *    [in]  duty  - duty cycle.
+ *
+ *****************************************************************************/
+void pca9532_setBlink1Duty(uint8_t duty)
+{
+    uint8_t buf[2];
+
+    uint32_t tmp = duty;
+    if (tmp > 100) {
+        tmp = 100;
+    }
+
+    tmp = (256 * tmp)/100;
+
+    buf[0] = PCA9532_PWM1;
+    buf[1] = tmp;
+    I2CWrite(PCA9532_I2C_ADDR, buf, 2);
+}
+
+/******************************************************************************
+ *
+ * Description:
+ *    Set the LEDs that should blink with rate and duty cycle from PWM1.
+ *    Blinking is turned off with pca9532_setLeds.
+ *
+ * Params:
+ *    [in]  ledMask  - LEDs that should blink.
+ *
+ *****************************************************************************/
+void pca9532_setBlink1Leds(uint16_t ledMask)
+{
+    blink1Shadow |= ledMask;
+    setLeds();
+}
+
+#endif
diff --git a/hw/bsp/ea4357/oem_base_board/pca9532.h b/hw/bsp/ea4357/oem_base_board/pca9532.h
new file mode 100644
index 000000000..885075326
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/pca9532.h
@@ -0,0 +1,94 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __PCA9532C_H
+#define __PCA9532C_H
+
+
+#define PCA9532_I2C_ADDR    (0x60)
+
+#define PCA9532_INPUT0 0x00
+#define PCA9532_INPUT1 0x01
+#define PCA9532_PSC0   0x02
+#define PCA9532_PWM0   0x03
+#define PCA9532_PSC1   0x04
+#define PCA9532_PWM1   0x05
+#define PCA9532_LS0    0x06
+#define PCA9532_LS1    0x07
+#define PCA9532_LS2    0x08
+#define PCA9532_LS3    0x09
+
+#define PCA9532_AUTO_INC 0x10
+
+
+/*
+ * The Keys on the base board are mapped to LED0 -> LED3 on
+ * the PCA9532.
+ */
+
+#define KEY1 0x0001
+#define KEY2 0x0002
+#define KEY3 0x0004
+#define KEY4 0x0008
+
+#define KEY_MASK 0x000F
+
+/*
+ * MMC Card Detect and MMC Write Protect are mapped to LED4
+ * and LED5 on the PCA9532. Please note that WP is active low.
+ */
+
+#define MMC_CD 0x0010
+#define MMC_WP 0x0020
+
+#define MMC_MASK  0x30
+
+/* NOTE: LED6 and LED7 on PCA9532 are not connected to anything */
+#define PCA9532_NOT_USED 0xC0
+
+/*
+ * Below are the LED constants to use when enabling/disabling a LED.
+ * The LED names are the names printed on the base board and not
+ * the names from the PCA9532 device. base_LED1 -> LED8 on PCA9532,
+ * base_LED2 -> LED9, and so on.
+ */
+
+#define LED1 0x0100
+#define LED2 0x0200
+#define LED3 0x0400
+#define LED4 0x0800
+#define LED5 0x1000
+#define LED6 0x2000
+#define LED7 0x4000
+#define LED8 0x8000
+
+#define LED_MASK 0xFF00
+
+void pca9532_init (void);
+uint16_t pca9532_getLedState (uint32_t shadow);
+void pca9532_setLeds (uint16_t ledOnMask, uint16_t ledOffMask);
+void pca9532_setBlink0Period(uint8_t period);
+void pca9532_setBlink0Duty(uint8_t duty);
+void pca9532_setBlink0Leds(uint16_t ledMask);
+void pca9532_setBlink1Period(uint8_t period);
+void pca9532_setBlink1Duty(uint8_t duty);
+void pca9532_setBlink1Leds(uint16_t ledMask);
+
+#endif /* end __PCA9532C_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/
diff --git a/hw/bsp/ea4357/oem_base_board/uda1380.c b/hw/bsp/ea4357/oem_base_board/uda1380.c
new file mode 100644
index 000000000..654e4eb9a
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/uda1380.c
@@ -0,0 +1,159 @@
+#include "../../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "lpc43xx_i2c.h"
+#include "lpc43xx_scu.h"
+#include "uda1380.h"
+
+//Uda1380 link to I2C0 only
+#define UDA1380_I2C		LPC_I2C0
+
+
+
+/*********************************************************************//**
+ * @brief 		Initialize Uda1380
+ * @param[in]	i2cClockFreq	I2C clock frequency that Uda1380 operate
+ * @param[in] i2sClockFreq  I2S bit clock frequency
+ * @return 		None
+ **********************************************************************/
+int32_t Uda1380_Init(uint32_t i2cClockFreq, uint32_t i2sClockFreq)
+{
+  int32_t ret;
+	uint8_t clk;
+	
+// 	// Config Pin for I2C_SDA and I2C_SCL of I2C0
+// 	scu_pinmux(	2	,	3	,	MD_PLN_FAST,	FUNC1	);
+// 	scu_pinmux(	2	,	4	,	MD_PLN_FAST,	FUNC1	);
+
+	I2C_Init(UDA1380_I2C, i2cClockFreq);
+
+	/* Enable I2C1 operation */
+	I2C_Cmd(UDA1380_I2C, ENABLE);
+
+	/* Reset */
+	ret = Uda1380_WriteData(UDA1380_REG_L3, 0 );
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+
+    /* Write clock settings */
+	ret = Uda1380_WriteData(UDA1380_REG_I2S,0 );
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+
+   	ret = Uda1380_WriteData(UDA1380_REG_MSTRMUTE,0);
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+	
+	ret = Uda1380_WriteData(UDA1380_REG_MIXSDO,0);
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+
+#if UDA1380_SYSCLK_USED //Use SYSCLK
+	ret = Uda1380_WriteData(UDA1380_REG_EVALCLK, 
+	       EVALCLK_DEC_EN | EVALCLK_DAC_EN | EVALCLK_INT_EN | EVALCLK_DAC_SEL_SYSCLK );
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+	
+	ret = Uda1380_WriteData(UDA1380_REG_PWRCTRL,
+		              PWR_PON_HP_EN | PWR_PON_DAC_EN | PWR_PON_BIAS_EN);
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+	
+#else //Use WSPLL	
+	if(i2sClockFreq >= 6250 && i2sClockFreq < 12500)
+		clk = EVALCLK_WSPLL_SEL6_12K;
+	else if(i2sClockFreq >= 12501 && i2sClockFreq < 25000)  
+		clk = EVALCLK_WSPLL_SEL12_25K;
+	else if(i2sClockFreq >= 25001 && i2sClockFreq < 50000)
+		clk = EVALCLK_WSPLL_SEL25_50K;
+	else if(i2sClockFreq >= 50001 && i2sClockFreq < 100000)
+		clk = EVALCLK_WSPLL_SEL50_100K;
+	else
+		clk= 0;
+		
+	ret = Uda1380_WriteData(UDA1380_REG_EVALCLK, 
+	                 EVALCLK_DEC_EN | EVALCLK_DAC_EN | EVALCLK_INT_EN | EVALCLK_DAC_SEL_WSPLL | clk);
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+	
+	ret = Uda1380_WriteData(UDA1380_REG_PWRCTRL,
+		              PWR_PON_PLL_EN | PWR_PON_HP_EN | PWR_PON_DAC_EN | PWR_PON_BIAS_EN);
+	if(ret != UDA1380_FUNC_OK)
+		return ret;
+#endif
+	return UDA1380_FUNC_OK;
+}
+
+/*********************************************************************//**
+ * @brief 		Write data to a register of Uda1380
+ * @param[in]	reg	Register address
+ * @param[out] data  data value.
+ * @return 		None
+ **********************************************************************/
+int32_t Uda1380_WriteData(uint8_t reg, uint16_t data)
+{
+	I2C_M_SETUP_Type i2cData;
+	uint8_t i2cBuf[UDA1380_CMD_BUFF_SIZE];
+
+	i2cBuf[0] = reg;
+	i2cBuf[1] = (data >> 8) & 0xFF;
+	i2cBuf[2] = data & 0xFF;
+	
+	i2cData.sl_addr7bit = UDA1380_SLAVE_ADDR;
+	i2cData.tx_length = UDA1380_CMD_BUFF_SIZE;
+    i2cData.tx_data = i2cBuf;
+	i2cData.rx_data = NULL;
+	i2cData.rx_length = 0;
+	i2cData.retransmissions_max = 3;	
+	
+	if (I2C_MasterTransferData(UDA1380_I2C, &i2cData, I2C_TRANSFER_POLLING) == SUCCESS)
+	{
+	    uint16_t dataTmp; 
+	    if(Uda1380_ReadData(reg, &dataTmp) != UDA1380_FUNC_OK) {
+			return UDA1380_FUNC_ERR;
+	    }
+		if(dataTmp != data)
+			return UDA1380_FUNC_ERR;
+		
+		return UDA1380_FUNC_OK;
+	}
+
+	return UDA1380_FUNC_ERR;
+}
+
+
+/*********************************************************************//**
+ * @brief 		Read data stored in register of Uda1380
+ * @param[in]	reg	Register address
+ * @param[out] data  point to the buffer which is used for storing data.
+ * @return 		None
+ **********************************************************************/
+int32_t Uda1380_ReadData(uint8_t reg, uint16_t *data)
+{
+	I2C_M_SETUP_Type i2cData;
+	uint8_t i2cBuf[UDA1380_CMD_BUFF_SIZE];
+
+	if(data == NULL)
+		return UDA1380_FUNC_ERR;
+
+	i2cBuf[0] = reg;
+	
+	i2cData.sl_addr7bit = UDA1380_SLAVE_ADDR;
+	i2cData.tx_length = 1;
+    i2cData.tx_data = i2cBuf;
+	i2cData.rx_data = &i2cBuf[1];
+	i2cData.rx_length = UDA1380_CMD_BUFF_SIZE - 1;
+	i2cData.retransmissions_max = 3;	
+	
+	if (I2C_MasterTransferData(UDA1380_I2C, &i2cData, I2C_TRANSFER_POLLING) == SUCCESS)
+	{
+	    *data = i2cBuf[1] << 8 | i2cBuf[2];
+		return UDA1380_FUNC_OK;
+	}
+
+	return UDA1380_FUNC_ERR;
+}
+
+#endif
+
diff --git a/hw/bsp/ea4357/oem_base_board/uda1380.h b/hw/bsp/ea4357/oem_base_board/uda1380.h
new file mode 100644
index 000000000..b953cf501
--- /dev/null
+++ b/hw/bsp/ea4357/oem_base_board/uda1380.h
@@ -0,0 +1,93 @@
+#ifndef _UDA1380_H_
+#define _UDA1380_H_
+
+#include "lpc_types.h"
+
+#define UDA1380_SYSCLK_USED 0
+#define UDA1380_SLAVE_ADDR  0x1A
+#define UDA1380_CMD_BUFF_SIZE 3
+
+/** UDA1380 Registers */
+#define UDA1380_REG_EVALCLK	0x00
+#define UDA1380_REG_I2S		0x01
+#define UDA1380_REG_PWRCTRL	0x02
+#define UDA1380_REG_ANAMIX	0x03
+#define UDA1380_REG_HEADAMP	0x04
+#define UDA1380_REG_MSTRVOL	0x10
+#define UDA1380_REG_MIXVOL	0x11
+#define UDA1380_REG_MODEBBT	0x12
+#define UDA1380_REG_MSTRMUTE  0x13
+#define UDA1380_REG_MIXSDO	  0x14
+#define UDA1380_REG_DECVOL	  0x20
+#define UDA1380_REG_PGA		  0x21
+#define UDA1380_REG_ADC		  0x22
+#define UDA1380_REG_AGC		  0x23
+#define UDA1380_REG_L3		  0x7f
+#define UDA1380_REG_HEADPHONE 0x18
+#define UDA1380_REG_DEC		  0x28
+
+// UDA1380_REG_EVALCLK bit defines
+#define EVALCLK_ADC_EN           0x0800  // Enable ADC clock
+#define EVALCLK_DEC_EN           0x0400  // Enable decimator clock
+#define EVALCLK_DAC_EN           0x0200  // Enable DAC clock
+#define EVALCLK_INT_EN           0x0100  // Enable interpolator clock
+#define EVALCLK_ADC_SEL_WSPLL   0x0020  // Select SYSCLK input for ADC clock
+#define EVALCLK_ADC_SEL_SYSCLK    0x0000  // Select WSPLL clock for ADC clock
+#define EVALCLK_DAC_SEL_WSPLL   0x0010  // Select SYSCLK input for DAC clock
+#define EVALCLK_DAC_SEL_SYSCLK    0x0000  // Select WSPLL clock for DAC clock
+#define EVALCLK_SYSDIV_SEL(n)    ((n) << 2) // System clock input divider select
+#define EVALCLK_WSPLL_SEL6_12K   0x0000  // WSPLL input freq selection = 6.25 to 12.5K
+#define EVALCLK_WSPLL_SEL12_25K  0x0001  // WSPLL input freq selection = 12.5K to 25K
+#define EVALCLK_WSPLL_SEL25_50K  0x0002  // WSPLL input freq selection = 25K to 50K
+#define EVALCLK_WSPLL_SEL50_100K 0x0003  // WSPLL input freq selection = 50K to 100K
+
+// UDA1380_REG_I2S
+#define I2S_SFORI_I2S 0x0000
+#define I2S_SFORI_LSB16 0x0100
+#define I2S_SFORI_LSB18 0x0200
+#define I2S_SFORI_LSB20 0x0300
+#define I2S_SFORI_MSB 0x0500
+#define I2S_SFORI_MASK 0x0700
+#define I2S_SFORO_I2S 0x0000
+#define I2S_SFORO_LSB16 0x0001
+#define I2S_SFORO_LSB18 0x0002
+#define I2S_SFORO_LSB20 0x0003
+#define I2S_SFORO_LSB24 0x0004
+#define I2S_SFORO_MSB 0x0005
+#define I2S_SFORO_MASK 0x0007
+#define I2S_SEL_SOURCE 0x0040
+#define I2S_SIM 0x0010
+
+// UDA1380_REG_PWRCTRL bit defines 
+#define PWR_PON_PLL_EN           0x8000  // WSPLL enable
+#define PWR_PON_HP_EN            0x2000  // Headphone driver enable
+#define PWR_PON_DAC_EN           0x0400  // DAC power enable
+#define PWR_PON_BIAS_EN          0x0100  // Power on bias enable (for ADC, AVC, and FSDAC)
+#define PWR_EN_AVC_EN            0x0080  // Analog mixer enable
+#define PWR_PON_AVC_EN           0x0040  // Analog mixer power enable
+#define PWR_EN_LNA_EN            0x0010  // LNA and SDC power enable
+#define PWR_EN_PGAL_EN           0x0008  // PGA left power enable
+#define PWR_EN_ADCL_EN           0x0004  // ADC left power enable
+#define PWR_EN_PGAR_EN           0x0002  // PGA right power enable
+#define PWR_EN_ADCR_EN           0x0001  // ADC right power enable
+
+// UDA1380_REG_MSTRMUTE bit defines
+#define MSTRMUTE_MTM_MUTE_EN     0x4000  // Master mute enable
+#define MSRTMUTE_CHANNEL2_MUTE_EN 0x0800 
+#define MSRTMUTE_CHANNEL1_MUTE_EN 0x0008
+
+
+// UDA1380_REG_MODEBBT bit defines
+#define MODEBBT_BOOST_FLAT       0x0000  // Bits for selecting flat boost
+#define MODEBBT_BOOST_FULL       0xC000  // Bits for selecting maximum boost
+#define MODEBBT_BOOST_MASK       0xC000  // Bits for selecting boost mask
+
+#define UDA1380_FUNC_OK          0
+#define UDA1380_FUNC_ERR         -1
+
+int32_t Uda1380_Init(uint32_t i2cClockFreq, uint32_t i2sClockFreq);
+int32_t Uda1380_WriteData(uint8_t reg, uint16_t data);
+int32_t Uda1380_ReadData(uint8_t reg, uint16_t *data);
+
+
+#endif /* _UDA1380_H_ */
diff --git a/hw/bsp/ea4357/sdram.c b/hw/bsp/ea4357/sdram.c
new file mode 100644
index 000000000..68c67cf52
--- /dev/null
+++ b/hw/bsp/ea4357/sdram.c
@@ -0,0 +1,272 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+
+
+
+/******************************************************************************
+ * Includes
+ *****************************************************************************/
+#include "../board.h"
+
+#if BOARD == BOARD_EA4357
+
+#include "LPC43xx.h"
+#include "lpc_types.h"
+#include "lpc43xx_scu.h"
+#include "lpc43xx_timer.h"
+#include "lpc43xx_cgu.h"
+#include "sdram.h"
+#include <string.h>
+
+/******************************************************************************
+ * Defines and typedefs
+ *****************************************************************************/
+
+/* SDRAM refresh time to 16 clock num */
+#define EMC_SDRAM_REFRESH(freq,time)  \
+  (((uint64_t)((uint64_t)time * freq)/16000000000ull)+1)
+
+/******************************************************************************
+ * External global variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local variables
+ *****************************************************************************/
+
+/******************************************************************************
+ * Local Functions
+ *****************************************************************************/
+
+
+/*-------------------------PRIVATE FUNCTIONS------------------------------*/
+/*********************************************************************
+ * @brief		Calculate EMC Clock from nano second
+ * @param[in]	freq - frequency of EMC Clk
+ * @param[in]	time - nano second
+ * @return 		None
+ **********************************************************************/
+uint32_t NS2CLK(uint32_t freq, uint32_t time){
+ return (((uint64_t)time*freq/1000000000));
+}
+
+static void pinConfig(void)
+{
+	/* Set up EMC pin */
+	scu_pinmux(	 2	,	 9	,	MD_PLN_FAST	,	3	);//A0
+	scu_pinmux(	 2	,	10	,	MD_PLN_FAST	,	3	);//A1
+	scu_pinmux(	 2	,	11	,	MD_PLN_FAST	,	3	);//A2
+	scu_pinmux(	 2	,	12	,	MD_PLN_FAST	,	3	);//A3
+	scu_pinmux(	 2	,	13	,	MD_PLN_FAST	,	3	);//A4
+	scu_pinmux(	 1	,	 0	,	MD_PLN_FAST	,	2	);//A5
+	scu_pinmux(	 1	,	 1	,	MD_PLN_FAST	,	2	);//A6
+	scu_pinmux(	 1	,	 2	,	MD_PLN_FAST	,	2	);//A7
+	scu_pinmux(	 2	,	 8	,	MD_PLN_FAST	,	3	);//A8
+	scu_pinmux(	 2	,	 7	,	MD_PLN_FAST	,	3	);//A9
+	scu_pinmux(	 2	,	 6	,	MD_PLN_FAST	,	2	);//A10
+	scu_pinmux(	 2	,	 2	,	MD_PLN_FAST	,	2	);//A11
+	scu_pinmux(	 2	,	 1	,	MD_PLN_FAST	,	2	);//A12
+	scu_pinmux(	 2	,	 0	,	MD_PLN_FAST	,	2	);//A13
+	scu_pinmux(	 6	,	 8	,	MD_PLN_FAST	,	1	);//A14
+	scu_pinmux(	 6	,	 7	,	MD_PLN_FAST	,	1	);//A15
+	scu_pinmux(	13	,	16	,	MD_PLN_FAST	,	2	);//A16
+	scu_pinmux(	13	,	15	,	MD_PLN_FAST	,	2	);//A17
+	scu_pinmux(	14	,	 0	,	MD_PLN_FAST	,	3	);//A18
+	scu_pinmux(	14	,	 1	,	MD_PLN_FAST	,	3	);//A19
+	scu_pinmux(	14	,	 2	,	MD_PLN_FAST	,	3	);//A20
+	scu_pinmux(	14	,	 3	,	MD_PLN_FAST	,	3	);//A21
+	scu_pinmux(	14	,	 4	,	MD_PLN_FAST	,	3	);//A22
+	scu_pinmux(	10	,	 4	,	MD_PLN_FAST	,	3	);//A23
+	
+	scu_pinmux(	 1	,	 7	,	MD_PLN_FAST	,	3	);//D0
+	scu_pinmux(	 1	,	 8	,	MD_PLN_FAST	,	3	);//D1
+	scu_pinmux(	 1	,	 9	,	MD_PLN_FAST	,	3	);//D2
+	scu_pinmux(	 1	,	10	,	MD_PLN_FAST	,	3	);//D3
+	scu_pinmux(	 1	,	11	,	MD_PLN_FAST	,	3	);//D4
+	scu_pinmux(	 1	,	12	,	MD_PLN_FAST	,	3	);//D5
+	scu_pinmux(	 1	,	13	,	MD_PLN_FAST	,	3	);//D6
+	scu_pinmux(	 1	,	14	,	MD_PLN_FAST	,	3	);//D7
+	scu_pinmux(	 5	,	 4	,	MD_PLN_FAST	,	2	);//D8
+	scu_pinmux(	 5	,	 5	,	MD_PLN_FAST	,	2	);//D9
+	scu_pinmux(	 5	,	 6	,	MD_PLN_FAST	,	2	);//D10
+	scu_pinmux(	 5	,	 7	,	MD_PLN_FAST	,	2	);//D11
+	scu_pinmux(	 5	,	 0	,	MD_PLN_FAST	,	2	);//D12
+	scu_pinmux(	 5	,	 1	,	MD_PLN_FAST	,	2	);//D13
+	scu_pinmux(	 5	,	 2	,	MD_PLN_FAST	,	2	);//D14
+	scu_pinmux(	 5	,	 3	,	MD_PLN_FAST	,	2	);//D15
+	scu_pinmux(	13	,	 2	,	MD_PLN_FAST	,	2	);//D16
+	scu_pinmux(	13	,	 3	,	MD_PLN_FAST	,	2	);//D17
+	scu_pinmux(	13	,	 4	,	MD_PLN_FAST	,	2	);//D18
+	scu_pinmux(	13	,	 5	,	MD_PLN_FAST	,	2	);//D19
+	scu_pinmux(	13	,	 6	,	MD_PLN_FAST	,	2	);//D20
+	scu_pinmux(	13	,	 7	,	MD_PLN_FAST	,	2	);//D21
+	scu_pinmux(	13	,	 8	,	MD_PLN_FAST	,	2	);//D22
+	scu_pinmux(	13	,	 9	,	MD_PLN_FAST	,	2	);//D23
+	scu_pinmux(	14	,	 5	,	MD_PLN_FAST	,	3	);//D24
+	scu_pinmux(	14	,	 6	,	MD_PLN_FAST	,	3	);//D25
+	scu_pinmux(	14	,	 7	,	MD_PLN_FAST	,	3	);//D26
+	scu_pinmux(	14	,	 8	,	MD_PLN_FAST	,	3	);//D27
+	scu_pinmux(	14	,	 9	,	MD_PLN_FAST	,	3	);//D28
+	scu_pinmux(	14	,	10	,	MD_PLN_FAST	,	3	);//D29
+	scu_pinmux(	14	,	11	,	MD_PLN_FAST	,	3	);//D30
+	scu_pinmux(	14	,	12	,	MD_PLN_FAST	,	3	);//D31
+		
+	scu_pinmux(	 1	,	 3	,	MD_PLN_FAST	,	3	);//OE
+	scu_pinmux(	 1	,	 6	,	MD_PLN_FAST	,	3	);//WE
+	
+	scu_pinmux(	 1	,	 4	,	MD_PLN_FAST	,	3	);//BLS0
+	scu_pinmux(	 6	,	 6	,	MD_PLN_FAST	,	1	);//BLS1	
+	scu_pinmux(	13	,	13	,	MD_PLN_FAST	,	2	);//BLS2
+	scu_pinmux(	13	,	10	,	MD_PLN_FAST	,	2	);//BLS3
+	
+	scu_pinmux(	 1	,	 5	,	MD_PLN_FAST	,	3	);//CS0	
+	scu_pinmux(	 6	,	 3	,	MD_PLN_FAST	,	3	);//CS1
+	scu_pinmux(	13	,	12	,	MD_PLN_FAST	,	2	);//CS2
+	scu_pinmux(	13	,	11	,	MD_PLN_FAST	,	2	);//CS3
+	
+	scu_pinmux(	 6	,	 4	,	MD_PLN_FAST	,	3	);//CAS
+	scu_pinmux(	 6	,	 5	,	MD_PLN_FAST	,	3	);//RAS
+	
+	scu_pinmux(  6	,	 9	,	MD_PLN_FAST	,	3	);//DYCS0
+	scu_pinmux(	 6	,	 1	,	MD_PLN_FAST	,	1	);//DYCS1
+	scu_pinmux(	13	,	14	,	MD_PLN_FAST	,	2	);//DYCS2
+	scu_pinmux(	15	,	14	,	MD_PLN_FAST	,	3	);//DYCS3
+
+	scu_pinmux(	 6	,	11	,	MD_PLN_FAST	,	3	);//CKEOUT0
+	scu_pinmux(	 6	,	 2	,	MD_PLN_FAST	,	1	);//CKEOUT1
+	scu_pinmux(	13	,	 1	,	MD_PLN_FAST	,	2	);//CKEOUT2
+	scu_pinmux(	14	,	15	,	MD_PLN_FAST	,	3	);//CKEOUT3
+	
+	scu_pinmux(	 6	,	12	,	MD_PLN_FAST	,	3	);//DQMOUT0
+	scu_pinmux(	 6	,	10	,	MD_PLN_FAST	,	3	);//DQMOUT1
+	scu_pinmux(	13	,	 0	,	MD_PLN_FAST	,	2	);//DQMOUT2
+	scu_pinmux(	14	,	13	,	MD_PLN_FAST	,	3	);//DQMOUT3
+}
+
+
+
+/******************************************************************************
+ * Public Functions
+ *****************************************************************************/
+
+
+/******************************************************************************
+ *
+ * Description:
+ *    Initialize the SDRAM
+ *
+ *****************************************************************************/
+uint32_t sdram_init (void)
+{
+	uint32_t pclk, temp;
+ 	uint64_t tmpclk;
+  
+  pinConfig(); //Full 32-bit Data bus, 24-bit Address 
+    
+	/* Select EMC clock-out */
+	LPC_SCU->SFSCLK_0 = MD_PLN_FAST;
+	LPC_SCU->SFSCLK_1 = MD_PLN_FAST;
+	LPC_SCU->SFSCLK_2 = MD_PLN_FAST;
+	LPC_SCU->SFSCLK_3 = MD_PLN_FAST;
+
+	LPC_EMC->CONTROL 	= 0x00000001;
+	LPC_EMC->CONFIG  	= 0x00000000;
+  LPC_EMC->DYNAMICCONFIG0    = 1<<14 | 0<<12 | 2<<9 | 1<<7; /* 256Mb, 8Mx32, 4 banks, row=12, column=9 */
+
+	pclk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE);
+
+  LPC_EMC->DYNAMICRASCAS0    = 0x00000202; /* 2 RAS, 2 CAS latency */
+	LPC_EMC->DYNAMICREADCONFIG = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
+  
+	LPC_EMC->DYNAMICRP         = NS2CLK(pclk, 20);
+	LPC_EMC->DYNAMICRAS        = NS2CLK(pclk, 42);
+	LPC_EMC->DYNAMICSREX       = NS2CLK(pclk, 63);
+	LPC_EMC->DYNAMICAPR        = 0x00000005;
+	LPC_EMC->DYNAMICDAL        = 0x00000005;
+	LPC_EMC->DYNAMICWR         = 2;
+	LPC_EMC->DYNAMICRC         = NS2CLK(pclk, 63);
+	LPC_EMC->DYNAMICRFC        = NS2CLK(pclk, 63);
+	LPC_EMC->DYNAMICXSR        = NS2CLK(pclk, 63);
+	LPC_EMC->DYNAMICRRD        = NS2CLK(pclk, 14);
+	LPC_EMC->DYNAMICMRD        = 0x00000002;
+
+	TIM_Waitus(100);						   /* wait 100ms */
+	LPC_EMC->DYNAMICCONTROL    = 0x00000183; /* Issue NOP command */
+
+	TIM_Waitus(200);						   /* wait 200ms */
+	LPC_EMC->DYNAMICCONTROL    = 0x00000103; /* Issue PALL command */
+
+	LPC_EMC->DYNAMICREFRESH    = EMC_SDRAM_REFRESH(pclk,70); /* ( n * 16 ) -> 32 clock cycles */
+
+	//for(i = 0; i < 0x80; i++);	           /* wait 128 AHB clock cycles */
+	TIM_Waitus(200);						   /* wait 200ms */
+
+	tmpclk = (uint64_t)15625*(uint64_t)pclk/1000000000/16;
+	LPC_EMC->DYNAMICREFRESH    = tmpclk; /* ( n * 16 ) -> 736 clock cycles -> 15.330uS at 48MHz <= 15.625uS ( 64ms / 4096 row ) */
+
+	LPC_EMC->DYNAMICCONTROL    = 0x00000083; /* Issue MODE command */
+
+	//Timing for 48/60/72MHZ Bus
+	temp = *((volatile uint32_t *)(SDRAM_BASE | (2<<4| 2)<<(9+2+2))); /* 4 burst, 2 CAS latency */
+	temp = temp;
+	LPC_EMC->DYNAMICCONTROL    = 0x00000000; /* Issue NORMAL command */
+
+	//[re]enable buffers
+	LPC_EMC->DYNAMICCONFIG0    |= 1<<19;
+
+  return TRUE;
+}
+
+uint32_t sdram_test( void )
+{
+  volatile uint32_t *wr_ptr; 
+  volatile uint16_t *short_wr_ptr;
+  uint32_t data;
+  uint32_t i, j;
+
+  wr_ptr = (uint32_t *)SDRAM_BASE;
+  short_wr_ptr = (uint16_t *)wr_ptr;
+    
+  /* 16 bit write */
+  for (i = 0; i < SDRAM_SIZE/0x40000; i++)
+  {
+    for (j = 0; j < 0x100; j++)
+    {
+      *short_wr_ptr++ = (i + j) & 0xFFFF;
+      *short_wr_ptr++ = ((i + j) + 1) & 0xFFFF;
+    }
+  }
+
+  /* Verifying */
+  wr_ptr = (uint32_t *)SDRAM_BASE;
+  for (i = 0; i < SDRAM_SIZE/0x40000; i++)
+  {
+    for (j = 0; j < 0x100; j++)
+    {
+      data = *wr_ptr;          
+      if (data != (((((i + j) + 1) & 0xFFFF) << 16) | ((i + j) & 0xFFFF)))
+      {
+        return 0x0;
+      }
+      wr_ptr++;
+    }
+  }
+  return 0x1;
+}
+
+#endif
diff --git a/hw/bsp/ea4357/sdram.h b/hw/bsp/ea4357/sdram.h
new file mode 100644
index 000000000..82122b9f8
--- /dev/null
+++ b/hw/bsp/ea4357/sdram.h
@@ -0,0 +1,31 @@
+/*****************************************************************************
+ *
+ *   Copyright(C) 2011, Embedded Artists AB
+ *   All rights reserved.
+ *
+ ******************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * Embedded Artists AB assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. Embedded Artists AB
+ * reserves the right to make changes in the software without
+ * notification. Embedded Artists AB also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ *****************************************************************************/
+#ifndef __SDRAM_H
+#define __SDRAM_H
+
+#define SDRAM_SIZE               0x2000000  /* 256Mbit = 32MB */
+
+#define SDRAM_BASE               0x28000000 /*CS0*/
+
+extern uint32_t sdram_init(void);
+extern uint32_t sdram_test(void);
+
+#endif /* end __SDRAM_H */
+/****************************************************************************
+**                            End Of File
+*****************************************************************************/