move lpc18 and rp2040 to cmake workflow since rp2040 often failed randomly with make

3 files changed, 30 insertions, 8 deletions

diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
index 4c6058d27..421106f08 100644
--- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -49,10 +49,10 @@ extern uint32_t SystemCoreClock;
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU								        0
-#define configENABLE_FPU								        1
-#define configENABLE_TRUSTZONE					        0
-#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
new file mode 100644
index 000000000..7c46c075e
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -0,0 +1,16 @@
+set(MCU_VARIANT LPC55S69)
+set(MCU_CORE LPC55S69_cm33_core0)
+
+set(JLINK_DEVICE LPC55S69)
+set(PYOCD_TARGET LPC55S69)
+set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC55S69JBD100_cm33_core0
+    # port 1 is highspeed
+    BOARD_TUD_RHPORT=1
+    )
+endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 1b9c1a655..77a2b821e 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -34,8 +34,6 @@ endif()
 set(BOARD_TARGET board_${BOARD})
 if (NOT TARGET ${BOARD_TARGET})
   add_library(${BOARD_TARGET} STATIC
-    # external driver
-    #lib/sct_neopixel/sct_neopixel.c
     # driver
     ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -48,15 +46,17 @@ if (NOT TARGET ${BOARD_TARGET})
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CFG_TUSB_MCU=OPT_MCU_LPC55XX
+    CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
+    ${TOP}/lib/sct_neopixel
     # driver
     ${SDK_DIR}/drivers/common
     ${SDK_DIR}/drivers/flexcomm
     ${SDK_DIR}/drivers/lpc_iocon
     ${SDK_DIR}/drivers/lpc_gpio
     ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/sctimer
     # mcu
     ${CMSIS_DIR}/CMSIS/Core/Include
     ${SDK_DIR}/devices/${MCU_VARIANT}
@@ -64,13 +64,17 @@ if (NOT TARGET ${BOARD_TARGET})
     )
   update_board(${BOARD_TARGET})
 
+  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
+    set(LD_FILE_gcc ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  endif ()
+
   if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
-      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
+      "LINKER:--script=${LD_FILE_gcc}"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -95,6 +99,8 @@ function(family_configure_example TARGET)
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    # external driver
+    ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board