Merge branch 'master' into merge_osmerge_os

6 files changed, 23 insertions, 10 deletions

diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
index fdc17374b..718c46bbf 100644
--- a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
@@ -4,8 +4,7 @@ MCU_DRV = 11xx
 CFLAGS += \
   -DCORE_M0 \
   -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'
+  -DCFG_EXAMPLE_VIDEO_READONLY
 
 # mcu driver cause following warnings
 CFLAGS += \
diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
index 8e0a4e4c6..b7237a3ec 100644
--- a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
@@ -172,6 +172,22 @@ SECTIONS
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc8
+    /* Main (MSP/ISR) stack lives at the top of the USB SRAM bank: the 8K main bank is packed so
+       tight that only ~280 B remained above .bss, and ISR frames overflowed into the topmost task
+       stack (cdc_msc_freertos hard fault). Nothing else is placed in this bank in either build
+       system, so the stack owns all 2 KB; the ASSERT is future-proofing in case USB buffers are
+       ever mapped here again.
+
+       This bank is clocked by SYSAHBCLKCTRL[27] (USBRAM enable), and the stack is used from the
+       first instruction of the reset handler - long before any TinyUSB or BSP code could turn a
+       clock on. It works because the boot ROM hands over with that bit already set. Anything that
+       gates the USB RAM clock to save power will hard fault at reset, not at USB init. */
+    __user_stack_top = ORIGIN(RamUsb2) + LENGTH(RamUsb2);
+    /* Stated as an addition, not a subtraction: ld arithmetic is unsigned, so an overflowing
+       bank would underflow the difference into a huge positive value and pass silently. */
+    ASSERT(ADDR(.noinit_RAM2) + SIZEOF(.noinit_RAM2) + 0x200 <= __user_stack_top,
+           "main stack headroom in RamUsb2 below 512 bytes")
+
     PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0);
 
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
index b3d6ec722..d7992eec6 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
@@ -8,10 +8,6 @@ set(JLINK_OPTION "-USB 000727031389")
 set(PYOCD_TARGET LPC55S28)
 set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
 
-# device fullspeed, host highspeed
-set(RHPORT_DEVICE 0)
-set(RHPORT_HOST 1)
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S28JBD100
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
index db2e11fd7..aecb5a100 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
@@ -2,9 +2,9 @@ MCU_VARIANT = LPC55S28
 MCU_CORE = LPC55S28
 MCU_DRIVER_VARIANT = LPC55S69
 
-# device fullspeed, host highspeed
-RHPORT_DEVICE ?= 0
-RHPORT_HOST ?= 1
+# device highspeed, host fullspeed
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 0
 
 CFLAGS += -DCPU_LPC55S28JBD100
 
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index a9b6f6af1..a640cc793 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -36,6 +36,8 @@ ifeq ($(RHPORT_HOST), 1)
 	SRC_C += $(TOP)/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
 else
   CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
+  # host on port 0 uses the OHCI controller (mirrors family.cmake)
+  SRC_C += $(TOP)/src/portable/ohci/ohci.c
 endif
 
 # mcu driver cause following warnings
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 60f43e152..b2b4fd45b 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -95,7 +95,7 @@ function(family_configure_example TARGET RTOS)
   endif()
 
   # PORT is set per board (board.cmake), so pick the driver at configure time. Spelled out
-  # rather than $<IF:${PORT},...> so the port path stays greppable: test/hil/hil_select.py
+  # rather than $<IF:${PORT},...> so the port path stays greppable: test/hil/helper/hil_select.py
   # maps a portable-driver change to the families whose build file names that directory.
   if (PORT)
     set(PORT_SRC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c)