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authorhathach <[email protected]>2025-03-26 21:13:01 +0700
committerhathach <[email protected]>2025-03-26 21:32:18 +0700
commit901ce2ad93b39c08e8e6b7e5b3f4dbd0b9df879e (patch)
tree27959d28ffed7d77d288f5680617bc5c01a707d9 /hw
parent1615120bca3c482b7ba3b2d5620393354acf9c81 (diff)
hcd/ehci: hcd_edpt_open() return false if ep is already opened. implement hcd_edpt_close()
Diffstat (limited to 'hw')
-rw-r--r--hw/bsp/imxrt/family.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 7b89cc76d..7e4734a66 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -61,7 +61,7 @@
- Define CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))
*/
-static void BOARD_ConfigMPU(void);
+// static void BOARD_ConfigMPU(void);
// needed by fsl_flexspi_nor_boot
TU_ATTR_USED const uint8_t dcd_data[] = {0x00};
@@ -456,7 +456,7 @@ static void BOARD_ConfigMPU(void) {
#elif __CORTEX_M == 4
-void BOARD_ConfigMPU(void) {
+static void BOARD_ConfigMPU(void) {
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
extern uint32_t Image$$RW_m_ncache$$Base[];
/* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */