diff options
| author | HiFiPhile <[email protected]> | 2021-07-17 12:10:35 +0200 |
|---|---|---|
| committer | GitHub <[email protected]> | 2021-07-17 12:10:35 +0200 |
| commit | b194aa240bba9211e01dd9eaf4562e00a7215666 (patch) | |
| tree | b9ef8962f6fdac517e7fc8575526f6cdec8467c1 /hw | |
| parent | 475742984f4d0f2b95c9c78dfff71814117feb90 (diff) | |
| parent | 21bfd11683c4bb6e0996130bd1061a97d3049121 (diff) | |
Merge branch 'master' into dcd_same70
Diffstat (limited to 'hw')
32 files changed, 1017 insertions, 211 deletions
diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 383a02ef4..6a26f55b7 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -25,7 +25,60 @@ #include "board.h" -#if defined(__MSP430__) +#if 0 +#define LED_PHASE_MAX 8 + +static struct +{ + uint32_t phase[LED_PHASE_MAX]; + uint8_t phase_count; + + bool led_state; + uint8_t current_phase; + uint32_t current_ms; +}led_pattern; + +void board_led_pattern(uint32_t const phase_ms[], uint8_t count) +{ + memcpy(led_pattern.phase, phase_ms, 4*count); + led_pattern.phase_count = count; + + // reset with 1st phase is on + led_pattern.current_ms = board_millis(); + led_pattern.current_phase = 0; + led_pattern.led_state = true; + board_led_on(); +} + +void board_led_task(void) +{ + if ( led_pattern.phase_count == 0 ) return; + + uint32_t const duration = led_pattern.phase[led_pattern.current_phase]; + + // return if not enough time + if (board_millis() - led_pattern.current_ms < duration) return; + + led_pattern.led_state = !led_pattern.led_state; + board_led_write(led_pattern.led_state); + + led_pattern.current_ms += duration; + led_pattern.current_phase++; + + if (led_pattern.current_phase == led_pattern.phase_count) + { + led_pattern.current_phase = 0; + led_pattern.led_state = true; + board_led_on(); + } +} +#endif + +//--------------------------------------------------------------------+ +// newlib read()/write() retarget +//--------------------------------------------------------------------+ + +#if defined(__MSP430__) || defined(__RX__) #define sys_write write #define sys_read read #else @@ -33,10 +86,6 @@ #define sys_read _read #endif -//--------------------------------------------------------------------+ -// newlib read()/write() retarget -//--------------------------------------------------------------------+ - #if defined(LOGGER_RTT) // Logging with RTT diff --git a/hw/bsp/board.h b/hw/bsp/board.h index 7b77def50..782e0939c 100644 --- a/hw/bsp/board.h +++ b/hw/bsp/board.h @@ -54,6 +54,10 @@ void board_init(void); // Turn LED on or off void board_led_write(bool state); +// Control led pattern using phase duration in ms. +// For each phase, LED is toggle then repeated, board_led_task() is required to be called +//void board_led_pattern(uint32_t const phase_ms[], uint8_t count); + // Get the current state of button // a '1' means active (pressed), a '0' means inactive. uint32_t board_button_read(void); @@ -81,11 +85,12 @@ int board_uart_write(void const * buf, int len); } #elif CFG_TUSB_OS == OPT_OS_PICO -#include "pico/time.h" -static inline uint32_t board_millis(void) + #include "pico/time.h" + static inline uint32_t board_millis(void) { return to_ms_since_boot(get_absolute_time()); } + #elif CFG_TUSB_OS == OPT_OS_RTTHREAD static inline uint32_t board_millis(void) { diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index 1a659c410..9f6b489ea 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -54,7 +54,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \ CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \ - CFG_TUSB_MCU == OPT_MCU_SAML22 + CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21 #include "sam.h" #elif CFG_TUSB_MCU == OPT_MCU_SAMG @@ -127,7 +127,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_EFM32GG || CFG_TUSB_MCU == OPT_MCU_EFM32GG11 || CFG_TUSB_MCU == OPT_MCU_EFM32GG12 #include "em_device.h" -#elif CFG_TUSB_MCU == OPT_MCU_RX63X +#elif CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X // no header needed #else diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake index 9eb1627a1..f3d41d041 100644 --- a/hw/bsp/esp32s2/family.cmake +++ b/hw/bsp/esp32s2/family.cmake @@ -4,7 +4,4 @@ cmake_minimum_required(VERSION 3.5) set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s2) - -# include basic family CMake functionality set(FAMILY_MCUS ESP32S2) -include(${CMAKE_CURRENT_LIST_DIR}/../family_common.cmake) diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake index c99c3728b..511dd58bb 100644 --- a/hw/bsp/esp32s3/family.cmake +++ b/hw/bsp/esp32s3/family.cmake @@ -4,7 +4,4 @@ cmake_minimum_required(VERSION 3.5) set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components") include($ENV{IDF_PATH}/tools/cmake/project.cmake) set(SUPPORTED_TARGETS esp32s3) - -# include basic family CMake functionality set(FAMILY_MCUS ESP32S3) -include(${CMAKE_CURRENT_LIST_DIR}/../family_common.cmake) diff --git a/hw/bsp/family_common.cmake b/hw/bsp/family_common.cmake deleted file mode 100644 index 2544c58c6..000000000 --- a/hw/bsp/family_common.cmake +++ /dev/null @@ -1,57 +0,0 @@ -if (NOT FAMILY_MCUS) - set(FAMILY_MCUS ${FAMILY}) -endif() - -# save it in case of re-inclusion -set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "") - -function(family_filter RESULT DIR) - get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) - file(GLOB ONLYS "${DIR}/.only.MCU_*") - if (ONLYS) - foreach(MCU IN LISTS FAMILY_MCUS) - if (EXISTS ${DIR}/.only.MCU_${MCU}) - set(${RESULT} 1 PARENT_SCOPE) - return() - endif() - endforeach() - else() - foreach(MCU IN LISTS FAMILY_MCUS) - if (EXISTS ${DIR}/.skip.MCU_${MCU}) - set(${RESULT} 0 PARENT_SCOPE) - return() - endif() - endforeach() - endif() - set(${RESULT} 1 PARENT_SCOPE) -endfunction() - -function(family_add_subdirectory DIR) - family_filter(SHOULD_ADD "${DIR}") - if (SHOULD_ADD) - add_subdirectory(${DIR}) - endif() -endfunction() - -function(family_get_project_name OUTPUT_NAME DIR) - get_filename_component(SHORT_NAME ${DIR} NAME) - set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE) -endfunction() - -function(family_initialize_project PROJECT DIR) - family_filter(ALLOWED "${DIR}") - if (NOT ALLOWED) - get_filename_component(SHORT_NAME ${DIR} NAME) - message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}") - endif() -endfunction() - -# configure an executable target to link to tinyusb in device mode, and add the board implementation -function(family_configure_device_example TARGET) - # default implentation is empty, the function should be redefined in the FAMILY/family.cmake -endfunction() - -# configure an executable target to link to tinyusb in host mode, and add the board implementation -function(family_configure_host_example TARGET) - # default implentation is empty, the function should be redefined in the FAMILY/family.cmake -endfunction() diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake new file mode 100644 index 000000000..af0e00b2d --- /dev/null +++ b/hw/bsp/family_support.cmake @@ -0,0 +1,71 @@ +if (NOT TARGET _family_support_marker) + add_library(_family_support_marker INTERFACE) + + if (NOT FAMILY) + message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the camke command line") + endif() + + if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) + message(FATAL_ERROR "Family '${FAMILY}' is not known/supported") + endif() + + function(family_filter RESULT DIR) + get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) + file(GLOB ONLYS "${DIR}/.only.MCU_*") + if (ONLYS) + foreach(MCU IN LISTS FAMILY_MCUS) + if (EXISTS ${DIR}/.only.MCU_${MCU}) + set(${RESULT} 1 PARENT_SCOPE) + return() + endif() + endforeach() + else() + foreach(MCU IN LISTS FAMILY_MCUS) + if (EXISTS ${DIR}/.skip.MCU_${MCU}) + set(${RESULT} 0 PARENT_SCOPE) + return() + endif() + endforeach() + endif() + set(${RESULT} 1 PARENT_SCOPE) + endfunction() + + function(family_add_subdirectory DIR) + family_filter(SHOULD_ADD "${DIR}") + if (SHOULD_ADD) + add_subdirectory(${DIR}) + endif() + endfunction() + + function(family_get_project_name OUTPUT_NAME DIR) + get_filename_component(SHORT_NAME ${DIR} NAME) + set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE) + endfunction() + + function(family_initialize_project PROJECT DIR) + family_filter(ALLOWED "${DIR}") + if (NOT ALLOWED) + get_filename_component(SHORT_NAME ${DIR} NAME) + message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}") + endif() + endfunction() + + # configure an executable target to link to tinyusb in device mode, and add the board implementation + function(family_configure_device_example TARGET) + # default implentation is empty, the function should be redefined in the FAMILY/family.cmake + endfunction() + + # configure an executable target to link to tinyusb in host mode, and add the board implementation + function(family_configure_host_example TARGET) + # default implentation is empty, the function should be redefined in the FAMILY/family.cmake + endfunction() + + include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) + + if (NOT FAMILY_MCUS) + set(FAMILY_MCUS ${FAMILY}) + endif() + + # save it in case of re-inclusion + set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "") +endif()
\ No newline at end of file diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 752eb0cab..41960b6cd 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -3,7 +3,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker) add_library(_rp2040_family_inclusion_marker INTERFACE) if (NOT BOARD) - message(FATAL_ERROR "BOARD must be specified") + message("BOARD not specified, defaulting to pico_sdk") + set(BOARD pico_sdk) endif() # add the SDK in case we are standalone tinyusb example (noop if already present) @@ -11,7 +12,6 @@ if (NOT TARGET _rp2040_family_inclusion_marker) # include basic family CMake functionality set(FAMILY_MCUS RP2040) - include(${CMAKE_CURRENT_LIST_DIR}/../family_common.cmake) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk new file mode 100644 index 000000000..0eba94610 --- /dev/null +++ b/hw/bsp/rx/boards/gr_citrus/board.mk @@ -0,0 +1,24 @@ +DEPS_SUBMODULES += hw/mcu/renesas/rx + +CFLAGS += \ + -mcpu=rx610 \ + -misa=v1 \ + -DCFG_TUSB_MCU=OPT_MCU_RX63X + +MCU_DIR = hw/mcu/renesas/rx/rx63n + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/r5f5631fd.ld + +# For freeRTOS port source +FREERTOS_PORT = RX600 + +# For flash-jlink target +JLINK_DEVICE = R5F5631F +JLINK_IF = JTAG + +# For flash-pyocd target +PYOCD_TARGET = + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/rx63n/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c index 6697012a7..caf5fd6fa 100644 --- a/hw/bsp/rx63n/boards/gr_citrus/gr_citrus.c +++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c @@ -34,26 +34,22 @@ * * The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2). * - * Connet the pins between GR-CITRUS and JLink as follows. + * Connect the pins between GR-CITRUS and JLink as follows. * - * | JTAG Function | GR-CITRUS pin name| JLink pin No.| note | - * |:-------------:|:-----------------:|:------------:|:--------:| - * | VTref | 3.3V | 1 | | - * | TRST | 5 | 3 | | - * | GND | GND | 4 | | - * | TDI | 3 | 5 | | - * | TMS | 2 | 7 | | - * | TCK | 14 | 9 | short J4 | - * | TDO | 9 | 13 | short J5 | - * | nRES | RST | 15 | | + * | Function | GR-CITRUS pin | JLink pin No.| note | + * |:---------:|:-------------:|:------------:|:--------:| + * | VTref | 3.3V | 1 | | + * | TRST | 5 | 3 | | + * | GND | GND | 4 | | + * | TDI | 3 | 5 | | + * | TMS | 2 | 7 | | + * | TCK/FINEC | 14 | 9 | short J4 | + * | TDO | 9 | 13 | short J5 | + * | nRES | RST | 15 | | * * JLink firmware needs to update to V6.96 or newer version to avoid * [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N) * regarding downloading. - * - * When using SEGGER RTT, `RX_NEWLIB=0` should be added to make command arguments. - * The option is used to change the C runtime library to `optlib` from `newlib`. - * RTT may not work with `newlib`. */ #include "../board.h" @@ -253,3 +249,27 @@ uint32_t board_millis(void) #else uint32_t SystemCoreClock = 96000000; #endif + +int close(int fd) +{ + (void)fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void)fd; + (void)pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void)fd; + (void)pos; + (void)whence; + return 0; +} +int isatty(int fd) +{ + (void)fd; + return 1; +} diff --git a/hw/bsp/rx63n/boards/gr_citrus/hwinit.c b/hw/bsp/rx/boards/gr_citrus/hwinit.c index 8245d7744..8245d7744 100644 --- a/hw/bsp/rx63n/boards/gr_citrus/hwinit.c +++ b/hw/bsp/rx/boards/gr_citrus/hwinit.c diff --git a/hw/bsp/rx63n/boards/gr_citrus/r5f5631fd.ld b/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld index fa8142936..bb9c297c7 100644 --- a/hw/bsp/rx63n/boards/gr_citrus/r5f5631fd.ld +++ b/hw/bsp/rx/boards/gr_citrus/r5f5631fd.ld @@ -1,5 +1,5 @@ -__USTACK_SIZE = 0x00000200; -__ISTACK_SIZE = 0x00000200; +__USTACK_SIZE = 0x00000400; +__ISTACK_SIZE = 0x00000400; MEMORY { diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk new file mode 100644 index 000000000..fc76d79fa --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/board.mk @@ -0,0 +1,25 @@ +CFLAGS += \ + -mcpu=rx64m \ + -misa=v2 \ + -DCFG_TUSB_MCU=OPT_MCU_RX65X \ + -DIR_USB0_USBI0=IR_PERIB_INTB185 \ + -DIER_USB0_USBI0=IER_PERIB_INTB185 \ + -DIEN_USB0_USBI0=IEN_PERIB_INTB185 + +MCU_DIR = hw/mcu/renesas/rx/rx65n + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/r5f565ne.ld + +# For freeRTOS port source +FREERTOS_PORT = RX600 + +# For flash-jlink target +JLINK_DEVICE = R5F565NE +JLINK_IF = JTAG + +# For flash-pyocd target +PYOCD_TARGET = + +# flash using rfp-cli +flash: flash-rfp diff --git a/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld b/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld new file mode 100644 index 000000000..8e5617f23 --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld @@ -0,0 +1,168 @@ +__USTACK_SIZE = 0x00000400; +__ISTACK_SIZE = 0x00000400; + +MEMORY +{ + RAM : ORIGIN = 0x4, LENGTH = 0x3fffc + RAM2 : ORIGIN = 0x00800000, LENGTH = 0x60000 + OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128 + ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000 +} +SECTIONS +{ + .exvectors 0xFFFFFF80: AT(0xFFFFFF80) + { + "_exvectors_start" = .; + KEEP(*(.exvectors)) + "_exvectors_end" = .; + } >ROM + .fvectors 0xFFFFFFFC: AT(0xFFFFFFFC) + { + KEEP(*(.fvectors)) + } > ROM + .text 0xFFE00000: AT(0xFFE00000) + { + *(.text) + *(.text.*) + *(P) + KEEP(*(.text.*_isr)) + etext = .; + } > ROM + .rvectors ALIGN(4): + { + _rvectors_start = .; + KEEP(*(.rvectors)) + _rvectors_end = .; + } > ROM + .init : + { + KEEP(*(.init)) + __preinit_array_start = .; + KEEP(*(.preinit_array)) + __preinit_array_end = .; + __init_array_start = (. + 3) & ~ 3; + KEEP(*(.init_array)) + KEEP(*(SORT(.init_array.*))) + __init_array_end = .; + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > ROM + .fini : + { + KEEP(*(.fini)) + } > ROM + .got : + { + *(.got) + *(.got.plt) + } > ROM + .rodata : + { + *(.rodata) + *(.rodata.*) + *(C_1) + *(C_2) + *(C) + _erodata = .; + } > ROM + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > ROM + .eh_frame : + { + *(.eh_frame) + } > ROM + .jcr : + { + *(.jcr) + } > ROM + .tors : + { + __CTOR_LIST__ = .; + . = ALIGN(2); + ___ctors = .; + *(.ctors) + ___ctors_end = .; + __CTOR_END__ = .; + __DTOR_LIST__ = .; + ___dtors = .; + *(.dtors) + ___dtors_end = .; + __DTOR_END__ = .; + . = ALIGN(2); + _mdata = .; + } > ROM + .data : AT(_mdata) + { + _data = .; + *(.data) + *(.data.*) + *(D) + *(D_1) + *(D_2) + _edata = .; + } > RAM + .gcc_exc : + { + *(.gcc_exc) + } > RAM + .bss : + { + _bss = .; + *(.bss) + *(.bss.**) + *(COMMON) + *(B) + *(B_1) + *(B_2) + _ebss = .; + _end = .; + } > RAM + .ustack : + { + . = ALIGN(8); + . = . + __USTACK_SIZE; + PROVIDE(_ustack = .); + } > RAM + .istack : + { + . = ALIGN(8); + . = . + __ISTACK_SIZE; + PROVIDE(_istack = .); + } > RAM + .ofs1 0xFE7F5D00: AT(0xFE7F5D00) + { + KEEP(*(.ofs1)) + } > OFS + .ofs2 0xFE7F5D10: AT(0xFE7F5D10) + { + KEEP(*(.ofs2)) + } > OFS + .ofs3 0xFE7F5D20: AT(0xFE7F5D20) + { + KEEP(*(.ofs3)) + } > OFS + .ofs4 0xFE7F5D40: AT(0xFE7F5D40) + { + KEEP(*(.ofs4)) + } > OFS + .ofs5 0xFE7F5D48: AT(0xFE7F5D48) + { + KEEP(*(.ofs5)) + } > OFS + .ofs6 0xFE7F5D50: AT(0xFE7F5D50) + { + KEEP(*(.ofs6)) + } > OFS + .ofs7 0xFE7F5D64: AT(0xFE7F5D64) + { + KEEP(*(.ofs7)) + } > OFS + .ofs8 0xFE7F5D70: AT(0xFE7F5D70) + { + KEEP(*(.ofs8)) + } > OFS +} diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c new file mode 100644 index 000000000..20867455e --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -0,0 +1,320 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* How to connect JLink and RX65n Target and option board + * (For original comment https://github.com/hathach/tinyusb/pull/922#issuecomment-869786131) + * + * To enable JTAG, RX65N requires following connections on main board. + * - short EJ2 jumper header, to disable onboard E2L. + * - short EMLE(J1-2) and 3V3(J1-14 or J2-10), to enable In-Circuit Emulator. + * + * Note: For RX65N-Cloud-Kit, the option board's JTAG pins to some switches or floating. + * To use JLink with the option board, I think some further modifications will be necessary. + * + * | Function | RX65N pin | main board | option board | JLink connector | + * |:---------:|:----------:|:----------:|:------------:|:---------------:| + * | 3V3 | VCC | J1-14 | CN5-6 | 1 | + * | TRST | P34 | J1-16 | CN5-7 | 3 | + * | GND | VSS | J1-12 | CN5-5 | 4 | + * | TDI | P30 | J1-20 | CN5-10 | 5 | + * | TMS | P31 | J1-19 | USER_SW | 7 | + * | TCK/FINEC | P27 | J1-21 | N/A | 9 | + * | TDO | P26 | J1-22 | CN5-9 | 13 | + * | nRES | RES# | J1-10 | RESET_SW | 15 | + * + * JLink firmware needs to update to V6.96 or newer version to avoid + * [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N) + * regarding downloading. + */ + +#include "bsp/board.h" +#include "iodefine.h" +#include "interrupt_handlers.h" + +#define IRQ_PRIORITY_CMT0 5 +#define IRQ_PRIORITY_USBI0 6 +#define IRQ_PRIORITY_SCI5 5 + +#define SYSTEM_PRCR_PRC1 (1<<1) +#define SYSTEM_PRCR_PRKEY (0xA5u<<8) + +#define CMT_PCLK 60000000 +#define CMT_CMCR_CKS_DIV_128 2 +#define CMT_CMCR_CMIE (1<<6) +#define MPC_PFS_ISEL (1<<6) + +#define SCI_PCLK 60000000 +#define SCI_SSR_FER (1<<4) +#define SCI_SSR_ORER (1<<5) + +#define SCI_SCR_TEIE (1u<<2) +#define SCI_SCR_RE (1u<<4) +#define SCI_SCR_TE (1u<<5) +#define SCI_SCR_RIE (1u<<6) +#define SCI_SCR_TIE (1u<<7) +#define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0 + +#define IRQ_USB0_USBI0 62 +#define SLIBR_USBI0 SLIBR185 +#define IPR_USB0_USBI0 IPR_PERIB_INTB185 +#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185 + +void HardwareSetup(void) +{ + FLASH.ROMCIV.WORD = 1; + while (FLASH.ROMCIV.WORD) ; + FLASH.ROMCE.WORD = 1; + while (!FLASH.ROMCE.WORD) ; + + SYSTEM.PRCR.WORD = 0xA503u; + if (!SYSTEM.RSTSR1.BYTE) { + RTC.RCR4.BYTE = 0; + RTC.RCR3.BYTE = 12; + while (12 != RTC.RCR3.BYTE) ; + } + SYSTEM.SOSCCR.BYTE = 1; + + if (SYSTEM.HOCOCR.BYTE) { + SYSTEM.HOCOCR.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.HCOVF) ; + } + SYSTEM.PLLCR.WORD = 0x1D10u; /* HOCO x 15 */ + SYSTEM.PLLCR2.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.PLOVF) ; + + SYSTEM.SCKCR.LONG = 0x21C11222u; + SYSTEM.SCKCR2.WORD = 0x0041u; + SYSTEM.ROMWT.BYTE = 0x02u; + while (0x02u != SYSTEM.ROMWT.BYTE) ; + SYSTEM.SCKCR3.WORD = 0x400u; + SYSTEM.PRCR.WORD = 0xA500u; +} + +//--------------------------------------------------------------------+ +// SCI handling +//--------------------------------------------------------------------+ +typedef struct { + uint8_t *buf; + uint32_t cnt; +} sci_buf_t; +static volatile sci_buf_t sci_buf[2]; + +void INT_Excep_SCI5_TXI5(void) +{ + uint8_t *buf = sci_buf[0].buf; + uint32_t cnt = sci_buf[0].cnt; + + if (!buf || !cnt) { + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); + return; + } + SCI5.TDR = *buf; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BIT.TIE = 0; + SCI5.SCR.BIT.TEIE = 1; + } + sci_buf[0].buf = buf; + sci_buf[0].cnt = cnt; +} + +void INT_Excep_SCI5_TEI5(void) +{ + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); +} + +void INT_Excep_SCI5_RXI5(void) +{ + uint8_t *buf = sci_buf[1].buf; + uint32_t cnt = sci_buf[1].cnt; + + if (!buf || !cnt || + (SCI5.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) { + sci_buf[1].buf = NULL; + SCI5.SSR.BYTE = 0; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + return; + } + *buf = SCI5.RDR; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + } + sci_buf[1].buf = buf; + sci_buf[1].cnt = cnt; +} + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void INT_Excep_USB0_USBI0(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* setup software configurable interrupts */ + ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0; + ICU.SLIPRCR.BYTE = 1; + +#if CFG_TUSB_OS == OPT_OS_NONE + /* Enable CMT0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(CMT0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + /* Setup 1ms tick timer */ + CMT0.CMCNT = 0; + CMT0.CMCOR = CMT_PCLK / 1000 / 128; + CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128; + IR(CMT0, CMI0) = 0; + IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0; + IEN(CMT0, CMI0) = 1; + CMT.CMSTR0.BIT.STR0 = 1; +#endif + + /* Unlock MPC registers */ + MPC.PWPR.BIT.B0WI = 0; + MPC.PWPR.BIT.PFSWE = 1; + // SW PB1 + PORTB.PMR.BIT.B1 = 0U; + PORTB.PDR.BIT.B1 = 0U; + // LED PD6 + PORTD.PODR.BIT.B6 = 1U; + PORTD.ODR1.BIT.B4 = 1U; + PORTD.PMR.BIT.B6 = 0U; + PORTD.PDR.BIT.B6 = 1U; + /* UART TXD5 => PA4, RXD5 => PA3 */ + PORTA.PMR.BIT.B4 = 1U; + PORTA.PCR.BIT.B4 = 1U; + MPC.PA4PFS.BYTE = 0b01010; + PORTA.PMR.BIT.B3 = 1U; + MPC.PA5PFS.BYTE = 0b01010; + /* USB VBUS -> P16 */ + PORT1.PMR.BIT.B6 = 1U; + MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001; + /* Lock MPC registers */ + MPC.PWPR.BIT.PFSWE = 0; + MPC.PWPR.BIT.B0WI = 1; + + /* Enable SCI5 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(SCI5) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + SCI5.SEMR.BIT.ABCS = 1; + SCI5.SEMR.BIT.BGDM = 1; + SCI5.BRR = (SCI_PCLK / (8 * 115200)) - 1; + IR(SCI5, RXI5) = 0; + IR(SCI5, TXI5) = 0; + IS(SCI5, TEI5) = 0; + IR(ICU, GROUPBL0) = 0; + IPR(SCI5, RXI5) = IRQ_PRIORITY_SCI5; + IPR(SCI5, TXI5) = IRQ_PRIORITY_SCI5; + IPR(ICU,GROUPBL0) = IRQ_PRIORITY_SCI5; + IEN(SCI5, RXI5) = 1; + IEN(SCI5, TXI5) = 1; + IEN(ICU,GROUPBL0) = 1; + EN(SCI5, TEI5) = 1; + + /* setup USBI0 interrupt. */ + IR(USB0, USBI0) = 0; + IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + PORTD.PODR.BIT.B6 = state ? 0 : 1; +} + +uint32_t board_button_read(void) +{ + return PORTB.PIDR.BIT.B1 ? 0 : 1; +} + +int board_uart_read(uint8_t* buf, int len) +{ + sci_buf[1].buf = buf; + sci_buf[1].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE; + while (SCI5.SCR.BIT.RE) ; + return len - sci_buf[1].cnt; +} + +int board_uart_write(void const *buf, int len) +{ + sci_buf[0].buf = (uint8_t*)buf; + sci_buf[0].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE; + while (SCI5.SCR.BIT.TE) ; + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void INT_Excep_CMT0_CMI0(void) +{ + ++system_ticks; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +uint32_t SystemCoreClock = 120000000; +#endif + +int close(int fd) +{ + (void)fd; + return -1; +} +int fstat(int fd, void *pstat) +{ + (void)fd; + (void)pstat; + return 0; +} +off_t lseek(int fd, off_t pos, int whence) +{ + (void)fd; + (void)pos; + (void)whence; + return 0; +} +int isatty(int fd) +{ + (void)fd; + return 1; +} diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk new file mode 100644 index 000000000..5a8281718 --- /dev/null +++ b/hw/bsp/rx/family.mk @@ -0,0 +1,32 @@ +DEPS_SUBMODULES += hw/mcu/renesas/rx + +# Cross Compiler for RX +CROSS_COMPILE = rx-elf- + +include $(TOP)/$(BOARD_PATH)/board.mk + +CFLAGS += \ + -nostartfiles \ + -ffunction-sections \ + -fdata-sections \ + -fshort-enums \ + -mlittle-endian-data \ + -DSSIZE_MAX=__INT_MAX__ + +SRC_C += \ + src/portable/renesas/usba/dcd_usba.c \ + $(MCU_DIR)/vects.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(MCU_DIR) + +SRC_S += $(MCU_DIR)/start.S + +$(BUILD)/$(PROJECT).mot: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + $(OBJCOPY) -O srec -I elf32-rx-be-ns $^ $@ + +# flash using rfp-cli +flash-rfp: $(BUILD)/$(PROJECT).mot + rfp-cli -device rx65x -tool e2l -if fine -fo id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auth id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF -auto $^ diff --git a/hw/bsp/rx63n/boards/gr_citrus/board.mk b/hw/bsp/rx63n/boards/gr_citrus/board.mk deleted file mode 100644 index feab5b5e6..000000000 --- a/hw/bsp/rx63n/boards/gr_citrus/board.mk +++ /dev/null @@ -1,61 +0,0 @@ -DEPS_SUBMODULES += hw/mcu/renesas/rx - -CFLAGS += \ - -nostartfiles \ - -ffunction-sections \ - -fdata-sections \ - -fshort-enums \ - -mcpu=rx610 \ - -misa=v1 \ - -mlittle-endian-data \ - -DCFG_TUSB_MCU=OPT_MCU_RX63X - -# Cross Compiler for RX -CROSS_COMPILE = rx-elf- - -RX_NEWLIB ?= 1 - -ifeq ($(CMDEXE),1) -OPTLIBINC="$(shell for /F "usebackq delims=" %%i in (`where rx-elf-gcc`) do echo %%~dpi..\rx-elf\optlibinc)" -else -OPTLIBINC=$(shell dirname `which rx-elf-gcc`)../rx-elf/optlibinc -endif - -ifeq ($(RX_NEWLIB),1) -CFLAGS += -DSSIZE_MAX=__INT_MAX__ -else -# setup for optlib -CFLAGS += -nostdinc \ - -isystem $(OPTLIBINC) \ - -DLWIP_NO_INTTYPES_H - -LIBS += -loptc -loptm -endif - -MCU_DIR = hw/mcu/renesas/rx/rx63n - -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/r5f5631fd.ld - -SRC_C += \ - src/portable/renesas/usba/dcd_usba.c \ - $(MCU_DIR)/vects.c - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/$(MCU_DIR) - -SRC_S += $(MCU_DIR)/start.S - -# For freeRTOS port source -FREERTOS_PORT = RX600 - -# For flash-jlink target -JLINK_DEVICE = R5F5631F -JLINK_IF = JTAG - -# For flash-pyocd target -PYOCD_TARGET = - -# flash using jlink -flash: flash-jlink diff --git a/hw/bsp/rx63n/family.mk b/hw/bsp/rx63n/family.mk deleted file mode 100644 index d3c743ed1..000000000 --- a/hw/bsp/rx63n/family.mk +++ /dev/null @@ -1 +0,0 @@ -include $(TOP)/$(BOARD_PATH)/board.mk
\ No newline at end of file diff --git a/hw/bsp/saml22/family.mk b/hw/bsp/saml22/family.mk deleted file mode 100644 index fbe4e66f8..000000000 --- a/hw/bsp/saml22/family.mk +++ /dev/null @@ -1,50 +0,0 @@ -UF2_FAMILY_ID = 0x68ed2b88 -DEPS_SUBMODULES += hw/mcu/microchip - -include $(TOP)/$(BOARD_PATH)/board.mk - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -nostdlib -nostartfiles \ - -DCONF_OSC32K_CALIB_ENABLE=0 \ - -DCFG_TUSB_MCU=OPT_MCU_SAML22 - -SRC_C += \ - src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/saml22/gcc/gcc/startup_saml22.c \ - hw/mcu/microchip/saml22/gcc/system_saml22.c \ - hw/mcu/microchip/saml22/hpl/gclk/hpl_gclk.c \ - hw/mcu/microchip/saml22/hpl/mclk/hpl_mclk.c \ - hw/mcu/microchip/saml22/hpl/pm/hpl_pm.c \ - hw/mcu/microchip/saml22/hpl/osc32kctrl/hpl_osc32kctrl.c \ - hw/mcu/microchip/saml22/hpl/oscctrl/hpl_oscctrl.c \ - hw/mcu/microchip/saml22/hal/src/hal_atomic.c - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/hw/mcu/microchip/saml22/ \ - $(TOP)/hw/mcu/microchip/saml22/config \ - $(TOP)/hw/mcu/microchip/saml22/include \ - $(TOP)/hw/mcu/microchip/saml22/hal/include \ - $(TOP)/hw/mcu/microchip/saml22/hal/utils/include \ - $(TOP)/hw/mcu/microchip/saml22/hpl/port \ - $(TOP)/hw/mcu/microchip/saml22/hri \ - $(TOP)/hw/mcu/microchip/saml22/CMSIS/Core/Include - -# For TinyUSB port source -VENDOR = microchip -CHIP_FAMILY = samd - -# For freeRTOS port source -FREERTOS_PORT = ARM_CM0 - -# flash using bossac at least version 1.8 -# can be found in arduino15/packages/arduino/tools/bossac/ -# Add it to your PATH or change BOSSAC variable to match your installation -BOSSAC = bossac - -flash-bossac: $(BUILD)/$(PROJECT).bin - @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0) - $(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h new file mode 100644 index 000000000..a3e03997c --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h @@ -0,0 +1,50 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PIN (32 + 30) // PB30 +#define LED_STATE_ON 0 + +// Button +#define BUTTON_PIN (0 + 15) // PA15 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_RX_PIN 4 +#define UART_TX_PIN 5 + +#ifdef __cplusplus + } +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk b/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk new file mode 100644 index 000000000..81b4ecdcb --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk @@ -0,0 +1,12 @@ +CFLAGS += -D__SAML21J18B__ + +SAML_VARIANT = saml21 + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/saml21j18b_flash.ld + +# For flash-jlink target +JLINK_DEVICE = ATSAML21J18 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld b/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld new file mode 100644 index 000000000..7f6b7fa99 --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld @@ -0,0 +1,153 @@ +/** + * \file + * + * \brief Linker script for running in internal FLASH on the SAML21J18B + * + * Copyright (c) 2016 Atmel Corporation, + * a wholly owned subsidiary of Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 + lpram (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00002000 +} + +/* The stack size used by the application. NOTE: you need to adjust according to your application. */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > rom + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + .lpram (NOLOAD): + { + . = ALIGN(8); + _slpram = .; + *(.lpram .lpram.*); + . = ALIGN(8); + _elpram = .; + } > lpram + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + end = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + . = ALIGN(4); + _end = . ; +} diff --git a/hw/bsp/saml22/boards/saml22_feather/board.h b/hw/bsp/saml2x/boards/saml22_feather/board.h index 13a326000..13a326000 100644 --- a/hw/bsp/saml22/boards/saml22_feather/board.h +++ b/hw/bsp/saml2x/boards/saml22_feather/board.h diff --git a/hw/bsp/saml22/boards/sensorwatch_m0/board.mk b/hw/bsp/saml2x/boards/saml22_feather/board.mk index a6a773137..0605dca19 100644 --- a/hw/bsp/saml22/boards/sensorwatch_m0/board.mk +++ b/hw/bsp/saml2x/boards/saml22_feather/board.mk @@ -1,5 +1,7 @@ CFLAGS += -D__SAML22J18A__ +SAML_VARIANT = saml22 + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/$(BOARD).ld diff --git a/hw/bsp/saml22/boards/saml22_feather/saml22_feather.ld b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld index d1aaa44fc..d1aaa44fc 100644 --- a/hw/bsp/saml22/boards/saml22_feather/saml22_feather.ld +++ b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld diff --git a/hw/bsp/saml22/boards/sensorwatch_m0/board.h b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h index 7fc690ab2..7fc690ab2 100644 --- a/hw/bsp/saml22/boards/sensorwatch_m0/board.h +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h diff --git a/hw/bsp/saml22/boards/saml22_feather/board.mk b/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk index a6a773137..0605dca19 100644 --- a/hw/bsp/saml22/boards/saml22_feather/board.mk +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk @@ -1,5 +1,7 @@ CFLAGS += -D__SAML22J18A__ +SAML_VARIANT = saml22 + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/$(BOARD).ld diff --git a/hw/bsp/saml22/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld index d1aaa44fc..d1aaa44fc 100644 --- a/hw/bsp/saml22/boards/sensorwatch_m0/sensorwatch_m0.ld +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld diff --git a/hw/bsp/saml22/family.c b/hw/bsp/saml2x/family.c index fff11cbe5..470fde750 100644 --- a/hw/bsp/saml22/family.c +++ b/hw/bsp/saml2x/family.c @@ -108,13 +108,13 @@ void board_init(void) gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); // Output 500hz PWM on PB23 (TCC0 WO[3]) so we can validate the GCLK1 clock speed - hri_mclk_set_APBCMASK_TCC0_bit(MCLK); - TCC0->PER.bit.PER = 48000000 / 1000; - TCC0->CC[3].bit.CC = 48000000 / 2000; - TCC0->CTRLA.bit.ENABLE = true; - - gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3); - hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); +// hri_mclk_set_APBCMASK_TCC0_bit(MCLK); +// TCC0->PER.bit.PER = 48000000 / 1000; +// TCC0->CC[3].bit.CC = 48000000 / 2000; +// TCC0->CTRLA.bit.ENABLE = true; +// +// gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3); +// hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); } //--------------------------------------------------------------------+ @@ -160,4 +160,4 @@ uint32_t board_millis(void) void _init(void) { -}
\ No newline at end of file +} diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk new file mode 100644 index 000000000..e0f6b2f77 --- /dev/null +++ b/hw/bsp/saml2x/family.mk @@ -0,0 +1,48 @@ +UF2_FAMILY_ID = 0x68ed2b88 +DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip + +include $(TOP)/$(BOARD_PATH)/board.mk + +MCU_DIR = hw/mcu/microchip/$(SAML_VARIANT) + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -nostdlib -nostartfiles \ + -DCONF_OSC32K_CALIB_ENABLE=0 \ + -DCFG_TUSB_MCU=OPT_MCU_SAML22 + +SRC_C += \ + src/portable/microchip/samd/dcd_samd.c \ + $(MCU_DIR)/gcc/gcc/startup_$(SAML_VARIANT).c \ + $(MCU_DIR)/gcc/system_$(SAML_VARIANT).c \ + $(MCU_DIR)/hpl/gclk/hpl_gclk.c \ + $(MCU_DIR)/hpl/mclk/hpl_mclk.c \ + $(MCU_DIR)/hpl/pm/hpl_pm.c \ + $(MCU_DIR)/hpl/osc32kctrl/hpl_osc32kctrl.c \ + $(MCU_DIR)/hpl/oscctrl/hpl_oscctrl.c \ + $(MCU_DIR)/hal/src/hal_atomic.c + +INC += \ + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(MCU_DIR)/ \ + $(TOP)/$(MCU_DIR)/config \ + $(TOP)/$(MCU_DIR)/include \ + $(TOP)/$(MCU_DIR)/hal/include \ + $(TOP)/$(MCU_DIR)/hal/utils/include \ + $(TOP)/$(MCU_DIR)/hpl/port \ + $(TOP)/$(MCU_DIR)/hri \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# flash using bossac at least version 1.8 +# can be found in arduino15/packages/arduino/tools/bossac/ +# Add it to your PATH or change BOSSAC variable to match your installation +BOSSAC = bossac + +flash-bossac: $(BUILD)/$(PROJECT).bin + @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0) + $(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R diff --git a/hw/mcu/microchip b/hw/mcu/microchip -Subproject f7087f04783c896627061fc151fa3527b73733c +Subproject 58eb3763200ff51a998be5f537acf67299add22 diff --git a/hw/mcu/renesas/rx b/hw/mcu/renesas/rx -Subproject 4a51dfe6ecdf936d2d89f223f069e24a2d10920 +Subproject 706b4e0cf485605c32351e2f90f569826799602 |
