diff options
| author | hathach <[email protected]> | 2024-01-19 01:06:24 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-01-19 01:06:24 +0700 |
| commit | 30eb35f17f1baa4698da0cd45dbc3dff8906d7c0 (patch) | |
| tree | f6eba82bbee847cd73979565a8800ca953f49079 /src/class/cdc/serial | |
| parent | 3968a0fff87c794266284af7901e334d122e894c (diff) | |
- revert the use of serial init for set line coding
- update ch34x_get_lcr and ch34x_get_factor_divisor
Diffstat (limited to 'src/class/cdc/serial')
| -rw-r--r-- | src/class/cdc/serial/ch34x.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/class/cdc/serial/ch34x.h b/src/class/cdc/serial/ch34x.h index b4ed7420c..3f78a3007 100644 --- a/src/class/cdc/serial/ch34x.h +++ b/src/class/cdc/serial/ch34x.h @@ -59,6 +59,12 @@ #define CH34X_REG_MCR_MSR2 0x07 #define CH34X_NBREAK_BITS 0x01 +#define CH341_REG_0x0F 0x0F // undocumented register +#define CH341_REG_0x2C 0x2C // undocumented register +#define CH341_REG_0x27 0x27 // hardware flow control (cts/rts) + +#define CH34X_REG16_DIVISOR_PRESCALER TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER) + // modem control bits #define CH34X_BIT_RTS ( 1 << 6 ) #define CH34X_BIT_DTR ( 1 << 5 ) |