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authorSean Cross <[email protected]>2019-10-14 11:58:17 +0800
committerSean Cross <[email protected]>2019-11-13 09:08:01 -0800
commit359189ea2d791ab895dc29cbfa4e3eba14caf65f (patch)
tree5fd494502a5cd24db8d7ac65cac8acc396c976d6 /src/common/tusb_verify.h
parentef07427e06b1fa868ac7b96b18e77270f2231aed (diff)
tusb_verify: add riscv assert support
This simply executes an "ebreak" instruction. Signed-off-by: Sean Cross <[email protected]>
Diffstat (limited to 'src/common/tusb_verify.h')
-rw-r--r--src/common/tusb_verify.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index e59481352..2b63ab946 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -90,8 +90,12 @@
if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */ \
} while(0)
#else
+#if defined(__riscv)
+ #define TU_BREAKPOINT() do { __asm("ebreak\n"); } while(0)
+#else
#define TU_BREAKPOINT()
#endif
+#endif
/*------------------------------------------------------------------*/
/* Macro Generator