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authorhathach <[email protected]>2026-03-05 13:00:45 +0700
committerhathach <[email protected]>2026-03-05 13:00:45 +0700
commit0427fcfd02e6d6b8939b54984f58c3711d806ddd (patch)
tree5d86bb047dc306cf383fc7258074294d343c6ae2 /src/common
parent6e675da608b063e2ea7db1d700d788d6a247f9ec (diff)
parentce8a073a31307d65e3337a2f69a5ea1b9b507ea5 (diff)
Merge branch 'master' into fork/armusin/threadx_osal
Diffstat (limited to 'src/common')
-rw-r--r--src/common/tusb_private.h12
-rw-r--r--src/common/tusb_verify.h7
2 files changed, 13 insertions, 6 deletions
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index 43ce7a1df..5a51dfc37 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -24,8 +24,8 @@
* This file is part of the TinyUSB stack.
*/
-#ifndef TUSB_PRIVATE_H_
-#define TUSB_PRIVATE_H_
+#ifndef TUSB_PRIVATE_H
+#define TUSB_PRIVATE_H
// Internal Helper used by Host and Device Stack
@@ -33,9 +33,11 @@
extern "C" {
#endif
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
+typedef void (*tusb_defer_func_t)(uintptr_t param);
+
+ //--------------------------------------------------------------------+
+ // Configuration
+ //--------------------------------------------------------------------+
#define TUP_USBIP_CONTROLLER_NUM 2
extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index c9e06361c..bd00b9d11 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -73,8 +73,13 @@
#define TU_MESS_FAILED() do {} while (0)
#endif
+// Custom defined application function
+#ifdef CFG_TUSB_DEBUG_BREAKPOINT
+ extern void CFG_TUSB_DEBUG_BREAKPOINT(void);
+ #define TU_BREAKPOINT() CFG_TUSB_DEBUG_BREAKPOINT()
+
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
-#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
+#elif defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
#define TU_BREAKPOINT() do { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \