diff options
| author | hathach <[email protected]> | 2024-11-27 00:01:37 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-27 00:01:37 +0700 |
| commit | 123f1affb734e1bbec65708a6a721e199598e73f (patch) | |
| tree | b855200afa6b3dce7633f0b62bdc973d11170034 /src/common | |
| parent | 67e92e6688e609098270ba249f15a8dc7f051cbf (diff) | |
update device_info example to work with p4 dcache
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_mcu.h | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 22d652913..e74e8b780 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -364,15 +364,14 @@ #define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/ - #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64 - - #if defined(CFG_TUD_DWC2_DMA_ENABLE) && CFG_TUD_DWC2_DMA_ENABLE == 1 - #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1 - #endif - #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 - #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 0 + // #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 1 + // #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT 0 + // Enable host/device dcache if DMA is enabled + #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE + #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE + #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64 #elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2) #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)) |