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authorHa Thach <[email protected]>2023-05-23 21:45:00 +0700
committerGitHub <[email protected]>2023-05-23 21:45:00 +0700
commit1ef820ecfe569e181b8f20cb936f632e51d8257e (patch)
tree3a170e7c11de223c988a594c5189c4d39f1869ff /src/common
parentc998e9c60bc76894006c3bd049d661124a9bfbfd (diff)
Enhance chipidea (#2075)
* update chipidea dcd, remove manual ep_count and use DCCPARAMS to get number of endpoint instead * add dcd dcache for chipidea * add cmake for lpc18 * add makefile build for mcx * use fork of mcu sdk * fix ci build with nrf * flash rp2040 with openocd
Diffstat (limited to 'src/common')
-rw-r--r--src/common/tusb_mcu.h26
1 files changed, 17 insertions, 9 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index ba8976a8c..9c2933983 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -59,14 +59,6 @@
#define TUP_USBIP_OHCI
#define TUP_OHCI_RHPORTS 2
-#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
- // TODO USB0 has 6, USB1 has 4
- #define TUP_USBIP_CHIPIDEA_HS
- #define TUP_USBIP_EHCI
-
- #define TUP_DCD_ENDPOINT_MAX 6
- #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 FS
-
#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
#define TUP_DCD_ENDPOINT_MAX 5
@@ -78,12 +70,28 @@
// TODO USB0 has 5, USB1 has 6
#define TUP_DCD_ENDPOINT_MAX 6
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+ // USB0 has 6 with HS PHY, USB1 has 4 only FS
+ #define TUP_USBIP_CHIPIDEA_HS
+ #define TUP_USBIP_EHCI
+
+ #define TUP_DCD_ENDPOINT_MAX 6
+ #define TUP_RHPORT_HIGHSPEED 1
+
+#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
+ // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS
+ #define TUP_USBIP_CHIPIDEA_HS
+ #define TUP_USBIP_EHCI
+
+ #define TUP_DCD_ENDPOINT_MAX 8
+ #define TUP_RHPORT_HIGHSPEED 1
+
#elif TU_CHECK_MCU(OPT_MCU_MIMXRT)
#define TUP_USBIP_CHIPIDEA_HS
#define TUP_USBIP_EHCI
#define TUP_DCD_ENDPOINT_MAX 8
- #define TUP_RHPORT_HIGHSPEED 1 // Port0 HS, Port1 HS
+ #define TUP_RHPORT_HIGHSPEED 1
#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
#define TUP_USBIP_CHIPIDEA_FS