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authorHa Thach <[email protected]>2024-11-20 23:48:17 +0700
committerGitHub <[email protected]>2024-11-20 23:48:17 +0700
commit2571889061f70b9fd425ee4e4174018bf07c5309 (patch)
tree3eac31e898a8d25e268f7311ddb5ad452a901816 /src/common
parent9e674d4faef984b846a05bed848650ec2e31f4a3 (diff)
parentc61b55b191ffcc25c1feb1a693b6d9d5d704025f (diff)
Merge pull request #2883 from hathach/feature/esp32p4_dma_cache_syncronization
[DCD_DWC2][ESP32P4][HS] Added cache synchronization (cont)
Diffstat (limited to 'src/common')
-rw-r--r--src/common/tusb_mcu.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 3ee04b608..dfa6c7151 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -361,6 +361,18 @@
#define TUP_USBIP_DWC2_ESP32
#define TUP_RHPORT_HIGHSPEED 1 // port0 FS, port1 HS
#define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep
+
+ #if defined(CFG_TUD_DWC2_DMA_ENABLE) && CFG_TUD_DWC2_DMA_ENABLE == 1
+ #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1
+ #endif
+
+ #if defined(CFG_TUH_DWC2_DMA_ENABLE) && CFG_TUH_DWC2_DMA_ENABLE == 1
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
+ #endif
+
+ #define CFG_TUD_MEM_DCACHE_LINE_SIZE 64
+ #define CFG_TUH_MEM_DCACHE_LINE_SIZE 64
+
#define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)