diff options
| author | Ha Thach <[email protected]> | 2024-11-27 12:52:56 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-11-27 12:52:56 +0700 |
| commit | 2732aff7dd328a9f86c990afd7a71df48ae47391 (patch) | |
| tree | 2dd88431ee22a1a2d525db8fa6d9a4f2056fc1a9 /src/common | |
| parent | 62f0e87bf16c750622999f3952506e3a364e4075 (diff) | |
| parent | ae7cdcd0705aedbae2ac4d6eb051aa0d359fe3b5 (diff) | |
Merge pull request #2888 from hathach/esp32p4-host-dma
Esp32p4 host dma
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_mcu.h | 19 | ||||
| -rw-r--r-- | src/common/tusb_types.h | 10 |
2 files changed, 16 insertions, 13 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 22d652913..d43e5f2ba 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -354,9 +354,12 @@ #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_ESP32 #define TUP_DCD_ENDPOINT_MAX 7 // only 5 TX FIFO for endpoint IN - #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/ + // Disable slave if DMA is enabled + #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE + #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE + #elif TU_CHECK_MCU(OPT_MCU_ESP32P4) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_ESP32 @@ -364,15 +367,15 @@ #define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/ - #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64 - #if defined(CFG_TUD_DWC2_DMA_ENABLE) && CFG_TUD_DWC2_DMA_ENABLE == 1 - #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1 - #endif - - #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 - #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 0 + // Disable slave if DMA is enabled + #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE + #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE + // Enable dcache if DMA is enabled + #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE + #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE + #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64 #elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2) #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 89c65ced1..533c1bcea 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -44,14 +44,14 @@ union { \ CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \ uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \ - }; + } // Declare an endpoint buffer with a type #define TUD_EPBUF_TYPE_DEF(_name, _type) \ union { \ CFG_TUD_MEM_ALIGN _type _name; \ uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \ - }; + } //------------- Host DCache declaration -------------// #define TUH_EPBUF_DCACHE_SIZE(_size) (CFG_TUH_MEM_DCACHE_ENABLE ? \ @@ -62,14 +62,14 @@ union { \ CFG_TUH_MEM_ALIGN uint8_t _name[_size]; \ uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \ - }; + } // Declare an endpoint buffer with a type -#define TUH_EPBUF_TYPE_DEF(_name, _type) \ +#define TUH_EPBUF_TYPE_DEF(_type, _name) \ union { \ CFG_TUH_MEM_ALIGN _type _name; \ uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \ - }; + } /*------------------------------------------------------------------*/ |