diff options
| author | hathach <[email protected]> | 2023-10-18 18:43:07 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2023-10-18 18:43:07 +0700 |
| commit | 27a2c8cba4dc7c56509bb3d9b6415a6fe8f638ac (patch) | |
| tree | fb9615b6bf2d053573f32337d6e3e599c45a0457 /src/common | |
| parent | 5025e80c9ebd117f077750d7021c152f8c762764 (diff) | |
adding nulceo stm32u5a5, fix clock configure issue
dwc2 core stuck at reset
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_mcu.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 8807ff8aa..1797f0bc4 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -217,9 +217,7 @@ // TypeC controller #define TUP_USBIP_TYPEC_STM32 - #define TUP_DCD_ENDPOINT_MAX 8 - #define TUP_TYPEC_RHPORTS_NUM 1 #elif TU_CHECK_MCU(OPT_MCU_STM32G0) @@ -261,14 +259,21 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32U5) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_DCD_ENDPOINT_MAX 6 + + // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY + #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \ + defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx) + #define TUP_DCD_ENDPOINT_MAX 9 + #define TUP_RHPORT_HIGHSPEED 1 + #else + #define TUP_DCD_ENDPOINT_MAX 6 + #endif #elif TU_CHECK_MCU(OPT_MCU_STM32L5) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 #define TUP_DCD_ENDPOINT_MAX 8 - //--------------------------------------------------------------------+ // Sony //--------------------------------------------------------------------+ |