diff options
| author | hathach <[email protected]> | 2026-02-13 01:10:55 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2026-02-13 01:10:55 +0700 |
| commit | 35a90f213d75a4630adf576f50d2b5bc8f03456c (patch) | |
| tree | 42ab3bc2b3816d14bc93d5abb2c84e9286b70f08 /src/common | |
| parent | be24a38a65d8e22fed461b4058e3deb97d5a2907 (diff) | |
| parent | d13284d02da552c843e3ccbda4472083f25b0b16 (diff) | |
Merge branch 'refs/heads/master' into dwc2_vbus
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_verify.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index c9e06361c..bd00b9d11 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -73,8 +73,13 @@ #define TU_MESS_FAILED() do {} while (0) #endif +// Custom defined application function +#ifdef CFG_TUSB_DEBUG_BREAKPOINT + extern void CFG_TUSB_DEBUG_BREAKPOINT(void); + #define TU_BREAKPOINT() CFG_TUSB_DEBUG_BREAKPOINT() + // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 -#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ +#elif defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) #define TU_BREAKPOINT() do { \ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ |