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authorhathach <[email protected]>2024-11-25 19:11:19 +0700
committerhathach <[email protected]>2024-11-25 19:11:19 +0700
commit833eb7d22d641b2c2b1dd701f86d823f67b12d6d (patch)
tree03a5e9f865b50ab1f6aa79816dbe7955b2343a7f /src/common
parent66741e35c2661ccaa6a8f8cd6d2f6d7aab049f2c (diff)
change dcd_dcache_*() API return type from void to bool
Diffstat (limited to 'src/common')
-rw-r--r--src/common/tusb_mcu.h10
-rw-r--r--src/common/tusb_types.h24
2 files changed, 25 insertions, 9 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 622c8fc21..22d652913 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -364,19 +364,15 @@
#define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep
#define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+ #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64
#if defined(CFG_TUD_DWC2_DMA_ENABLE) && CFG_TUD_DWC2_DMA_ENABLE == 1
#define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1
#endif
- #if defined(CFG_TUH_DWC2_DMA_ENABLE) && CFG_TUH_DWC2_DMA_ENABLE == 1
- #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
- #endif
-
- #define CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT 64
- #define CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT 64
+ #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
+ #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 0
- #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
#if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index e5660861d..89c65ced1 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -35,8 +35,9 @@
extern "C" {
#endif
-#define TUD_EPBUF_DCACHE_SIZE(_size) \
- (CFG_TUD_MEM_DCACHE_ENABLE ? (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : (_size))
+//------------- Device DCache declaration -------------//
+#define TUD_EPBUF_DCACHE_SIZE(_size) (CFG_TUD_MEM_DCACHE_ENABLE ? \
+ (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : (_size))
// Declare an endpoint buffer with uint8_t[size]
#define TUD_EPBUF_DEF(_name, _size) \
@@ -52,6 +53,25 @@
uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
};
+//------------- Host DCache declaration -------------//
+#define TUH_EPBUF_DCACHE_SIZE(_size) (CFG_TUH_MEM_DCACHE_ENABLE ? \
+ (TU_DIV_CEIL(_size, CFG_TUH_MEM_DCACHE_LINE_SIZE) * CFG_TUH_MEM_DCACHE_LINE_SIZE) : (_size))
+
+// Declare an endpoint buffer with uint8_t[size]
+#define TUH_EPBUF_DEF(_name, _size) \
+ union { \
+ CFG_TUH_MEM_ALIGN uint8_t _name[_size]; \
+ uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
+ };
+
+// Declare an endpoint buffer with a type
+#define TUH_EPBUF_TYPE_DEF(_name, _type) \
+ union { \
+ CFG_TUH_MEM_ALIGN _type _name; \
+ uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+ };
+
+
/*------------------------------------------------------------------*/
/* CONSTANTS
*------------------------------------------------------------------*/