diff options
| author | hathach <[email protected]> | 2024-11-21 19:18:52 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-21 19:36:15 +0700 |
| commit | 85e54b0fc3b53e3a690698bc5cf85581e6eaa69d (patch) | |
| tree | 6b93ec15fa85f3a283a688dd248c6bb71e4f20ac /src/common | |
| parent | c370c70bbe4536e85366cc6912bfe7de32984763 (diff) | |
use TUD_EPBUF_DEF to declare buffer memory for midi
Diffstat (limited to 'src/common')
| -rw-r--r-- | src/common/tusb_common.h | 5 | ||||
| -rw-r--r-- | src/common/tusb_types.h | 10 |
2 files changed, 11 insertions, 4 deletions
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 416bad296..d05032d00 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -58,9 +58,6 @@ // Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111 #define TU_GENMASK(h, l) ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) ) -// DCache padding for variable to occupy full cache line -#define TUD_DCACHE_PADDING uint8_t TU_XSTRCAT(dcache_padding_, _TU_COUNTER_)[CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1] - //--------------------------------------------------------------------+ // Includes //--------------------------------------------------------------------+ @@ -179,7 +176,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { retur TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; } //------------- Mathematics -------------// -TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return TU_DIV_CEIL(v, d); } // log2 of a value is its MSB's position // TODO use clz TODO remove diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index d045a3c8f..d0a5c866f 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -35,6 +35,16 @@ extern "C" { #endif +// DCache padding for variable to occupy full cache line +#define TUD_DCACHE_PADDING uint8_t TU_XSTRCAT(dcache_padding_, _TU_COUNTER_)[CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1] + +#define TUD_EPBUF_DEF(_name, _size) \ + union { \ + CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \ + uint8_t _name##_dcache_padding[CFG_TUD_MEM_DCACHE_ENABLE ? (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : 1]; \ + }; + + /*------------------------------------------------------------------*/ /* CONSTANTS *------------------------------------------------------------------*/ |