Merge remote-tracking branch 'tinyusb/master' into hcd_ip3516

Signed-off-by: HiFiPhile <[email protected]>

8 files changed, 510 insertions, 308 deletions

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index d74760608..6ac1405f3 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -329,7 +329,7 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_
 
 #endif
 
-// scatter read 4 bytes from two buffers. Parameter are not checked
+// scatter read 4 bytes from two buffers (LE). Parameter are not checked
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_scatter_read32(const uint8_t *buf1, uint8_t len1, const uint8_t *buf2,
                                                                uint8_t len2) {
   uint32_t result = 0;
@@ -348,7 +348,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_scatter_read32(const uint8_t *bu
   return result;
 }
 
-// scatter write 4 bytes to two buffers. Parameter are not checked
+// scatter write 4 bytes (LE) to two buffers. Parameter are not checked
 TU_ATTR_ALWAYS_INLINE static inline void tu_scatter_write32(uint32_t value, uint8_t *buf1, uint8_t len1,
                                                             uint8_t *buf2, uint8_t len2) {
   for (uint8_t i = 0; i < len1; ++i) {
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index e0e09f5ce..ba5b4afd1 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -117,12 +117,16 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
     }
   }
 
-  // not found return the key value in hex
+  #ifndef CFG_TUSB_DEBUG_PRINTF
+  // not found return the key value in hex if no custom printf is defined
   static char not_found[11];
-  if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key) <= 0) {
+  if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long)key) <= 0) {
     not_found[0] = 0;
   }
   return not_found;
+  #else
+  return "NotFound";
+  #endif
 }
 
 #endif // CFG_TUSB_DEBUG
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index e97b6ccce..8bd79e56d 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -30,11 +30,6 @@
 
 #define TU_FIFO_DBG 0
 
-// Suppress IAR warning
-// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
-#if defined(__ICCARM__)
-#pragma diag_suppress = Pa082
-#endif
 
 #if OSAL_MUTEX_REQUIRED
 
@@ -59,7 +54,7 @@ TU_ATTR_ALWAYS_INLINE static inline void ff_unlock(osal_mutex_t mutex) {
 //--------------------------------------------------------------------+
 // Setup API
 //--------------------------------------------------------------------+
-bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable) {
+bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, bool overwritable) {
   // Limit index space to 2*depth - this allows for a fast "modulo" calculation
   // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable
   // only if overflow happens once (important for unsupervised DMA applications)
@@ -72,7 +67,6 @@ bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_si
 
   f->buffer       = (uint8_t *)buffer;
   f->depth        = depth;
-  f->item_size    = (uint16_t)(item_size & 0x7FFFu);
   f->overwritable = overwritable;
   f->rd_idx       = 0u;
   f->wr_idx       = 0u;
@@ -111,175 +105,306 @@ void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
 }
 
 //--------------------------------------------------------------------+
-// Pull & Push
-// copy data to/from fifo without updating read/write pointers
+// Hardware FIFO API
+// Support different data access width and address increment scheme
+// Can support multiple i.e both 16 and 32-bit data access if needed
 //--------------------------------------------------------------------+
-#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32
-// Copy to fifo from fixed address buffer (usually a rx register) with TU_FIFO_FIXED_ADDR_RW32 mode
-static void ff_push_fixed_addr_rw32(uint8_t *ff_buf, const volatile uint32_t *reg_rx, uint16_t len) {
-  // Reading full available 32 bit words from const app address
-  uint16_t full_words = len >> 2;
-  while (full_words--) {
-    const uint32_t tmp32 = *reg_rx;
-    tu_unaligned_write32(ff_buf, tmp32);
-    ff_buf += 4;
+#if CFG_TUSB_FIFO_HWFIFO_API
+  #if CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+    #define HWFIFO_ADDR_NEXT_N(_hwfifo, _const, _n) _hwfifo = (_const volatile void *)((uintptr_t)(_hwfifo) + _n)
+  #else
+    #define HWFIFO_ADDR_NEXT_N(_hwfifo, _const, _n)
+  #endif
+
+  #define HWFIFO_ADDR_NEXT(_hwfifo, _const) HWFIFO_ADDR_NEXT_N(_hwfifo, _const, CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE)
+
+//------------- Write -------------//
+  #ifndef CFG_TUSB_FIFO_HWFIFO_CUSTOM_WRITE
+TU_ATTR_ALWAYS_INLINE static inline void stride_write(volatile void *hwfifo, const void *src, uint8_t data_stride) {
+  (void)data_stride; // possible unused
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE & 4
+      #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE != 4
+  if (data_stride == 4)
+      #endif
+  {
+    *((volatile uint32_t *)hwfifo) = tu_unaligned_read32(src);
   }
+    #endif
 
-  // Read the remaining 1-3 bytes from const app address
-  const uint8_t bytes_rem = len & 0x03;
-  if (bytes_rem) {
-    const uint32_t tmp32 = *reg_rx;
-    memcpy(ff_buf, &tmp32, bytes_rem);
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE & 2
+      #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE != 2
+  if (data_stride == 2)
+      #endif
+  {
+    *((volatile uint16_t *)hwfifo) = tu_unaligned_read16(src);
   }
+    #endif
+
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 1
+  *((volatile uint8_t *)hwfifo) = *(const uint8_t *)src;
+    #endif
 }
 
 // Copy from fifo to fixed address buffer (usually a tx register) with TU_FIFO_FIXED_ADDR_RW32 mode
-static void ff_pull_fixed_addr_rw32(volatile uint32_t *reg_tx, const uint8_t *ff_buf, uint16_t len) {
-  // Write full available 32 bit words to const address
-  uint16_t full_words = len >> 2u;
-  while (full_words--) {
-    *reg_tx = tu_unaligned_read32(ff_buf);
-    ff_buf += 4u;
+void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len, const tu_hwfifo_access_t *access_mode) {
+  // Write full available 16/32 bit words to dest
+  const uint8_t data_stride = (access_mode != NULL) ? access_mode->data_stride : CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE;
+  while (len >= data_stride) {
+    stride_write(hwfifo, src, data_stride);
+    src += data_stride;
+    len -= data_stride;
+    HWFIFO_ADDR_NEXT(hwfifo, );
   }
 
-  // Write the remaining 1-3 bytes
-  const uint8_t bytes_rem = len & 0x03;
-  if (bytes_rem) {
-    uint32_t tmp32 = 0u;
-    memcpy(&tmp32, ff_buf, bytes_rem);
-    *reg_tx = tmp32;
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE > 1
+      #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_16BIT_ACCESS
+  // 16-bit access is allowed for odd bytes
+  if (len >= 2) {
+    *((volatile uint16_t *)hwfifo) = tu_unaligned_read16(src);
+    src += 2;
+    len -= 2;
+    HWFIFO_ADDR_NEXT_N(hwfifo, , 2);
   }
-}
-#endif
+      #endif
 
-// send n items to fifo WITHOUT updating write pointer
-static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr,
-                      tu_fifo_access_mode_t copy_mode) {
-  const uint16_t lin_count  = f->depth - wr_ptr;
-  const uint16_t wrap_count = n - lin_count;
-
-  uint16_t lin_bytes  = lin_count * f->item_size;
-  uint16_t wrap_bytes = wrap_count * f->item_size;
+      #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_8BIT_ACCESS
+  // 8-bit access is allowed for odd bytes
+  while (len > 0) {
+    *((volatile uint8_t *)hwfifo) = *src++;
+    len--;
+    HWFIFO_ADDR_NEXT_N(hwfifo, , 1);
+  }
+      #else
 
-  // current buffer of fifo
-  uint8_t *ff_buf = f->buffer + (wr_ptr * f->item_size);
+  // Write odd bytes i.e 1 byte for 16 bit or 1-3 bytes for 32 bit
+  if (len > 0) {
+    uint32_t tmp = 0u;
+    memcpy(&tmp, src, len);
+    stride_write(hwfifo, &tmp, data_stride);
+    HWFIFO_ADDR_NEXT(hwfifo, );
+  }
+      #endif
+    #endif
+}
+  #endif
 
-  switch (copy_mode) {
-    case TU_FIFO_INC_ADDR_RW8:
-      if (n <= lin_count) {
-        // Linear only
-        memcpy(ff_buf, app_buf, n * f->item_size);
-      } else {
-        // Wrap around
-        memcpy(ff_buf, app_buf, lin_bytes);                                    // linear part
-        memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes); // wrapped part
-      }
-      break;
+//------------- Read -------------//
+  #ifndef CFG_TUSB_FIFO_HWFIFO_CUSTOM_READ
+TU_ATTR_ALWAYS_INLINE static inline void stride_read(const volatile void *hwfifo, void *dest, uint8_t data_stride) {
+  (void)data_stride; // possible unused
 
-#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32
-    case TU_FIFO_FIXED_ADDR_RW32: {
-      const volatile uint32_t *reg_rx = (volatile const uint32_t *)app_buf;
-      if (n <= lin_count) {
-        // Linear only
-        ff_push_fixed_addr_rw32(ff_buf, reg_rx, n * f->item_size);
-      } else {
-        // Wrap around
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE & 4
+      #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE != 4
+  if (data_stride == 4)
+      #endif
+  {
+    tu_unaligned_write32(dest, *((const volatile uint32_t *)hwfifo));
+  }
+    #endif
 
-        // Write full words to linear part of buffer
-        uint16_t lin_4n_bytes = lin_bytes & 0xFFFC;
-        ff_push_fixed_addr_rw32(ff_buf, reg_rx, lin_4n_bytes);
-        ff_buf += lin_4n_bytes;
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE & 2
+      #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE != 2
+  if (data_stride == 2)
+      #endif
+  {
+    tu_unaligned_write16(dest, *((const volatile uint16_t *)hwfifo));
+  }
+    #endif
 
-        // There could be odd 1-3 bytes before the wrap-around boundary
-        const uint8_t rem = lin_bytes & 0x03;
-        if (rem > 0) {
-          const uint8_t  remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
-          const uint32_t tmp32  = *reg_rx;
-          tu_scatter_write32(tmp32, ff_buf, rem, f->buffer, remrem);
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 1
+  *(uint8_t *)dest = *((const volatile uint8_t *)hwfifo);
+    #endif
+}
 
-          wrap_bytes -= remrem;
-          ff_buf = f->buffer + remrem; // wrap around
-        } else {
-          ff_buf = f->buffer; // wrap around to beginning
-        }
+void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, const tu_hwfifo_access_t *access_mode) {
+  // Reading full available 16/32-bit hwfifo and write to fifo
+  const uint8_t data_stride = (access_mode != NULL) ? access_mode->data_stride : CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE;
+  while (len >= data_stride) {
+    stride_read(hwfifo, dest, data_stride);
+    dest += data_stride;
+    len -= data_stride;
+    HWFIFO_ADDR_NEXT(hwfifo, const);
+  }
 
-        // Write data wrapped part
-        if (wrap_bytes > 0) {
-          ff_push_fixed_addr_rw32(ff_buf, reg_rx, wrap_bytes);
-        }
-      }
-      break;
-    }
-#endif
+    #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE > 1
+      #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_16BIT_ACCESS
+  // 16-bit access is allowed for odd bytes
+  if (len >= 2) {
+    tu_unaligned_write16(dest, *((const volatile uint16_t *)hwfifo));
+    dest += 2;
+    len -= 2;
+    HWFIFO_ADDR_NEXT_N(hwfifo, const, 2);
+  }
+    #endif
 
-    default:
-      break; // unknown mode
+    #ifdef CFG_TUSB_FIFO_HWFIFO_DATA_ODD_8BIT_ACCESS
+  // 8-bit access is allowed for odd bytes
+  while (len > 0) {
+    *dest++ = *((const volatile uint8_t *)hwfifo);
+    len--;
+    HWFIFO_ADDR_NEXT_N(hwfifo, const, 1);
+  }
+    #else
+  // Read odd bytes i.e 1 byte for 16 bit or 1-3 bytes for 32 bit
+  if (len > 0) {
+    uint32_t tmp;
+    stride_read(hwfifo, &tmp, data_stride);
+    memcpy(dest, &tmp, len);
+    HWFIFO_ADDR_NEXT(hwfifo, const);
   }
+    #endif
+    #endif
 }
+  #endif
 
-// get n items from fifo WITHOUT updating read pointer
-static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_access_mode_t copy_mode) {
-  const uint16_t lin_count  = f->depth - rd_ptr;
-  const uint16_t wrap_count = n - lin_count; // only used if wrapped
+// push to sw fifo from hwfifo
+static void hwff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr,
+                        const tu_hwfifo_access_t *access_mode) {
+  uint16_t lin_bytes  = f->depth - wr_ptr;
+  uint16_t wrap_bytes = n - lin_bytes;
+  uint8_t *ff_buf     = f->buffer + wr_ptr;
 
-  uint16_t lin_bytes  = lin_count * f->item_size;
-  uint16_t wrap_bytes = wrap_count * f->item_size;
+  const volatile void *hwfifo = (const volatile void *)app_buf;
+  if (n <= lin_bytes) {
+    // Linear only case
+    tu_hwfifo_read(hwfifo, ff_buf, n, access_mode);
+  } else {
+    // Wrap around case
+  #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 1
+    tu_hwfifo_read(hwfifo, ff_buf, lin_bytes, access_mode);     // linear part
+    HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_bytes);
+    tu_hwfifo_read(hwfifo, f->buffer, wrap_bytes, access_mode); // wrapped part
+  #else
+    // Write full words to linear part of buffer
+    const uint8_t  data_stride = access_mode->data_stride;
+    const uint32_t odd_mask    = data_stride - 1;
+    uint16_t       lin_even    = lin_bytes & ~odd_mask;
+    tu_hwfifo_read(hwfifo, ff_buf, lin_even, access_mode);
+    HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_even);
+    ff_buf += lin_even;
 
-  // current buffer of fifo
-  const uint8_t *ff_buf = f->buffer + (rd_ptr * f->item_size);
+    // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
+    // combine it with the wrapped part to form a full word for data stride
+    const uint8_t lin_odd = lin_bytes & odd_mask;
+    if (lin_odd > 0) {
+      const uint8_t wrap_odd = (uint8_t)tu_min16(wrap_bytes, data_stride - lin_odd);
+      uint8_t       buf_temp[4];
+      tu_hwfifo_read(hwfifo, buf_temp, lin_odd + wrap_odd, access_mode);
+      HWFIFO_ADDR_NEXT(hwfifo, const);
 
-  switch (copy_mode) {
-    case TU_FIFO_INC_ADDR_RW8:
-      if (n <= lin_count) {
-        // Linear only
-        memcpy(app_buf, ff_buf, n * f->item_size);
-      } else {
-        // Wrap around
-        memcpy(app_buf, ff_buf, lin_bytes);                            // linear part
-        memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); // wrapped part
+      for (uint8_t i = 0; i < lin_odd; ++i) {
+        ff_buf[i] = buf_temp[i];
+      }
+      for (uint8_t i = 0; i < wrap_odd; ++i) {
+        f->buffer[i] = buf_temp[lin_odd + i];
       }
-      break;
 
-#ifdef  CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32
-    case TU_FIFO_FIXED_ADDR_RW32: {
-      volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf;
+      wrap_bytes -= wrap_odd;
+      ff_buf = f->buffer + wrap_odd; // wrap around
+    } else {
+      ff_buf = f->buffer;            // wrap around to beginning
+    }
 
-      if (n <= lin_count) {
-        // Linear only
-        ff_pull_fixed_addr_rw32(reg_tx, ff_buf, n * f->item_size);
-      } else {
-        // Wrap around case
+    // Write data wrapped part
+    if (wrap_bytes > 0) {
+      tu_hwfifo_read(hwfifo, ff_buf, wrap_bytes, access_mode);
+    }
+  #endif
+  }
+}
 
-        // Read full words from linear part
-        uint16_t lin_4n_bytes = lin_bytes & 0xFFFC;
-        ff_pull_fixed_addr_rw32(reg_tx, ff_buf, lin_4n_bytes);
-        ff_buf += lin_4n_bytes;
+// pull from sw fifo to hwfifo
+static void hwff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr,
+                        const tu_hwfifo_access_t *access_mode) {
+  uint16_t       lin_bytes  = f->depth - rd_ptr;
+  uint16_t       wrap_bytes = n - lin_bytes; // only used if wrapped
+  const uint8_t *ff_buf     = f->buffer + rd_ptr;
 
-        // There could be odd 1-3 bytes before the wrap-around boundary
-        const uint8_t rem = lin_bytes & 0x03;
-        if (rem > 0) {
-          const uint8_t  remrem    = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
-          const uint32_t scatter32 = tu_scatter_read32(ff_buf, rem, f->buffer, remrem);
+  volatile void *hwfifo = (volatile void *)app_buf;
 
-          *reg_tx = scatter32;
+  if (n <= lin_bytes) {
+    // Linear only case
+    tu_hwfifo_write(hwfifo, ff_buf, n, access_mode);
+  } else {
+    // Wrap around case
+  #if CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE == 1
+    tu_hwfifo_write(hwfifo, ff_buf, lin_bytes, access_mode);     // linear part
+    HWFIFO_ADDR_NEXT_N(hwfifo, , lin_bytes);
+    tu_hwfifo_write(hwfifo, f->buffer, wrap_bytes, access_mode); // wrapped part
+  #else
+    // Read full words from linear part
+    const uint8_t  data_stride = access_mode->data_stride;
+    const uint32_t odd_mask    = data_stride - 1;
+    uint16_t       lin_even    = lin_bytes & ~odd_mask;
+    tu_hwfifo_write(hwfifo, ff_buf, lin_even, access_mode);
+    HWFIFO_ADDR_NEXT_N(hwfifo, , lin_even);
+    ff_buf += lin_even;
 
-          wrap_bytes -= remrem;
-          ff_buf = f->buffer + remrem; // wrap around
-        } else {
-          ff_buf = f->buffer;          // wrap around to beginning
-        }
+    // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
+    const uint8_t lin_odd = lin_bytes & odd_mask;
+    if (lin_odd > 0) {
+      const uint8_t wrap_odd = (uint8_t)tu_min16(wrap_bytes, data_stride - lin_odd);
 
-        // Read data wrapped part
-        if (wrap_bytes > 0) {
-          ff_pull_fixed_addr_rw32(reg_tx, ff_buf, wrap_bytes);
-        }
+      uint8_t buf_temp[4];
+      for (uint8_t i = 0; i < lin_odd; ++i) {
+        buf_temp[i] = ff_buf[i];
       }
-      break;
+      for (uint8_t i = 0; i < wrap_odd; ++i) {
+        buf_temp[lin_odd + i] = f->buffer[i];
+      }
+
+      tu_hwfifo_write(hwfifo, buf_temp, lin_odd + wrap_odd, access_mode);
+      HWFIFO_ADDR_NEXT(hwfifo, );
+
+      wrap_bytes -= wrap_odd;
+      ff_buf = f->buffer + wrap_odd; // wrap around
+    } else {
+      ff_buf = f->buffer;            // wrap around to beginning
+    }
+
+    // Read data wrapped part
+    if (wrap_bytes > 0) {
+      tu_hwfifo_write(hwfifo, ff_buf, wrap_bytes, access_mode);
     }
+  #endif
+  }
+}
 #endif
 
-    default:
-      break; // unknown mode
+//--------------------------------------------------------------------+
+// Pull & Push
+// copy data to/from fifo without updating read/write pointers
+//--------------------------------------------------------------------+
+// send n items to fifo WITHOUT updating write pointer
+static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr) {
+  uint16_t lin_bytes  = f->depth - wr_ptr;
+  uint16_t wrap_bytes = n - lin_bytes;
+  uint8_t *ff_buf     = f->buffer + wr_ptr;
+
+  if (n <= lin_bytes) {
+    // Linear only case
+    memcpy(ff_buf, app_buf, n);
+  } else {
+    // Wrap around case
+    memcpy(ff_buf, app_buf, lin_bytes);                                    // linear part
+    memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes); // wrapped part
+  }
+}
+
+// get n items from fifo WITHOUT updating read pointer
+static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr) {
+  uint16_t       lin_bytes  = f->depth - rd_ptr;
+  uint16_t       wrap_bytes = n - lin_bytes; // only used if wrapped
+  const uint8_t *ff_buf     = f->buffer + rd_ptr;
+
+  // single byte access
+  if (n <= lin_bytes) {
+    // Linear only
+    memcpy(app_buf, ff_buf, n);
+  } else {
+    // Wrap around
+    memcpy(app_buf, ff_buf, lin_bytes);                            // linear part
+    memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); // wrapped part
   }
 }
 
@@ -332,7 +457,7 @@ static uint16_t correct_read_index(tu_fifo_t *f, uint16_t wr_idx) {
 // Works on local copies of w and r
 // Must be protected by read mutex since in case of an overflow read pointer gets modified
 uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx,
-                                    tu_fifo_access_mode_t access_mode) {
+                                    const tu_hwfifo_access_t *access_mode) {
   uint16_t count = tu_ff_overflow_count(f->depth, wr_idx, rd_idx);
   if (count == 0) {
     return 0; // nothing to peek
@@ -349,7 +474,16 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
   }
 
   const uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
-  ff_pull_n(f, p_buffer, n, rd_ptr, access_mode);
+
+#if CFG_TUSB_FIFO_HWFIFO_API
+  if (access_mode != NULL) {
+    hwff_pull_n(f, p_buffer, n, rd_ptr, access_mode);
+  } else
+#endif
+  {
+    (void)access_mode;
+    ff_pull_n(f, p_buffer, n, rd_ptr);
+  }
 
   return n;
 }
@@ -357,17 +491,20 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
 // Read n items without removing it from the FIFO, correct read pointer if overflowed
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
   ff_lock(f->mutex_rd);
-  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_INC_ADDR_RW8);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, wr_idx, rd_idx, NULL);
   ff_unlock(f->mutex_rd);
   return ret;
 }
 
 // Read n items from fifo with access mode
-uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode) {
+uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, const tu_hwfifo_access_t *access_mode) {
   ff_lock(f->mutex_rd);
 
   // Peek the data: f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  n         = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, access_mode);
+  const uint16_t wr_idx = f->wr_idx;
+  n         = tu_fifo_peek_n_access_mode(f, buffer, n, wr_idx, f->rd_idx, access_mode);
   f->rd_idx = advance_index(f->depth, f->rd_idx, n);
 
   ff_unlock(f->mutex_rd);
@@ -375,7 +512,8 @@ uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_f
 }
 
 // Write n items to fifo with access mode
-uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_access_mode_t access_mode) {
+uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n,
+                                     const tu_hwfifo_access_t *access_mode) {
   if (n == 0) {
     return 0;
   }
@@ -401,8 +539,8 @@ uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n,
     // function! Since it would end up in a race condition with read functions!
     if (n >= f->depth) {
       // Only copy last part
-      if (access_mode == TU_FIFO_INC_ADDR_RW8) {
-        buf8 += (n - f->depth) * f->item_size;
+      if (access_mode == NULL) {
+        buf8 += (n - f->depth);
       } else {
         // TODO should read from hw fifo to discard data, however reading an odd number could
         // accidentally discard data.
@@ -437,7 +575,14 @@ uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n,
     const uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
     TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr);
 
-    ff_push_n(f, buf8, n, wr_ptr, access_mode);
+#if CFG_TUSB_FIFO_HWFIFO_API
+    if (access_mode != NULL) {
+      hwff_push_n(f, buf8, n, wr_ptr, access_mode);
+    } else
+#endif
+    {
+      ff_push_n(f, buf8, n, wr_ptr);
+    }
     f->wr_idx = advance_index(f->depth, wr_idx, n);
 
     TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
@@ -477,7 +622,7 @@ static bool ff_peek_local(tu_fifo_t *f, void *buf, uint16_t wr_idx, uint16_t rd_
   }
 
   const uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
-  memcpy(buf, f->buffer + (rd_ptr * f->item_size), f->item_size);
+  memcpy(buf, f->buffer + rd_ptr, 1);
 
   return true;
 }
@@ -486,7 +631,8 @@ static bool ff_peek_local(tu_fifo_t *f, void *buf, uint16_t wr_idx, uint16_t rd_
 bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
   // Peek the data
   // f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  const bool ret = ff_peek_local(f, buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const bool ret = ff_peek_local(f, buffer, wr_idx, f->rd_idx);
   if (ret) {
     ff_lock(f->mutex_rd);
     f->rd_idx = advance_index(f->depth, f->rd_idx, 1);
@@ -498,7 +644,9 @@ bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
 
 // Read one item without removing it from the FIFO, correct read index if overflowed
 bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) {
-  return ff_peek_local(f, p_buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return ff_peek_local(f, p_buffer, wr_idx, rd_idx);
 }
 
 // Write one element into the buffer
@@ -512,7 +660,7 @@ bool tu_fifo_write(tu_fifo_t *f, const void *data) {
     ret = false;
   } else {
     const uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
-    memcpy(f->buffer + (wr_ptr * f->item_size), data, f->item_size);
+    memcpy(f->buffer + wr_ptr, data, 1);
     f->wr_idx = advance_index(f->depth, wr_idx, 1);
     ret       = true;
   }
@@ -678,6 +826,6 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) {
   } else {
     info->linear.len  = f->depth - wr_ptr;
     info->wrapped.len = remain - info->linear.len; // Remaining length - n already was limited to remain or FIFO depth
-    info->wrapped.ptr = f->buffer;              // Always start of buffer
+    info->wrapped.ptr = f->buffer;                 // Always start of buffer
   }
 }
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index 2e2a0db6f..b31a0802e 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -32,6 +32,25 @@
 extern "C" {
 #endif
 
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+// mutex is only needed for RTOS. For OS None, we don't get preempted
+#define CFG_FIFO_MUTEX      OSAL_MUTEX_REQUIRED
+
+#define CFG_TUSB_FIFO_HWFIFO_API (CFG_TUD_EDPT_DEDICATED_HWFIFO || CFG_TUH_EDPT_DEDICATED_HWFIFO)
+
+#ifndef CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 0
+#endif
+
+#ifndef CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0
+#endif
+
 // Due to the use of unmasked pointers, this FIFO does not suffer from losing
 // one item slice. Furthermore, write and read operations are completely
 // decoupled as write and read functions do not modify a common state. Henceforth,
@@ -41,17 +60,6 @@ extern "C" {
 // read pointers can be updated from within a DMA ISR. Overflows are detectable
 // within a certain number (see tu_fifo_overflow()).
 
-#include "common/tusb_common.h"
-#include "osal/osal.h"
-
-// mutex is only needed for RTOS
-// for OS None, we don't get preempted
-#define CFG_FIFO_MUTEX      OSAL_MUTEX_REQUIRED
-
-#if CFG_TUD_EDPT_DEDICATED_HWFIFO || CFG_TUH_EDPT_DEDICATED_HWFIFO
-  #define CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32
-#endif
-
 /* Write/Read "pointer" is in the range of: 0 .. depth - 1, and is used to get the fifo data.
  * Write/Read "index" is always in the range of: 0 .. 2*depth-1
  *
@@ -111,11 +119,8 @@ extern "C" {
 typedef struct {
   uint8_t *buffer;              // buffer pointer
   uint16_t depth;               // max items
-
-  struct TU_ATTR_PACKED {
-    uint16_t item_size    : 15; // size of each item
-    bool     overwritable : 1;  // ovwerwritable when full
-  };
+  bool     overwritable;        // overwritable when full
+  // 1 byte padding here
 
   volatile uint16_t wr_idx;     // write index
   volatile uint16_t rd_idx;     // read index
@@ -124,7 +129,6 @@ typedef struct {
   osal_mutex_t mutex_wr;
   osal_mutex_t mutex_rd;
 #endif
-
 } tu_fifo_t;
 
 typedef struct {
@@ -134,29 +138,32 @@ typedef struct {
   } linear, wrapped;
 } tu_fifo_buffer_info_t;
 
-#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \
-  {                                                         \
-    .buffer       = _buffer,                                \
-    .depth        = _depth,                                 \
-    .item_size    = sizeof(_type),                          \
-    .overwritable = _overwritable,                          \
+// Access mode for hardware fifo read/write
+typedef struct {
+  uint8_t   data_stride;
+  uintptr_t param;
+} tu_hwfifo_access_t;
+
+#define TU_FIFO_INIT(_buffer, _depth, _overwritable) \
+  {                                                  \
+    .buffer       = _buffer,                         \
+    .depth        = _depth,                          \
+    .overwritable = _overwritable,                   \
   }
 
-#define TU_FIFO_DEF(_name, _depth, _type, _overwritable)                      \
-    uint8_t _name##_buf[_depth*sizeof(_type)];                                \
-    tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _type, _overwritable)
+#define TU_FIFO_DEF(_name, _depth, _overwritable)                    \
+  uint8_t   _name##_buf[_depth];                                     \
+  tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _overwritable)
 
-// Write modes intended to allow special read and write functions to be able to
-// copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others
-typedef enum {
-  TU_FIFO_INC_ADDR_RW8,    // increased address read/write by bytes - normal (default) mode
-  TU_FIFO_FIXED_ADDR_RW32, // fixed address read/write by 4 bytes (word). Used for STM32 access into USB hardware FIFO
-} tu_fifo_access_mode_t;
+// Moving data from tusb_fifo <-> USB hardware FIFOs e.g. STM32s need to use a special stride mode which reads/writes
+// data in 2/4 byte chunks from/to a fixed address (USB FIFO register) instead of incrementing the address. For this use
+// read/write access_mode with stride_mode = true. The STRIDE DATA and ADDR stride must be configured with
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
 
 //--------------------------------------------------------------------+
 // Setup API
 //--------------------------------------------------------------------+
-bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable);
+bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, bool overwritable);
 void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable);
 void tu_fifo_clear(tu_fifo_t *f);
 
@@ -191,7 +198,7 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
 // peek() will correct/re-index read pointer in case of an overflowed fifo to form a full fifo
 //--------------------------------------------------------------------+
 uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx,
-                                    tu_fifo_access_mode_t access_mode);
+                                    const tu_hwfifo_access_t *access_mode);
 bool     tu_fifo_peek(tu_fifo_t *f, void *p_buffer);
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
 
@@ -199,10 +206,10 @@ uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
 // Read API
 // peek() + advance read index
 //--------------------------------------------------------------------+
-uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode);
+uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, const tu_hwfifo_access_t *access_mode);
 bool     tu_fifo_read(tu_fifo_t *f, void *buffer);
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) {
-  return tu_fifo_read_n_access_mode(f, buffer, n, TU_FIFO_INC_ADDR_RW8);
+  return tu_fifo_read_n_access_mode(f, buffer, n, NULL);
 }
 
 // discard first n items from fifo i.e advance read pointer by n with mutex
@@ -212,13 +219,42 @@ uint16_t tu_fifo_discard_n(tu_fifo_t *f, uint16_t n);
 //--------------------------------------------------------------------+
 // Write API
 //--------------------------------------------------------------------+
-uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_access_mode_t access_mode);
+uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, const tu_hwfifo_access_t *access_mode);
 bool     tu_fifo_write(tu_fifo_t *f, const void *data);
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) {
-  return tu_fifo_write_n_access_mode(f, data, n, TU_FIFO_INC_ADDR_RW8);
+  return tu_fifo_write_n_access_mode(f, data, n, NULL);
 }
 
 //--------------------------------------------------------------------+
+// Hardware FIFO API
+// Special hardware FIFO/Buffer to hold USB data, usually requires certain access method these can be configured with
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE (data width) and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE (address increment)
+// Note: these usually has opposite direction (read/write) to/from our software FIFO  (tu_fifo_t)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_write_from_fifo(volatile void *hwfifo, tu_fifo_t *f, uint16_t n,
+                                                                       const tu_hwfifo_access_t *access_mode) {
+  const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE, .param = 0};
+  return tu_fifo_read_n_access_mode(f, (void *)(uintptr_t)hwfifo, n,
+                                    (access_mode != NULL) ? access_mode : &default_access);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_read_to_fifo(const volatile void *hwfifo, tu_fifo_t *f,
+                                                                    uint16_t n, const tu_hwfifo_access_t *access_mode) {
+  const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE, .param = 0};
+  return tu_fifo_write_n_access_mode(f, (const void *)(uintptr_t)hwfifo, n,
+                                     (access_mode != NULL) ? access_mode : &default_access);
+}
+
+#if CFG_TUSB_FIFO_HWFIFO_API
+// read from hwfifo to buffer
+void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, const tu_hwfifo_access_t *access_mode);
+
+// write to hwfifo from buffer with access mode
+void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len, const tu_hwfifo_access_t *access_mode);
+
+#endif
+
+//--------------------------------------------------------------------+
 // Internal Helper Local
 // work on local copies of read/write indices in order to only access them once for re-entrancy
 //--------------------------------------------------------------------+
@@ -255,16 +291,22 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) {
 
 // return number of items in fifo, capped to fifo's depth
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_count(const tu_fifo_t *f) {
-  return tu_min16(tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_min16(tu_ff_overflow_count(f->depth, wr_idx, rd_idx), f->depth);
 }
 
 // check if fifo is full
 TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_full(const tu_fifo_t *f) {
-  return tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_overflow_count(f->depth, wr_idx, rd_idx) >= f->depth;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_remaining(const tu_fifo_t *f) {
-  return tu_ff_remaining_local(f->depth, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_remaining_local(f->depth, wr_idx, rd_idx);
 }
 
 #ifdef __cplusplus
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 3dc3fb4b6..0e5233bbe 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -117,6 +117,14 @@
 
   #define TUP_DCD_ENDPOINT_MAX 16
 
+#elif TU_CHECK_MCU(OPT_MCU_RW61X)
+  // USB0 is chipidea HS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+
 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
   #include "fsl_device_registers.h"
 
@@ -182,10 +190,15 @@
 //--------------------------------------------------------------------+
 // ST
 //--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_STM32C0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F1)
   // - F102, F103 use fsdev
@@ -201,7 +214,7 @@
     defined(STM32F103xE) || defined(STM32F103xG)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX 8
+    #define CFG_TUSB_FSDEV_PMA_SIZE 512u
   #else
     #error "Unsupported STM32F1 mcu"
   #endif
@@ -216,7 +229,16 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32F3)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+
+  #if defined(STM32F302xB) || defined(STM32F302xC) || defined(STM32F303xB) || defined(STM32F303xC) || \
+    defined(STM32F373xC)
+    #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+  #elif defined(STM32F302x6) || defined(STM32F302x8) || defined(STM32F302xD) || defined(STM32F302xE) || \
+    defined(STM32F303xD) || defined(STM32F303xE)
+    #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+  #else
+    #error "Unsupported STM32F3 mcu"
+  #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F4)
   #define TUP_USBIP_DWC2
@@ -242,49 +264,63 @@
   #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
   #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  // Device controller
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+  // TypeC controller
+  #define TUP_USBIP_TYPEC_STM32
+  #define TUP_TYPEC_RHPORTS_NUM 1
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
-  #include "stm32h7xx.h"
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
   #define TUP_DCD_ENDPOINT_MAX 9
 
-  #if __CORTEX_M == 7
+  #ifndef CORE_CM4
     // Enable dcache if DMA is enabled
     #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
     #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
     #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
-  // Device controller
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_STM32
+  // FS has 6, HS has 9
+  #define TUP_DCD_ENDPOINT_MAX                  9
 
-  // TypeC controller
-  #define TUP_USBIP_TYPEC_STM32
-  #define TUP_DCD_ENDPOINT_MAX  8
-  #define TUP_TYPEC_RHPORTS_NUM 1
+  // MCU with on-chip HS Phy
+  #define TUP_RHPORT_HIGHSPEED                  1
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32C0)
+#elif TU_CHECK_MCU(OPT_MCU_STM32L0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
+#elif TU_CHECK_MCU(OPT_MCU_STM32L1)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L4)
   // - L4x2, L4x3 use fsdev
@@ -301,28 +337,32 @@
     defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX 8
+    #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
   #else
     #error "Unsupported STM32L4 mcu"
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
+#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE (1024u)
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_STM32
-  #define TUP_DCD_ENDPOINT_MAX 9
-  #define TUP_RHPORT_HIGHSPEED 1
+#elif TU_CHECK_MCU(OPT_MCU_STM32U0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32U3)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32U5)
+  // U535/545 use fsdev
   #if defined(STM32U535xx) || defined(STM32U545xx)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX 8
-
+    #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
   #else
     #define TUP_USBIP_DWC2
     #define TUP_USBIP_DWC2_STM32
@@ -337,35 +377,16 @@
     #endif
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32U0)
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_STM32U3)
+#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
 
-#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
+#elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
-
-  // FS has 6, HS has 9
-  #define TUP_DCD_ENDPOINT_MAX                  9
-
-  // MCU with on-chip HS Phy
-  #define TUP_RHPORT_HIGHSPEED                  1
-
-  // Enable dcache if DMA is enabled
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
-  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+  #define TUP_DCD_ENDPOINT_MAX 9
+  #define TUP_RHPORT_HIGHSPEED 1
 
 //--------------------------------------------------------------------+
 // Sony
@@ -421,10 +442,6 @@
     #define TUP_MCU_MULTIPLE_CORE 1
   #endif
 
-  // Disable slave if DMA is enabled
-  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
-
 #elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_ESP32
@@ -437,10 +454,6 @@
 
   #define TUP_MCU_MULTIPLE_CORE                 1
 
-  // Disable slave if DMA is enabled
-  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUH_DWC2_DMA_ENABLE
-
   // Enable dcache if DMA is enabled
   #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
   #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
@@ -572,6 +585,7 @@
 
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_CH32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
 
   // default to FSDEV for device
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
@@ -617,32 +631,17 @@
 //--------------------------------------------------------------------+
 // ArteryTek
 //--------------------------------------------------------------------+
-#elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407)
+#elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407, OPT_MCU_AT32F413)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F413)
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F415)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 4
 
-#elif TU_CHECK_MCU(OPT_MCU_AT32F435_437)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F423)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405)
+#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405, OPT_MCU_AT32F423, OPT_MCU_AT32F425, OPT_MCU_AT32F435_437, OPT_MCU_AT32F45X)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 8
@@ -654,17 +653,21 @@
     #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_AT32F425)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
+//--------------------------------------------------------------------+
+// HPMicro
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_HPM)
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_RHPORT_HIGHSPEED    1
+
+  #define TU_ATTR_FAST_FUNC __attribute__((section(".fast")))
 
 #endif
 
-//--------------------------------------------------------------------+
 // External USB controller
-//--------------------------------------------------------------------+
-
 #if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
   #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
     #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4 * (CFG_TUH_DEVICE_MAX - 1))
@@ -676,6 +679,10 @@
 // Default Values
 //--------------------------------------------------------------------+
 
+#if defined(TUP_USBIP_FSDEV)
+  #define TUP_DCD_ENDPOINT_MAX 8
+#endif
+
 #ifndef TUP_MCU_MULTIPLE_CORE
   #define TUP_MCU_MULTIPLE_CORE 0
 #endif
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index 10e12c2af..5a51dfc37 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef TUSB_PRIVATE_H_
-#define TUSB_PRIVATE_H_
+#ifndef TUSB_PRIVATE_H
+#define TUSB_PRIVATE_H
 
 // Internal Helper used by Host and Device Stack
 
@@ -33,17 +33,11 @@
  extern "C" {
 #endif
 
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
+typedef void (*tusb_defer_func_t)(uintptr_t param);
 
-#if CFG_TUD_ENABLED && CFG_TUD_VENDOR && (CFG_TUD_VENDOR_TX_BUFSIZE == 0 || CFG_TUD_VENDOR_RX_BUFSIZE == 0)
-  #define CFG_TUSB_EDPT_STREAM_NO_FIFO_ENABLED 1
-#endif
-
-#ifndef CFG_TUSB_EDPT_STREAM_NO_FIFO_ENABLED
-  #define CFG_TUSB_EDPT_STREAM_NO_FIFO_ENABLED 0
-#endif
+ //--------------------------------------------------------------------+
+ // Configuration
+ //--------------------------------------------------------------------+
 
 #define TUP_USBIP_CONTROLLER_NUM 2
 extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index d473e53e6..7d26ac74e 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -554,7 +554,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
-  return (uint8_t) (num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0u));
+  return (uint8_t) (num | (dir == (uint8_t)TUSB_DIR_IN ? (uint8_t)TUSB_DIR_IN_MASK : 0u));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) {
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index 587554e7f..bd00b9d11 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -73,8 +73,13 @@
   #define TU_MESS_FAILED() do {} while (0)
 #endif
 
+// Custom defined application function
+#ifdef CFG_TUSB_DEBUG_BREAKPOINT
+  extern void CFG_TUSB_DEBUG_BREAKPOINT(void);
+  #define TU_BREAKPOINT() CFG_TUSB_DEBUG_BREAKPOINT()
+
 // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
-#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
+#elif defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
     defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
   #define TU_BREAKPOINT() do {                                                                              \
     volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
@@ -96,10 +101,12 @@
  * - TU_VERIFY_1ARGS : return false if failed
  * - TU_VERIFY_2ARGS : return provided value if failed
  *------------------------------------------------------------------*/
-#define TU_VERIFY_DEFINE(_cond, _ret)    \
-  do {                                   \
-    if (!(_cond)) { return _ret; }     \
-  } while(0)
+#define TU_VERIFY_DEFINE(_cond, _ret) \
+  do {                                \
+    if (!(_cond)) {                   \
+      return _ret;                    \
+    }                                 \
+  } while (0)
 
 #define TU_VERIFY_1ARGS(_cond)         TU_VERIFY_DEFINE(_cond, false)
 #define TU_VERIFY_2ARGS(_cond, _ret)   TU_VERIFY_DEFINE(_cond, _ret)