Merge branch 'master' into sb-ep

4 files changed, 135 insertions, 54 deletions

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 0351a3d8f..1fb93da11 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -78,10 +78,16 @@
 #include "tusb_debug.h"
 
 //--------------------------------------------------------------------+
-// Optional API implemented by application if needed
+// API implemented by application if needed
 // TODO move to a more obvious place/file
 //--------------------------------------------------------------------+
 
+// Get current milliseconds, required by some port/configuration without RTOS
+extern uint32_t tusb_time_millis_api(void);
+
+// Delay in milliseconds, use tusb_time_millis_api() by default. required by some port/configuration with no RTOS
+extern void tusb_time_delay_ms_api(uint32_t ms);
+
 // flush data cache
 TU_ATTR_WEAK extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size);
 
@@ -324,6 +330,44 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_
             + TU_BIN8(dlsb))
 #endif
 
+//--------------------------------------------------------------------+
+// Descriptor helper
+//--------------------------------------------------------------------+
+
+// return next descriptor
+TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) {
+  uint8_t const* desc8 = (uint8_t const*) desc;
+  return desc8 + desc8[DESC_OFFSET_LEN];
+}
+
+// get descriptor length
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
+}
+
+// get descriptor type
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
+}
+
+// get descriptor subtype
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_in_bounds(uint8_t const* p_desc, uint8_t const* desc_end) {
+  return (p_desc < desc_end) && (tu_desc_next(p_desc) <= desc_end);
+}
+
+// find descriptor that match byte1 (type)
+uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3);
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index ecf002b09..f7679556f 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -428,7 +428,6 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16
   if ( cnt > f->depth )
   {
     rd_idx = _ff_correct_read_index(f, wr_idx);
-    cnt = f->depth;
   }
 
   uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 2ee2132bf..7722ca1e6 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -117,9 +117,9 @@
   #define TUP_RHPORT_HIGHSPEED    1
 
   #if __CORTEX_M == 7
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT  1
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT  1
-  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE      32
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT        1
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT        1
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT   32
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K)
@@ -220,12 +220,25 @@
     #define TUP_RHPORT_HIGHSPEED  1 // Port0: FS, Port1: HS
   #endif
 
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  32
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
+  #include "stm32h7xx.h"
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
   #define TUP_DCD_ENDPOINT_MAX    9
 
+  #if __CORTEX_M == 7
+    // Enable dcache if DMA is enabled
+    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
+    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
+    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  32
+  #endif
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32H5)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
@@ -282,6 +295,12 @@
   #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+  #define TUP_DCD_ENDPOINT_MAX    9
+  #define TUP_RHPORT_HIGHSPEED    1
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32U5)
   #if defined (STM32U535xx) || defined (STM32U545xx)
     #define TUP_USBIP_FSDEV
@@ -322,6 +341,11 @@
   // MCU with on-chip HS Phy
   #define TUP_RHPORT_HIGHSPEED    1
 
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
 //--------------------------------------------------------------------+
 // Sony
 //--------------------------------------------------------------------+
@@ -392,11 +416,11 @@
   #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT  !CFG_TUH_DWC2_DMA_ENABLE
 
   // Enable dcache if DMA is enabled
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT  CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT  CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
   #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  64
 
-#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
   #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
   #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
   #endif
@@ -503,11 +527,17 @@
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
-  // v20x support both FSDEV (USBD) and USBFS, default to FSDEV
+  // v20x support both port0 FSDEV (USBD) and port1 USBFS
   #define TUP_USBIP_WCH_USBFS
+
+  #ifndef CFG_TUH_WCH_USBIP_USBFS
+  #define CFG_TUH_WCH_USBIP_USBFS 1
+  #endif
+
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_CH32
 
+  // default to FSDEV for device
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
   #define CFG_TUD_WCH_USBIP_USBFS 0
   #endif
@@ -544,6 +574,53 @@
   #define TUP_RHPORT_HIGHSPEED    1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
+//--------------------------------------------------------------------+
+// ArteryTek
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F413)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F415)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX    4
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F435_437)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F423)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+  // AT32F405xx has on-chip HS PHY
+  #if defined(AT32F405CBT7) || defined(AT32F405CBU7) ||     \
+      defined(AT32F405CCT7) || defined(AT32F405CCU7) ||     \
+      defined(AT32F405KBU7_4) || defined(AT32F405KCU7_4) || \
+      defined(AT32F405RBT7_7) || defined(AT32F405RBT7) ||   \
+      defined(AT32F405RCT7_7) || defined(AT32F405RCT7)
+    #define TUP_RHPORT_HIGHSPEED  1 // Port0: FS, Port1: HS
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F425)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index fd7f01b67..b3ef1e9c9 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -43,14 +43,14 @@
 #define TUD_EPBUF_DEF(_name, _size) \
   union { \
     CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \
-    uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
+    TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
   }
 
 // Declare an endpoint buffer with a type
 #define TUD_EPBUF_TYPE_DEF(_type, _name) \
   union { \
     CFG_TUD_MEM_ALIGN _type _name; \
-    uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+    TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
   }
 
 //------------- Host DCache declaration -------------//
@@ -61,14 +61,14 @@
 #define TUH_EPBUF_DEF(_name, _size) \
   union { \
     CFG_TUH_MEM_ALIGN uint8_t _name[_size]; \
-    uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
+    TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
   }
 
 // Declare an endpoint buffer with a type
 #define TUH_EPBUF_TYPE_DEF(_type, _name) \
   union { \
     CFG_TUH_MEM_ALIGN _type _name; \
-    uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+    TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
   }
 
 
@@ -278,6 +278,8 @@ typedef enum {
   XFER_RESULT_INVALID
 } xfer_result_t;
 
+#define tusb_xfer_result_t xfer_result_t
+
 // TODO remove
 enum {
   DESC_OFFSET_LEN  = 0,
@@ -345,7 +347,6 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  iManufacturer      ; ///< Index of string descriptor describing manufacturer.
   uint8_t  iProduct           ; ///< Index of string descriptor describing product.
   uint8_t  iSerialNumber      ; ///< Index of string descriptor describing the device's serial number.
-
   uint8_t  bNumConfigurations ; ///< Number of possible configurations.
 } tusb_desc_device_t;
 
@@ -561,46 +562,6 @@ TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_
 }
 #endif
 
-//--------------------------------------------------------------------+
-// Descriptor helper
-//--------------------------------------------------------------------+
-
-// return next descriptor
-TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) {
-  uint8_t const* desc8 = (uint8_t const*) desc;
-  return desc8 + desc8[DESC_OFFSET_LEN];
-}
-
-// get descriptor length
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) {
-  return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
-}
-
-// get descriptor type
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) {
-  return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
-}
-
-// get descriptor subtype
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
-  return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_is_valid(void const* desc, uint8_t const* desc_end) {
-  const uint8_t* desc8 = (uint8_t const*) desc;
-  return (desc8 < desc_end) && (tu_desc_next(desc) <= desc_end);
-}
-
-
-// find descriptor that match byte1 (type)
-uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1);
-
-// find descriptor that match byte1 (type) and byte2
-uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2);
-
-// find descriptor that match byte1 (type) and byte2
-uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3);
-
 #ifdef __cplusplus
  }
 #endif