diff options
| author | Ha Thach <[email protected]> | 2023-05-23 21:45:00 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-05-23 21:45:00 +0700 |
| commit | 1ef820ecfe569e181b8f20cb936f632e51d8257e (patch) | |
| tree | 3a170e7c11de223c988a594c5189c4d39f1869ff /src/device | |
| parent | c998e9c60bc76894006c3bd049d661124a9bfbfd (diff) | |
Enhance chipidea (#2075)
* update chipidea dcd, remove manual ep_count and use DCCPARAMS to get number of endpoint instead
* add dcd dcache for chipidea
* add cmake for lpc18
* add makefile build for mcx
* use fork of mcu sdk
* fix ci build with nrf
* flash rp2040 with openocd
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/dcd.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/device/dcd.h b/src/device/dcd.h index 00419ff05..f82b8633d 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -103,6 +103,22 @@ typedef struct TU_ATTR_ALIGNED(4) //TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct"); //--------------------------------------------------------------------+ +// Memory API +//--------------------------------------------------------------------+ + +// clean/flush data cache: write cache -> memory. +// Required before an DMA TX transfer to make sure data is in memory +void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK; + +// invalidate data cache: mark cache as invalid, next read will read from memory +// Required BOTH before and after an DMA RX transfer +void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; + +// clean and invalidate data cache +// Required before an DMA transfer where memory is both read/write by DMA +void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; + +//--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ |
