diff options
| author | hathach <[email protected]> | 2024-11-28 16:11:30 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-28 16:11:30 +0700 |
| commit | 79373afaafffe64dd2bb33d725b88137c3d4ee6f (patch) | |
| tree | 272da237079fd812ec088f16fa0cabb3494891c7 /src/device | |
| parent | 047ba0a62db8a078aa2f7d68d00cbf41406c0fb2 (diff) | |
| parent | 5bb90efd5ff59d3b1d67f3c9269ce1aa57a925a6 (diff) | |
Merge branch 'master' into fork/HiFiPhile/lwip_fix
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/dcd.h | 31 | ||||
| -rw-r--r-- | src/device/usbd.c | 43 | ||||
| -rw-r--r-- | src/device/usbd.h | 14 | ||||
| -rw-r--r-- | src/device/usbd_control.c | 49 |
4 files changed, 82 insertions, 55 deletions
diff --git a/src/device/dcd.h b/src/device/dcd.h index 3ef5188fc..789552d47 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -93,22 +93,22 @@ typedef struct TU_ATTR_ALIGNED(4) { // clean/flush data cache: write cache -> memory. // Required before an DMA TX transfer to make sure data is in memory -void dcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool dcd_dcache_clean(const void* addr, uint32_t data_size); // invalidate data cache: mark cache as invalid, next read will read from memory // Required BOTH before and after an DMA RX transfer -void dcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool dcd_dcache_invalidate(const void* addr, uint32_t data_size); // clean and invalidate data cache // Required before an DMA transfer where memory is both read/write by DMA -void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; +bool dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size); //--------------------------------------------------------------------+ // Controller API //--------------------------------------------------------------------+ // Initialize controller to device mode -void dcd_init(uint8_t rhport); +bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init); // Deinitialize controller, unset device mode. bool dcd_deinit(uint8_t rhport); @@ -194,38 +194,45 @@ extern void dcd_event_handler(dcd_event_t const * event, bool in_isr); // helper to send bus signal event TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr) { - dcd_event_t event = { .rhport = rhport, .event_id = eid }; + dcd_event_t event; + event.rhport = rhport; + event.event_id = eid; dcd_event_handler(&event, in_isr); } // helper to send bus reset event TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr) { - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET }; + dcd_event_t event; + event.rhport = rhport; + event.event_id = DCD_EVENT_BUS_RESET; event.bus_reset.speed = speed; dcd_event_handler(&event, in_isr); } // helper to send setup received TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) { - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED }; + dcd_event_t event; + event.rhport = rhport; + event.event_id = DCD_EVENT_SETUP_RECEIVED; memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t)); - dcd_event_handler(&event, in_isr); } // helper to send transfer complete event TU_ATTR_ALWAYS_INLINE static inline void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr) { - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE }; - + dcd_event_t event; + event.rhport = rhport; + event.event_id = DCD_EVENT_XFER_COMPLETE; event.xfer_complete.ep_addr = ep_addr; event.xfer_complete.len = xferred_bytes; event.xfer_complete.result = result; - dcd_event_handler(&event, in_isr); } TU_ATTR_ALWAYS_INLINE static inline void dcd_event_sof(uint8_t rhport, uint32_t frame_count, bool in_isr) { - dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SOF }; + dcd_event_t event; + event.rhport = rhport; + event.event_id = DCD_EVENT_SOF; event.sof.frame_count = frame_count; dcd_event_handler(&event, in_isr); } diff --git a/src/device/usbd.c b/src/device/usbd.c index 67faf0da7..2a6081673 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -46,9 +46,7 @@ // Weak stubs: invoked if no strong implementation is available //--------------------------------------------------------------------+ TU_ATTR_WEAK void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr) { - (void) rhport; - (void) eventid; - (void) in_isr; + (void) rhport; (void) eventid; (void) in_isr; } TU_ATTR_WEAK void tud_sof_cb(uint32_t frame_count) { @@ -82,9 +80,7 @@ TU_ATTR_WEAK void tud_resume_cb(void) { } TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) { - (void) rhport; - (void) stage; - (void) request; + (void) rhport; (void) stage; (void) request; return false; } @@ -101,6 +97,21 @@ TU_ATTR_WEAK void dcd_disconnect(uint8_t rhport) { (void) rhport; } +TU_ATTR_WEAK bool dcd_dcache_clean(const void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + return true; +} + +TU_ATTR_WEAK bool dcd_dcache_invalidate(const void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + return true; +} + +TU_ATTR_WEAK bool dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size) { + (void) addr; (void) data_size; + return true; +} + //--------------------------------------------------------------------+ // Device Data //--------------------------------------------------------------------+ @@ -448,11 +459,14 @@ bool tud_inited(void) { return _usbd_rhport != RHPORT_INVALID; } -bool tud_init(uint8_t rhport) { - // skip if already initialized - if (tud_inited()) return true; +bool tud_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { + if (tud_inited()) { + return true; // skip if already initialized + } + TU_ASSERT(rh_init); - TU_LOG_USBD("USBD init on controller %u, Highspeed = %u\r\n", rhport, TUD_OPT_HIGH_SPEED); + TU_LOG_USBD("USBD init on controller %u, speed = %s\r\n", rhport, + rh_init->speed == TUSB_SPEED_HIGH ? "High" : "Full"); TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(usbd_device_t)); TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(dcd_event_t)); TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_fifo_t)); @@ -487,15 +501,16 @@ bool tud_init(uint8_t rhport) { _usbd_rhport = rhport; // Init device controller driver - dcd_init(rhport); + TU_ASSERT(dcd_init(rhport, rh_init)); dcd_int_enable(rhport); return true; } bool tud_deinit(uint8_t rhport) { - // skip if not initialized - if (!tud_inited()) return true; + if (!tud_inited()) { + return true; // skip if not initialized + } TU_LOG_USBD("USBD deinit on controller %u\r\n", rhport); @@ -557,7 +572,7 @@ bool tud_task_event_ready(void) { * int main(void) { application_init(); - tusb_init(); + tusb_init(0, TUSB_ROLE_DEVICE); while(1) { // the mainloop application_code(); diff --git a/src/device/usbd.h b/src/device/usbd.h index 7913096e3..de6007fb3 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -37,8 +37,20 @@ extern "C" { // Application API //--------------------------------------------------------------------+ +// New API to replace tud_init() to init device stack on specific roothub port +bool tud_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init); + // Init device stack on roothub port -bool tud_init (uint8_t rhport); +#if TUSB_VERSION_NUMBER > 2000 // 0.20.0 +TU_ATTR_DEPRECATED("Please use tusb_init(rhport, rh_init) instead") +#endif +TU_ATTR_ALWAYS_INLINE static inline bool tud_init (uint8_t rhport) { + const tusb_rhport_init_t rh_init = { + .role = TUSB_ROLE_DEVICE, + .speed = TUD_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL + }; + return tud_rhport_init(rhport, &rh_init); +} // Deinit device stack on roothub port bool tud_deinit(uint8_t rhport); diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index b1fd357aa..80a2a2cc1 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -35,7 +35,7 @@ //--------------------------------------------------------------------+ // Callback weak stubs (called if application does not provide) //--------------------------------------------------------------------+ -TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* request) { +TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, const tusb_control_request_t* request) { (void) rhport; (void) request; } @@ -61,54 +61,53 @@ typedef struct { usbd_control_xfer_cb_t complete_cb; } usbd_control_xfer_t; -tu_static usbd_control_xfer_t _ctrl_xfer; +static usbd_control_xfer_t _ctrl_xfer; -CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN -tu_static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; +CFG_TUD_MEM_SECTION static struct { + TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_SIZE); +} _ctrl_epbuf; //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ // Queue ZLP status transaction -static inline bool _status_stage_xact(uint8_t rhport, tusb_control_request_t const* request) { +static inline bool status_stage_xact(uint8_t rhport, const tusb_control_request_t* request) { // Opposite to endpoint in Data Phase - uint8_t const ep_addr = request->bmRequestType_bit.direction ? EDPT_CTRL_OUT : EDPT_CTRL_IN; + const uint8_t ep_addr = request->bmRequestType_bit.direction ? EDPT_CTRL_OUT : EDPT_CTRL_IN; return usbd_edpt_xfer(rhport, ep_addr, NULL, 0); } // Status phase -bool tud_control_status(uint8_t rhport, tusb_control_request_t const* request) { +bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) { _ctrl_xfer.request = (*request); _ctrl_xfer.buffer = NULL; _ctrl_xfer.total_xferred = 0; _ctrl_xfer.data_len = 0; - return _status_stage_xact(rhport, request); + return status_stage_xact(rhport, request); } // Queue a transaction in Data Stage // Each transaction has up to Endpoint0's max packet size. // This function can also transfer an zero-length packet -static bool _data_stage_xact(uint8_t rhport) { - uint16_t const xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, - CFG_TUD_ENDPOINT0_SIZE); - +static bool data_stage_xact(uint8_t rhport) { + const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_SIZE); uint8_t ep_addr = EDPT_CTRL_OUT; if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) { ep_addr = EDPT_CTRL_IN; if (xact_len) { - TU_VERIFY(0 == tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)); + TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)); } } - return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _usbd_ctrl_buf : NULL, xact_len); + return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _ctrl_epbuf.buf : NULL, xact_len); } // Transmit data to/from the control endpoint. // If the request's wLength is zero, a status packet is sent instead. -bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const* request, void* buffer, uint16_t len) { +bool tud_control_xfer(uint8_t rhport, const tusb_control_request_t* request, void* buffer, uint16_t len) { _ctrl_xfer.request = (*request); _ctrl_xfer.buffer = (uint8_t*) buffer; _ctrl_xfer.total_xferred = 0U; @@ -118,14 +117,9 @@ bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const* request, voi if (_ctrl_xfer.data_len > 0U) { TU_ASSERT(buffer); } - -// TU_LOG2(" Control total data length is %u bytes\r\n", _ctrl_xfer.data_len); - - // Data stage - TU_ASSERT(_data_stage_xact(rhport)); + TU_ASSERT(data_stage_xact(rhport)); } else { - // Status stage - TU_ASSERT(_status_stage_xact(rhport, request)); + TU_ASSERT(status_stage_xact(rhport, request)); } return true; @@ -135,7 +129,7 @@ bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const* request, voi // USBD API //--------------------------------------------------------------------+ void usbd_control_reset(void); -void usbd_control_set_request(tusb_control_request_t const* request); +void usbd_control_set_request(const tusb_control_request_t* request); void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp); bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); @@ -149,7 +143,7 @@ void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp) { } // for dcd_set_address where DCD is responsible for status response -void usbd_control_set_request(tusb_control_request_t const* request) { +void usbd_control_set_request(const tusb_control_request_t* request) { _ctrl_xfer.request = (*request); _ctrl_xfer.buffer = NULL; _ctrl_xfer.total_xferred = 0; @@ -179,7 +173,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT) { TU_VERIFY(_ctrl_xfer.buffer); - memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes); + memcpy(_ctrl_xfer.buffer, _ctrl_epbuf.buf, xferred_bytes); TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _usbd_ctrl_buf, xferred_bytes, 2); } @@ -204,8 +198,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, } if (is_ok) { - // Send status - TU_ASSERT(_status_stage_xact(rhport, &_ctrl_xfer.request)); + TU_ASSERT(status_stage_xact(rhport, &_ctrl_xfer.request)); } else { // Stall both IN and OUT control endpoint dcd_edpt_stall(rhport, EDPT_CTRL_OUT); @@ -213,7 +206,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, } } else { // More data to transfer - TU_ASSERT(_data_stage_xact(rhport)); + TU_ASSERT(data_stage_xact(rhport)); } return true; |
