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authorhathach <[email protected]>2025-05-21 11:19:07 +0700
committerhathach <[email protected]>2025-05-21 11:19:07 +0700
commitc1d23a0a92bef016e22be3ed8194230cfab1c358 (patch)
tree3c3db1607a1762ab47062208d3ec5295489cc307 /src/osal
parenta4875fefead1a2b27f13a588dea44eaca737f553 (diff)
osal_spin skipping lock/unlock when executed in isr
Diffstat (limited to 'src/osal')
-rw-r--r--src/osal/osal_freertos.h17
-rw-r--r--src/osal/osal_mynewt.h8
-rw-r--r--src/osal/osal_none.h2
-rw-r--r--src/osal/osal_rtthread.h8
-rw-r--r--src/osal/osal_zephyr.h8
5 files changed, 33 insertions, 10 deletions
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 09b6cb338..bde5ec010 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -114,12 +114,16 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
portENTER_CRITICAL(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
portEXIT_CRITICAL(ctx);
}
@@ -133,6 +137,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
if (in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE) {
+ (void) ctx;
+ return; // single core MCU does not need to lock in ISR
+ }
*ctx = taskENTER_CRITICAL_FROM_ISR();
} else {
taskENTER_CRITICAL();
@@ -140,8 +148,11 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bo
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
- (void) ctx;
if (in_isr) {
+ if (!TUP_MCU_MULTIPLE_CORE) {
+ (void) ctx;
+ return; // single core MCU does not need to lock in ISR
+ }
taskEXIT_CRITICAL_FROM_ISR(*ctx);
} else {
taskEXIT_CRITICAL();
diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h
index 58d226b10..ee95e684f 100644
--- a/src/osal/osal_mynewt.h
+++ b/src/osal/osal_mynewt.h
@@ -53,12 +53,16 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
OS_ENTER_CRITICAL(*ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
OS_ENTER_CRITICAL(*ctx);
}
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 2a0170ba4..a8eb1042b 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -47,7 +47,7 @@ typedef struct {
void (* interrupt_set)(bool);
} osal_spinlock_t;
-// For SMP, spinlock must be locked by hardware, not use interrupt
+// For SMP, spinlock must be locked by hardware, cannot just use interrupt
#define OSAL_SPINLOCK_DEF(_name, _int_set) \
osal_spinlock_t _name = { .interrupt_set = _int_set }
diff --git a/src/osal/osal_rtthread.h b/src/osal/osal_rtthread.h
index 97f5dc69a..a778f5425 100644
--- a/src/osal/osal_rtthread.h
+++ b/src/osal/osal_rtthread.h
@@ -55,12 +55,16 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
rt_spin_lock(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
rt_spin_unlock(ctx);
}
diff --git a/src/osal/osal_zephyr.h b/src/osal/osal_zephyr.h
index 7a43b8ec1..91f225f79 100644
--- a/src/osal/osal_zephyr.h
+++ b/src/osal/osal_zephyr.h
@@ -51,12 +51,16 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
ctx->key = k_spin_lock(&ctx->lock);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
- (void) in_isr;
+ if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+ return; // single core MCU does not need to lock in ISR
+ }
k_spin_unlock(&ctx->lock, ctx->key);
}