diff options
| author | hathach <[email protected]> | 2023-05-12 10:58:42 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2023-05-16 11:09:23 +0700 |
| commit | 1e998ce3bd1ecdf535a8a9feb6823627f3cf7c14 (patch) | |
| tree | 61a4618bc362103c6a8f5c0718d5ec034b939094 /src/portable | |
| parent | 2c48050993777c586210af503504e612f31228d8 (diff) | |
usbd: fix control transfer issue for chipidea hs when previous status and new setup complete in the same isr frame
change usbd edpt busy/stalled/claimed value to 0/1 instead of
(true/false) since they are 1-bit field.
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/chipidea/ci_hs/dcd_ci_hs.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index bc6736cf2..9be79a2f1 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -616,15 +616,6 @@ void dcd_int_handler(uint8_t rhport) uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE; dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge - if (dcd_reg->ENDPTSETUPSTAT) - { - //------------- Set up Received -------------// - // 23.10.10.2 Operational model for setup transfers - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; - - dcd_event_setup_received(rhport, (uint8_t*)(uintptr_t) &_dcd_data.qhd[0][0].setup_request, true); - } - // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set // nothing to do, we will submit xfer as error to usbd // if (int_status & INTR_ERROR) { } @@ -637,6 +628,15 @@ void dcd_int_handler(uint8_t rhport) if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); } } + + // Set up Received + // 23.10.10.2 Operational model for setup transfers + // Must be after normal transfer complete since it is possible to have both previous control status + new setup + // in the same frame and we should handle previous status first. + if (dcd_reg->ENDPTSETUPSTAT) { + dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; + dcd_event_setup_received(rhport, (uint8_t *) (uintptr_t) &_dcd_data.qhd[0][0].setup_request, true); + } } if (int_status & INTR_SOF) |