Merge remote-tracking branch 'tinyusb/master' into copilot/fix-dcd-edpt-xfer-issue

Signed-off-by: HiFiPhile <[email protected]>

15 files changed, 163 insertions, 103 deletions

diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 87659701b..719bdeafc 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_H_
-#define _TUSB_EHCI_H_
+#ifndef TUSB_EHCI_H_
+#define TUSB_EHCI_H_
 
 
 /* Abbreviation
@@ -458,4 +458,4 @@ TU_VERIFY_STATIC(sizeof(ehci_cap_registers_t) == 16, "size is not correct");
  }
 #endif
 
-#endif /* _TUSB_EHCI_H_ */
+#endif /* TUSB_EHCI_H_ */
diff --git a/src/portable/ehci/ehci_api.h b/src/portable/ehci/ehci_api.h
index 12e0a73d7..79fbe702a 100644
--- a/src/portable/ehci/ehci_api.h
+++ b/src/portable/ehci/ehci_api.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_API_H_
-#define _TUSB_EHCI_API_H_
+#ifndef TUSB_EHCI_API_H_
+#define TUSB_EHCI_API_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index 067d455c6..ee27e94d3 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -39,8 +39,18 @@
 #if CFG_TUD_ENABLED && ( (CFG_TUSB_MCU == OPT_MCU_NUC121) || (CFG_TUSB_MCU == OPT_MCU_NUC126) )
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NuMicro.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 // Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
 // We disable SOF for now until needed later on
 #ifndef USE_SOF
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index f7593cf25..b35bc09dc 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -39,8 +39,18 @@
 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_NUC505)
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NUC505Series.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 /*
  * The DMA functionality of the USBD peripheral does not appear to succeed with
  * transfer lengths that are longer (> 64 bytes) and are not a multiple of 4.
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
index 654b80866..25c9f9985 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_LPC17_40_H_
-#define _TUSB_DCD_LPC17_40_H_
+#ifndef TUSB_DCD_LPC17_40_H_
+#define TUSB_DCD_LPC17_40_H_
 
 #include "common/tusb_common.h"
 
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index f1689b5b4..a12f7d6ed 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -41,13 +41,16 @@
 #include "host/usbh.h"
 #include "ohci.h"
 
-// TODO remove
-#include "chip.h"
+#if defined(TUP_USBIP_OHCI_NXP)
+  #include "ohci_nxp.h"
+#else
+  #error Unsupported OHCI IP
+#endif
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-#define OHCI_REG               ((ohci_registers_t *) LPC_USB_BASE)
+
 
 enum {
   OHCI_CONTROL_FUNCSTATE_RESET = 0,
@@ -181,6 +184,8 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   (void) rhport;
   (void) rh_init;
 
+  ohci_phy_init(rhport);
+
   //------------- Data Structure init -------------//
   tu_memclr(&ohci_data, sizeof(ohci_data_t));
   for(uint8_t i=0; i<32; i++)
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 94bad5df7..38cc84858 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_OHCI_H_
-#define _TUSB_OHCI_H_
+#ifndef TUSB_OHCI_H_
+#define TUSB_OHCI_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -192,10 +192,10 @@ typedef struct TU_ATTR_ALIGNED(256) {
 //--------------------------------------------------------------------+
 typedef volatile struct
 {
-  uint32_t revision;
+  uint32_t revision;                               // 0x00
 
   union {
-    uint32_t control;
+    uint32_t control;                              // 0x04
     struct {
       uint32_t control_bulk_service_ratio : 2;
       uint32_t periodic_list_enable       : 1;
@@ -211,7 +211,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t command_status;
+    uint32_t command_status;                       // 0x08
     struct {
       uint32_t controller_reset         : 1;
       uint32_t control_list_filled      : 1;
@@ -222,26 +222,24 @@ typedef volatile struct
     }command_status_bit;
   };
 
-  uint32_t interrupt_status;
-  uint32_t interrupt_enable;
-  uint32_t interrupt_disable;
-
-  uint32_t hcca;
-  uint32_t period_current_ed;
-  uint32_t control_head_ed;
-  uint32_t control_current_ed;
-  uint32_t bulk_head_ed;
-  uint32_t bulk_current_ed;
-  uint32_t done_head;
-
-  uint32_t frame_interval;
-  uint32_t frame_remaining;
-  uint32_t frame_number;
-  uint32_t periodic_start;
-  uint32_t lowspeed_threshold;
+  uint32_t interrupt_status;                       // 0x0C
+  uint32_t interrupt_enable;                       // 0x10
+  uint32_t interrupt_disable;                      // 0x14
+  uint32_t hcca;                                   // 0x18
+  uint32_t period_current_ed;                      // 0x1C
+  uint32_t control_head_ed;                        // 0x20
+  uint32_t control_current_ed;                     // 0x24
+  uint32_t bulk_head_ed;                           // 0x28
+  uint32_t bulk_current_ed;                        // 0x2C
+  uint32_t done_head;                              // 0x30
+  uint32_t frame_interval;                         // 0x34
+  uint32_t frame_remaining;                        // 0x38
+  uint32_t frame_number;                           // 0x3C
+  uint32_t periodic_start;                         // 0x40
+  uint32_t lowspeed_threshold;                     // 0x44
 
   union {
-    uint32_t rh_descriptorA;
+    uint32_t rh_descriptorA;                       // 0x48
     struct {
       uint32_t number_downstream_ports     : 8;
       uint32_t power_switching_mode        : 1;
@@ -255,7 +253,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_descriptorB;
+    uint32_t rh_descriptorB;                       // 0x4C
     struct {
       uint32_t device_removable        : 16;
       uint32_t port_power_control_mask : 16;
@@ -263,9 +261,9 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_status;
+    uint32_t rh_status;                            // 0x50
     struct {
-      uint32_t local_power_status            : 1; // read Local Power Status; write: Clear Global Power
+      uint32_t local_power_status            : 1;  // read Local Power Status; write: Clear Global Power
       uint32_t over_current_indicator        : 1;
       uint32_t                               : 13;
       uint32_t device_remote_wakeup_enable   : 1;
@@ -277,7 +275,8 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rhport_status[TUP_OHCI_RHPORTS];
+    uint32_t rhport_status[TUP_OHCI_RHPORTS];      // 0x54
+
     struct {
       uint32_t current_connect_status             : 1;
       uint32_t port_enable_status                 : 1;
@@ -304,4 +303,4 @@ TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "
  }
 #endif
 
-#endif /* _TUSB_OHCI_H_ */
+#endif /* TUSB_OHCI_H_ */
diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/ohci/ohci_nxp.h
index fea3e2a66..9cba05e95 100644
--- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+++ b/src/portable/ohci/ohci_nxp.h
@@ -1,7 +1,7 @@
 /*
  * The MIT License (MIT)
  *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -23,26 +23,48 @@
  *
  * This file is part of the TinyUSB stack.
  */
+#ifndef TUSB_OHCI_NXP_H
+#define TUSB_OHCI_NXP_H
 
-#include "tusb_option.h"
-
-#if CFG_TUH_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
 
 #include "chip.h"
-#include "host/hcd.h"
-#include "host/usbh.h"
+#define OHCI_REG   ((ohci_registers_t *) LPC_USB_BASE)
 
-void hcd_int_enable(uint8_t rhport)
-{
-  (void) rhport;
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
   NVIC_EnableIRQ(USB_IRQn);
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
   NVIC_DisableIRQ(USB_IRQn);
 }
 
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+#else
+
+#include "fsl_device_registers.h"
+
+// for LPC55 USB0 controller
+#define OHCI_REG  ((ohci_registers_t *) USBFSH_BASE)
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+#endif
+
 #endif
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index d59a2b4ee..90eb920e0 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -29,9 +29,20 @@
 #if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB
 
 #include "pico.h"
+
 #include "pio_usb.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#endif
+
 #include "pio_usb_ll.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index dd88f66a7..71837d03c 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_RUSB2_TYPE_H_
-#define _TUSB_RUSB2_TYPE_H_
+#ifndef TUSB_RUSB2_TYPE_H_
+#define TUSB_RUSB2_TYPE_H_
 
 #include <stdint.h>
 #include <stddef.h>
@@ -1777,4 +1777,4 @@ TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR1R_FS ) == 0x0404, "incorrect offset
 }
 #endif
 
-#endif /* _TUSB_RUSB2_TYPE_H_ */
+#endif /* TUSB_RUSB2_TYPE_H_ */
diff --git a/src/portable/sunxi/musb_def.h b/src/portable/sunxi/musb_def.h
index 53da5ded2..ce9b89d55 100644
--- a/src/portable/sunxi/musb_def.h
+++ b/src/portable/sunxi/musb_def.h
@@ -26,8 +26,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MUSB_DEF
-#define _TUSB_MUSB_DEF
+#ifndef TUSB_MUSB_DEF
+#define TUSB_MUSB_DEF
 
 
 #define  USBC_Readb(reg)	                    (*(volatile unsigned char *)(reg))
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index ab30a06e8..2effba704 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -380,7 +380,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
 
     // Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
     if (dir == TUSB_DIR_IN && total_bytes != 0) {
-      dwc2->diepempmsk |= (1 << epnum);
+      dwc2->diepempmsk |= (1u << epnum);
     }
   }
 }
@@ -403,7 +403,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // Set device max speed
   uint32_t dcfg = dwc2->dcfg & ~DCFG_DSPD_Msk;
   if (is_highspeed) {
-    dcfg |= DCFG_DSPD_HS << DCFG_DSPD_Pos;
+    // dcfg Highspeed's mask is 0
 
     // XCVRDLY: transceiver delay between xcvr_sel and txvalid during device chirp is required
     // when using with some PHYs such as USB334x (USB3341, USB3343, USB3346, USB3347)
@@ -917,7 +917,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
     // Turn off TXFE if all bytes are written.
     tsiz.value = epin->tsiz;
     if (tsiz.xfer_size == 0) {
-      dwc2->diepempmsk &= ~(1 << epnum);
+      dwc2->diepempmsk &= ~(1u << epnum);
     }
   }
 }
@@ -1057,6 +1057,8 @@ void dcd_int_handler(uint8_t rhport) {
   if (gintsts & GINTSTS_ENUMDNE) {
     // ENUMDNE is the end of reset where speed of the link is detected
     dwc2->gintsts = GINTSTS_ENUMDNE;
+    // There may be a pending suspend event, so we clear it first
+    dwc2->gintsts = GINTSTS_USBSUSP;
     dwc2->gintmsk |= GINTMSK_USBSUSPM;
     handle_enum_done(rhport);
   }
diff --git a/src/portable/synopsys/dwc2/dwc2_at32.h b/src/portable/synopsys/dwc2/dwc2_at32.h
index 37b6592c4..513495eb1 100644
--- a/src/portable/synopsys/dwc2/dwc2_at32.h
+++ b/src/portable/synopsys/dwc2/dwc2_at32.h
@@ -64,58 +64,59 @@
 #endif
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
- static const dwc2_controller_t _dwc2_controller[] = {
-{.reg_base = DWC2_OTG1_REG_BASE, .irqnum = OTG1_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG1_FIFO_SIZE},
+static const dwc2_controller_t _dwc2_controller[] = {
+    {.reg_base = DWC2_OTG1_REG_BASE, .irqnum = OTG1_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG1_FIFO_SIZE},
 #if defined DWC2_OTG2_REG_BASE
-  {.reg_base = DWC2_OTG2_REG_BASE, .irqnum = OTG2_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG2_FIFO_SIZE}
+    {.reg_base = DWC2_OTG2_REG_BASE, .irqnum = OTG2_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = OTG2_FIFO_SIZE}
 #endif
- };
+};
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
-   (void) role;
-   const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
-   if (enabled) {
-     NVIC_EnableIRQ(irqn);
-   } else {
-     NVIC_DisableIRQ(irqn);
-   }
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
+  (void) role;
+  const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
+  if (enabled) {
+    NVIC_EnableIRQ(irqn);
+  } else {
+    NVIC_DisableIRQ(irqn);
+  }
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) {
+  NVIC_EnableIRQ(_dwc2_controller[rhport].irqnum);
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
-   NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
+  NVIC_DisableIRQ(_dwc2_controller[rhport].irqnum);
+}
 
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
-   // try to delay for 1 ms
-   uint32_t count = system_core_clock / 1000;
-   while (count--) __asm volatile("nop");
- }
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
+  // try to delay for 1 ms
+  uint32_t count = system_core_clock / 1000;
+  while (count--) __asm volatile("nop");
+}
 
- // MCU specific PHY init, called BEFORE core reset
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
-   (void) dwc2;
-   // Enable on-chip HS PHY
-   if (hs_phy_type == GHWCFG2_HSPHY_UTMI || hs_phy_type == GHWCFG2_HSPHY_UTMI_ULPI) {
-   } else if (hs_phy_type == GHWCFG2_HSPHY_NOT_SUPPORTED) {
-   }
- }
+// MCU specific PHY init, called BEFORE core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
+  (void) dwc2;
+  // Enable on-chip HS PHY
+  if (hs_phy_type == GHWCFG2_HSPHY_UTMI || hs_phy_type == GHWCFG2_HSPHY_UTMI_ULPI) {
+  } else if (hs_phy_type == GHWCFG2_HSPHY_NOT_SUPPORTED) {
+  }
+}
 
- // MCU specific PHY update, it is called AFTER init() and core reset
- TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
-   (void) dwc2;
-   (void) hs_phy_type;
+// MCU specific PHY update, it is called AFTER init() and core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t *dwc2, uint8_t hs_phy_type) {
+  (void) dwc2;
+  (void) hs_phy_type;
 
-   dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN | STM32_GCCFG_DCDEN | STM32_GCCFG_PDEN;
- }
+  dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN | STM32_GCCFG_DCDEN | STM32_GCCFG_PDEN;
+}
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* DWC2_GD32_H_ */
+#endif /* DWC2_AT32_H_ */
diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h
index e5824606a..df6d4a852 100644
--- a/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DWC2_BCM_H_
-#define _TUSB_DWC2_BCM_H_
+#ifndef TUSB_DWC2_BCM_H_
+#define TUSB_DWC2_BCM_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.h b/src/portable/valentyusb/eptri/dcd_eptri.h
index d67635d7c..2fe74a712 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.h
+++ b/src/portable/valentyusb/eptri/dcd_eptri.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_VALENTYUSB_EPTRI_H_
-#define _TUSB_DCD_VALENTYUSB_EPTRI_H_
+#ifndef TUSB_DCD_VALENTYUSB_EPTRI_H_
+#define TUSB_DCD_VALENTYUSB_EPTRI_H_
 
 #include "common/tusb_common.h"
 #ifdef __cplusplus
@@ -36,4 +36,4 @@
  }
 #endif
 
-#endif /* _TUSB_DCD_VALENTYUSB_EPTRI_H_ */
+#endif /* TUSB_DCD_VALENTYUSB_EPTRI_H_ */