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authorHa Thach <[email protected]>2025-09-10 17:45:59 +0700
committerGitHub <[email protected]>2025-09-10 17:45:59 +0700
commitb6b22096dd5e2f97a98cccc10ad451ffa1b2b88e (patch)
tree7263ec4f0d02ab15cde17f8a47730e77b61217c5 /src/portable
parent4a8b8220d94ccf16bbab47eac6340ce8572eb7b4 (diff)
parentd70d4043dcccb1628424c39c231ed1f95fb52f8e (diff)
Merge pull request #3126 from salkinium/fix/phyc_pll
[stm32] Wait until the PHYC PLL is stable
Diffstat (limited to 'src/portable')
-rw-r--r--src/portable/synopsys/dwc2/dwc2_stm32.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 5f2b8419c..672891561 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -233,6 +233,9 @@ static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
// Enable PLL internal PHY
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
+
+ // Wait ~2ms until the PLL is ready (there's no RDY bit to query)
+ tusb_time_delay_ms_api(2);
#else
#endif