diff options
| author | MasterPhi <[email protected]> | 2021-06-15 17:53:09 +0200 |
|---|---|---|
| committer | MasterPhi <[email protected]> | 2021-06-15 17:53:09 +0200 |
| commit | ca8e8041ef05ba06d7d01bf1567106a76a793cab (patch) | |
| tree | ca87044f870c32cba7391e32ae6e0000a5a71783 /src/portable | |
| parent | 85fc42356977cac4d893c33eff80937e6ff9b45a (diff) | |
Fix resume, always init FS clock.
Signed-off-by: MasterPhi <[email protected]>
Diffstat (limited to 'src/portable')
| -rw-r--r-- | src/portable/microchip/samx7x/dcd_samx7x.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index a864fda5b..f486e0eed 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -49,7 +49,7 @@ # if TUD_OPT_HIGH_SPEED # define USE_DUAL_BANK 0 # else -# define USE_DUAL_BANK 1 +# define USE_DUAL_BANK 0 # endif #endif @@ -108,12 +108,10 @@ void dcd_init (uint8_t rhport) PMC->CKGR_UCKR = CKGR_UCKR_UPLLEN | CKGR_UCKR_UPLLCOUNT(0x3fU); // Wait until USB UTMI stabilize while (!(PMC->PMC_SR & PMC_SR_LOCKU)); -#if !TUD_OPT_HIGH_SPEED // Enable USB FS clk PMC->PMC_MCKR &= ~PMC_MCKR_UPLLDIV2; PMC->PMC_USB = PMC_USB_USBS | PMC_USB_USBDIV(10 - 1); PMC->PMC_SCER = PMC_SCER_USBCLK; -#endif dcd_connect(rhport); } @@ -346,6 +344,7 @@ void dcd_int_handler(uint8_t rhport) { (void) rhport; uint32_t int_status = USBHS->USBHS_DEVISR; + int_status &= USBHS->USBHS_DEVIMR; // End of reset interrupt if (int_status & USBHS_DEVISR_EORST) { |