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authorhathach <[email protected]>2026-01-03 12:49:01 +0700
committerhathach <[email protected]>2026-01-03 15:06:54 +0700
commite158a3dd38fccd99169a3e5b8cecf7a1ac45915e (patch)
treea69d34c82bfac42f0a9ab04821a0d7e9216d12ea /src/tusb_option.h
parentc87f0db45978b6b1f11f151bf5c061b926dba245 (diff)
hwfifo support custom write/read
rusb use custom write enable all hil test for ra4m1
Diffstat (limited to 'src/tusb_option.h')
-rw-r--r--src/tusb_option.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 8e147707a..0abae6116 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -375,10 +375,11 @@
//------------ RUSB2 --------------//
#if defined(TUP_USBIP_RUSB2)
- #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
- #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 2 // 16-bit data
- #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE_ODD_BYTE_SUPPORT // support odd byte access
- #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0
+ #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
+ #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE (2 + (TUD_OPT_HIGH_SPEED ? 4 : 0)) // 16 bit and 32 bit data if highspeed
+ #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0
+ #define CFG_TUSB_FIFO_HWFIFO_CUSTOM_WRITE // custom write since rusb2 can change access width 32 -> 16 and can write
+ // odd byte with byte access
#endif
//--------------------------------------------------------------------