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authorOkarss <[email protected]>2024-01-07 20:18:33 +0200
committerOkarss <[email protected]>2024-01-10 05:43:20 +0200
commit0d4b24e56cf11e79b46f88f0d8b8656c0444a149 (patch)
treed0d2c749aa384462a508d4177ec7c30f9d4ab1ac /src
parentae364b1460b91153cd94b4b0303eeda6419ff1d1 (diff)
[STM32 FSDEV] Fix ISR race conditions
Diffstat (limited to 'src')
-rw-r--r--src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 21cd3da26..5f7944d1f 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -673,13 +673,13 @@ void dcd_int_handler(uint8_t rhport) {
/* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
if(int_status & USB_ISTR_SOF) {
- USB->ISTR &=~USB_ISTR_SOF;
+ USB->ISTR = ~USB_ISTR_SOF;
dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
}
if(int_status & USB_ISTR_RESET) {
// USBRST is start of reset.
- USB->ISTR &=~USB_ISTR_RESET;
+ USB->ISTR = ~USB_ISTR_RESET;
dcd_handle_bus_reset();
dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
return; // Don't do the rest of the things here; perhaps they've been cleared?
@@ -697,7 +697,7 @@ void dcd_int_handler(uint8_t rhport) {
USB->CNTR &= ~USB_CNTR_LPMODE;
USB->CNTR &= ~USB_CNTR_FSUSP;
- USB->ISTR &=~USB_ISTR_WKUP;
+ USB->ISTR = ~USB_ISTR_WKUP;
dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
}
@@ -711,7 +711,7 @@ void dcd_int_handler(uint8_t rhport) {
USB->CNTR |= USB_CNTR_LPMODE;
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
- USB->ISTR &=~USB_ISTR_SUSP;
+ USB->ISTR = ~USB_ISTR_SUSP;
dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
}
@@ -724,7 +724,7 @@ void dcd_int_handler(uint8_t rhport) {
{
remoteWakeCountdown--;
}
- USB->ISTR &=~USB_ISTR_ESOF;
+ USB->ISTR = ~USB_ISTR_ESOF;
}
}