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authorhathach <[email protected]>2021-12-02 00:03:44 +0700
committerhathach <[email protected]>2021-12-02 00:03:44 +0700
commit207c60d055dd810525db11666b029f322cbaf9e8 (patch)
tree16812817683fe77775224733eed77b202d073b88 /src
parent83dc3e25f002a49f05919c3d8ebac37756641786 (diff)
more chipidea
Diffstat (limited to 'src')
-rw-r--r--src/portable/chipidea/ci_hs/ci_hs_imxrt.h19
-rw-r--r--src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h20
-rw-r--r--src/portable/chipidea/ci_hs/ci_hs_type.h2
-rw-r--r--src/portable/chipidea/ci_hs/dcd_ci_hs.c16
-rw-r--r--src/portable/chipidea/ci_hs/hcd_ci_hs.c48
5 files changed, 34 insertions, 71 deletions
diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index 52671509b..78ca5a5a2 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -27,10 +27,6 @@
#ifndef _CI_HS_IMXRT_H_
#define _CI_HS_IMXRT_H_
-#ifdef __cplusplus
- extern "C" {
-#endif
-
#include "fsl_device_registers.h"
static const ci_hs_controller_t _ci_controller[] =
@@ -44,18 +40,11 @@ static const ci_hs_controller_t _ci_controller[] =
#endif
};
-void dcd_int_enable(uint8_t rhport)
-{
- NVIC_EnableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_DCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum)
-void dcd_int_disable(uint8_t rhport)
-{
- NVIC_DisableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_HCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum)
-#ifdef __cplusplus
- }
-#endif
#endif
diff --git a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
index 1d6accded..8c2e7dfa6 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
@@ -27,10 +27,6 @@
#ifndef _CI_HS_LPC18_43_H_
#define _CI_HS_LPC18_43_H_
-#ifdef __cplusplus
- extern "C" {
-#endif
-
// LPCOpen for 18xx & 43xx
#include "chip.h"
@@ -40,18 +36,10 @@ static const ci_hs_controller_t _ci_controller[] =
{ .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
};
-void dcd_int_enable(uint8_t rhport)
-{
- NVIC_EnableIRQ(_ci_controller[rhport].irqnum);
-}
-
-void dcd_int_disable(uint8_t rhport)
-{
- NVIC_DisableIRQ(_ci_controller[rhport].irqnum);
-}
+#define CI_DCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum)
-#ifdef __cplusplus
- }
-#endif
+#define CI_HCD_INT_ENABLE(_p) NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum)
#endif
diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h
index 810ec15ce..728a86b86 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_type.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_type.h
@@ -127,7 +127,7 @@ typedef struct
volatile uint32_t ENDPTSTAT; ///< Endpoint Status
volatile uint32_t ENDPTCOMPLETE; ///< Endpoint Complete
volatile uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7
-} ci_hs_regs_t, hcd_registers_t;
+} ci_hs_regs_t;
typedef struct
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 6f28862b7..c943396fc 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -43,6 +43,9 @@
#error "Unsupported MCUs"
#endif
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
@@ -52,9 +55,6 @@
#define CleanInvalidateDCache_by_Addr(_addr, _dsize)
#endif
-//--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
-//--------------------------------------------------------------------+
// ENDPTCTRL
enum {
@@ -230,6 +230,16 @@ void dcd_init(uint8_t rhport)
dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect
}
+void dcd_int_enable(uint8_t rhport)
+{
+ CI_DCD_INT_ENABLE(rhport);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+ CI_DCD_INT_DISABLE(rhport);
+}
+
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
{
// Response with status first before changing device address
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index a62ebf2a3..3d028bf32 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -34,47 +34,23 @@
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
+#include "common/tusb_common.h"
+#include "portable/ehci/ehci_api.h"
+#include "ci_hs_type.h"
+
#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
- #include "fsl_device_registers.h"
+ #include "ci_hs_imxrt.h"
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+ #include "ci_hs_lpc18_43.h"
#else
- // LPCOpen for 18xx & 43xx
- #include "chip.h"
+ #error "Unsupported MCUs"
#endif
-#include "common/tusb_common.h"
-#include "ci_hs_type.h"
-#include "portable/ehci/ehci_api.h"
-
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
-// TODO can be merged with dcd_controller_t
-typedef struct
-{
- uint32_t regs_base; // registers base
- const IRQn_Type irqnum; // IRQ number
-}hcd_controller_t;
-
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX
- static const hcd_controller_t _hcd_controller[] =
- {
- // RT1010 and RT1020 only has 1 USB controller
- #if FSL_FEATURE_SOC_USBHS_COUNT == 1
- { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn }
- #else
- { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn },
- { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn }
- #endif
- };
-
-#else
- static const hcd_controller_t _hcd_controller[] =
- {
- { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },
- { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn }
- };
-#endif
+#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
//--------------------------------------------------------------------+
// Controller API
@@ -82,7 +58,7 @@ typedef struct
bool hcd_init(uint8_t rhport)
{
- hcd_registers_t* hcd_reg = (hcd_registers_t*) _hcd_controller[rhport].regs_base;
+ ci_hs_regs_t* hcd_reg = CI_HS_REG(rhport);
// Reset controller
hcd_reg->USBCMD |= USBCMD_RESET;
@@ -106,12 +82,12 @@ bool hcd_init(uint8_t rhport)
void hcd_int_enable(uint8_t rhport)
{
- NVIC_EnableIRQ(_hcd_controller[rhport].irqnum);
+ CI_HCD_INT_ENABLE(rhport);
}
void hcd_int_disable(uint8_t rhport)
{
- NVIC_DisableIRQ(_hcd_controller[rhport].irqnum);
+ CI_HCD_INT_DISABLE(rhport);
}
#endif