diff options
| author | hathach <[email protected]> | 2024-12-17 20:53:50 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-12-17 20:53:50 +0700 |
| commit | 22a6777c2ddcdd1a3c2241d639d7d771131696d3 (patch) | |
| tree | d595d977ab0819b18587c8f74a88a0fa200def98 /src | |
| parent | a39e30db929ae6826ec95ad1279f8e8439fefa0b (diff) | |
enable CFG_TUD/THU_MEM_DCACHE_ENABLE for imxrt with M7 by default
Diffstat (limited to 'src')
| -rw-r--r-- | src/common/tusb_mcu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index d282c890d..a0175d664 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -108,12 +108,20 @@ #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX) + #include "fsl_device_registers.h" + #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 + #if __CORTEX_M == 7 + #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT 1 + #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1 + #define CFG_TUSB_MEM_DCACHE_LINE_SIZE 32 + #endif + #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS |