rename bit_* helper to tu_bit_*, BIT_* to TU_BIT_* for consistency

16 files changed, 198 insertions, 209 deletions

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 7ec7a1eb2..b8678c1c4 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -93,7 +93,7 @@ CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 bool tud_cdc_n_connected(uint8_t itf)

 {

   // DTR (bit 0) active  is considered as connected

-  return BIT_TEST_(_cdcd_itf[itf].line_state, 0);

+  return TU_BIT_TEST(_cdcd_itf[itf].line_state, 0);

 }

 

 uint8_t tud_cdc_n_get_line_state (uint8_t itf)

@@ -349,7 +349,7 @@ bool cdcd_control_request(uint8_t rhport, tusb_control_request_t const * request
       usbd_control_status(rhport, request);

 

       // Invoke callback

-      if ( tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, BIT_TEST_(request->wValue, 0), BIT_TEST_(request->wValue, 1));

+      if ( tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, TU_BIT_TEST(request->wValue, 0), TU_BIT_TEST(request->wValue, 1));

     break;

 

     default: return false; // stall unsupported request

diff --git a/src/class/custom/custom_host.h b/src/class/custom/custom_host.h
index 5522db58b..a5fcb6fb4 100644
--- a/src/class/custom/custom_host.h
+++ b/src/class/custom/custom_host.h
@@ -62,7 +62,7 @@ static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id,
 {
   (void) vendor_id; // TODO check this later
   (void) product_id;
-//  return (tusbh_device_get_mounted_class_flag(dev_addr) & BIT_(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0;
+//  return (tusbh_device_get_mounted_class_flag(dev_addr) & TU_BIT(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0;
   return false;
 }
 
diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h
index 8bfede2da..2e2b45585 100644
--- a/src/class/hid/hid.h
+++ b/src/class/hid/hid.h
@@ -173,11 +173,11 @@ typedef struct ATTR_PACKED
 /// Standard Mouse Buttons Bitmap

 typedef enum

 {

-	MOUSE_BUTTON_LEFT     = BIT_(0), ///< Left button

-	MOUSE_BUTTON_RIGHT    = BIT_(1), ///< Right button

-	MOUSE_BUTTON_MIDDLE   = BIT_(2), ///< Middle button

-  MOUSE_BUTTON_BACKWARD = BIT_(3), ///< Backward button,

-  MOUSE_BUTTON_FORWARD  = BIT_(4), ///< Forward button,

+	MOUSE_BUTTON_LEFT     = TU_BIT(0), ///< Left button

+	MOUSE_BUTTON_RIGHT    = TU_BIT(1), ///< Right button

+	MOUSE_BUTTON_MIDDLE   = TU_BIT(2), ///< Middle button

+  MOUSE_BUTTON_BACKWARD = TU_BIT(3), ///< Backward button,

+  MOUSE_BUTTON_FORWARD  = TU_BIT(4), ///< Forward button,

 }hid_mouse_button_bm_t;

 

 /// @}

@@ -199,23 +199,23 @@ typedef struct ATTR_PACKED
 /// Keyboard modifier codes bitmap

 typedef enum

 {

-	KEYBOARD_MODIFIER_LEFTCTRL   = BIT_(0), ///< Left Control

-	KEYBOARD_MODIFIER_LEFTSHIFT  = BIT_(1), ///< Left Shift

-	KEYBOARD_MODIFIER_LEFTALT    = BIT_(2), ///< Left Alt

-	KEYBOARD_MODIFIER_LEFTGUI    = BIT_(3), ///< Left Window

-	KEYBOARD_MODIFIER_RIGHTCTRL  = BIT_(4), ///< Right Control

-	KEYBOARD_MODIFIER_RIGHTSHIFT = BIT_(5), ///< Right Shift

-	KEYBOARD_MODIFIER_RIGHTALT   = BIT_(6), ///< Right Alt

-	KEYBOARD_MODIFIER_RIGHTGUI   = BIT_(7)  ///< Right Window

+	KEYBOARD_MODIFIER_LEFTCTRL   = TU_BIT(0), ///< Left Control

+	KEYBOARD_MODIFIER_LEFTSHIFT  = TU_BIT(1), ///< Left Shift

+	KEYBOARD_MODIFIER_LEFTALT    = TU_BIT(2), ///< Left Alt

+	KEYBOARD_MODIFIER_LEFTGUI    = TU_BIT(3), ///< Left Window

+	KEYBOARD_MODIFIER_RIGHTCTRL  = TU_BIT(4), ///< Right Control

+	KEYBOARD_MODIFIER_RIGHTSHIFT = TU_BIT(5), ///< Right Shift

+	KEYBOARD_MODIFIER_RIGHTALT   = TU_BIT(6), ///< Right Alt

+	KEYBOARD_MODIFIER_RIGHTGUI   = TU_BIT(7)  ///< Right Window

 }hid_keyboard_modifier_bm_t;

 

 typedef enum

 {

-  KEYBOARD_LED_NUMLOCK    = BIT_(0), ///< Num Lock LED

-  KEYBOARD_LED_CAPSLOCK   = BIT_(1), ///< Caps Lock LED

-  KEYBOARD_LED_SCROLLLOCK = BIT_(2), ///< Scroll Lock LED

-  KEYBOARD_LED_COMPOSE    = BIT_(3), ///< Composition Mode

-  KEYBOARD_LED_KANA       = BIT_(4) ///< Kana mode

+  KEYBOARD_LED_NUMLOCK    = TU_BIT(0), ///< Num Lock LED

+  KEYBOARD_LED_CAPSLOCK   = TU_BIT(1), ///< Caps Lock LED

+  KEYBOARD_LED_SCROLLLOCK = TU_BIT(2), ///< Scroll Lock LED

+  KEYBOARD_LED_COMPOSE    = TU_BIT(3), ///< Composition Mode

+  KEYBOARD_LED_KANA       = TU_BIT(4) ///< Kana mode

 }hid_keyboard_led_bm_t;

 

 /// @}

diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index d4d115bce..5d2758414 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -385,7 +385,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
             p_csw->status = MSC_CSW_STATUS_PASSED;

           }

         }

-        else if ( !BIT_TEST_(p_cbw->dir, 7) )

+        else if ( !TU_BIT_TEST(p_cbw->dir, 7) )

         {

           // OUT transfer

           TU_ASSERT( dcd_edpt_xfer(rhport, p_msc->ep_out, _mscd_buf, p_msc->total_len) );

@@ -426,7 +426,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
 

     case MSC_STAGE_DATA:

       // OUT transfer, invoke callback if needed

-      if ( !BIT_TEST_(p_cbw->dir, 7) )

+      if ( !TU_BIT_TEST(p_cbw->dir, 7) )

       {

         if ( SCSI_CMD_WRITE_10 != p_cbw->command[0] )

         {

diff --git a/src/common/binary.h b/src/common/binary.h
index 7a93ee709..5bc364f2f 100644
--- a/src/common/binary.h
+++ b/src/common/binary.h
@@ -52,49 +52,38 @@
 #include "tusb_compiler.h"

 

 //------------- Bit manipulation -------------//

-#define BIT_(n) (1U << (n))                                ///< n-th Bit

-#define BIT_SET_(x, n) ( (x) | BIT_(n) )                   ///< set n-th bit of x to 1

-#define BIT_CLR_(x, n) ( (x) & (~BIT_(n)) )                ///< clear n-th bit of x

-#define BIT_TEST_(x, n) ( ((x) & BIT_(n)) ? true : false ) ///< check if n-th bit of x is 1

+#define TU_BIT(n) (1U << (n))                                ///< n-th Bit

+#define TU_BIT_SET(x, n) ( (x) | TU_BIT(n) )                   ///< set n-th bit of x to 1

+#define TU_BIT_CLEAR(x, n) ( (x) & (~TU_BIT(n)) )                ///< clear n-th bit of x

+#define TU_BIT_TEST(x, n) ( ((x) & TU_BIT(n)) ? true : false ) ///< check if n-th bit of x is 1

 

-static inline uint32_t bit_set(uint32_t value, uint8_t n)

+static inline uint32_t tu_bit_set(uint32_t value, uint8_t n)

 {

-  return value | BIT_(n);

+  return value | TU_BIT(n);

 }

 

-static inline uint32_t bit_clear(uint32_t value, uint8_t n)

+static inline uint32_t tu_bit_clear(uint32_t value, uint8_t n)

 {

-  return value & (~BIT_(n));

+  return value & (~TU_BIT(n));

 }

 

-static inline bool bit_test(uint32_t value, uint8_t n)

+static inline bool tu_bit_test(uint32_t value, uint8_t n)

 {

-  return (value & BIT_(n)) ? true : false;

+  return (value & TU_BIT(n)) ? true : false;

 }

 

 ///< create a mask with n-bit lsb set to 1

-static inline uint32_t bit_mask(uint8_t n)

+static inline uint32_t tu_bit_mask(uint8_t n)

 {

-  return (n < 32) ? ( BIT_(n) - 1 ) : UINT32_MAX;

+  return (n < 32) ? ( TU_BIT(n) - 1 ) : UINT32_MAX;

 }

 

-static inline uint32_t bit_mask_range(uint8_t start, uint32_t end)

-{

-  return bit_mask(end+1) & ~ bit_mask(start);

-}

-

-static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end, uint32_t pattern)

-{

-  return ( value & ~bit_mask_range(start, end) ) | (pattern << start);

-}

-

-

 //------------- Binary Constant -------------//

 #if defined(__GNUC__) && !defined(__CC_ARM)

 

-#define BIN8(x)               ((uint8_t)  (0b##x))

-#define BIN16(b1, b2)         ((uint16_t) (0b##b1##b2))

-#define BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4))

+#define TU_BIN8(x)               ((uint8_t)  (0b##x))

+#define TU_BIN16(b1, b2)         ((uint16_t) (0b##b1##b2))

+#define TU_BIN32(b1, b2, b3, b4) ((uint32_t) (0b##b1##b2##b3##b4))

 

 #else

 

@@ -108,13 +97,13 @@ static inline uint32_t bit_set_range(uint32_t value, uint8_t start, uint8_t end,
                 +((x&0x0F000000UL)?64:0) \

                 +((x&0xF0000000UL)?128:0))

 

-#define BIN8(d) ((uint8_t) _B8__(0x##d##UL))

-#define BIN16(dmsb,dlsb) (((uint16_t)BIN8(dmsb)<<8) + BIN8(dlsb))

-#define BIN32(dmsb,db2,db3,dlsb) \

-            (((uint32_t)BIN8(dmsb)<<24) \

-            + ((uint32_t)BIN8(db2)<<16) \

-            + ((uint32_t)BIN8(db3)<<8) \

-            + BIN8(dlsb))

+#define TU_BIN8(d) ((uint8_t) _B8__(0x##d##UL))

+#define TU_BIN16(dmsb,dlsb) (((uint16_t)TU_BIN8(dmsb)<<8) + TU_BIN8(dlsb))

+#define TU_BIN32(dmsb,db2,db3,dlsb) \

+            (((uint32_t)TU_BIN8(dmsb)<<24) \

+            + ((uint32_t)TU_BIN8(db2)<<16) \

+            + ((uint32_t)TU_BIN8(db3)<<8) \

+            + TU_BIN8(dlsb))

 #endif

 

 #ifdef __cplusplus

diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 6f0167898..9a6d5a520 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -170,9 +170,9 @@ typedef enum
 }misc_protocol_type_t;

 

 enum {

-  TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = BIT_(5),

-  TUSB_DESC_CONFIG_ATT_SELF_POWER    = BIT_(6),

-  TUSB_DESC_CONFIG_ATT_BUS_POWER     = BIT_(7)

+  TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = TU_BIT(5),

+  TUSB_DESC_CONFIG_ATT_SELF_POWER    = TU_BIT(6),

+  TUSB_DESC_CONFIG_ATT_BUS_POWER     = TU_BIT(7)

 };

 

 #define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)

diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c
index b46c9bc64..b8f724122 100644
--- a/src/host/ehci/ehci.c
+++ b/src/host/ehci/ehci.c
@@ -260,9 +260,9 @@ static bool ehci_init(uint8_t rhport)
   regs->nxp_tt_control = 0;

 

   //------------- USB CMD Register -------------//

-  regs->command |= BIT_(EHCI_USBCMD_POS_RUN_STOP) | BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE)

-                | BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint

-                | ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE)

+  regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE)

+                | TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint

+                | ((EHCI_CFG_FRAMELIST_SIZE_BITS & TU_BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE)

                 | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB);

 

   //------------- ConfigFlag Register (skip) -------------//

@@ -791,19 +791,19 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
       if ( interval < 4) // sub milisecond interval

       {

         p_qhd->interval_ms = 0;

-        p_qhd->int_smask   = (interval == 1) ? BIN8(11111111) :

-                             (interval == 2) ? BIN8(10101010) : BIN8(01000100);

+        p_qhd->int_smask   = (interval == 1) ? TU_BIN8(11111111) :

+                             (interval == 2) ? TU_BIN8(10101010) : TU_BIN8(01000100);

       }else

       {

         p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 );

-        p_qhd->int_smask = BIT_(interval % 8);

+        p_qhd->int_smask = TU_BIT(interval % 8);

       }

     }else

     {

       TU_ASSERT( 0 != interval, );

       // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes

       p_qhd->int_smask    = 0x01;

-      p_qhd->fl_int_cmask = BIN8(11100);

+      p_qhd->fl_int_cmask = TU_BIN8(11100);

       p_qhd->interval_ms  = interval;

     }

   }else

diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h
index c1c274793..23bbb310a 100644
--- a/src/host/ehci/ehci.h
+++ b/src/host/ehci/ehci.h
@@ -294,17 +294,17 @@ TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" );
 // EHCI Operational Register
 //--------------------------------------------------------------------+
 enum ehci_interrupt_mask_{
-  EHCI_INT_MASK_USB                   = BIT_(0),
-  EHCI_INT_MASK_ERROR                 = BIT_(1),
-  EHCI_INT_MASK_PORT_CHANGE           = BIT_(2),
+  EHCI_INT_MASK_USB                   = TU_BIT(0),
+  EHCI_INT_MASK_ERROR                 = TU_BIT(1),
+  EHCI_INT_MASK_PORT_CHANGE           = TU_BIT(2),
 
-  EHCI_INT_MASK_FRAMELIST_ROLLOVER    = BIT_(3),
-  EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = BIT_(4),
-  EHCI_INT_MASK_ASYNC_ADVANCE         = BIT_(5),
-  EHCI_INT_MASK_NXP_SOF               = BIT_(7),
+  EHCI_INT_MASK_FRAMELIST_ROLLOVER    = TU_BIT(3),
+  EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4),
+  EHCI_INT_MASK_ASYNC_ADVANCE         = TU_BIT(5),
+  EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
 
-  EHCI_INT_MASK_NXP_ASYNC             = BIT_(18),
-  EHCI_INT_MASK_NXP_PERIODIC          = BIT_(19),
+  EHCI_INT_MASK_NXP_ASYNC             = TU_BIT(18),
+  EHCI_INT_MASK_NXP_PERIODIC          = TU_BIT(19),
 
   EHCI_INT_MASK_ALL                   =
       EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
@@ -323,9 +323,9 @@ enum ehci_usbcmd_pos_ {
 };
 
 enum ehci_portsc_change_mask_{
-  EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = BIT_(1),
-  EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = BIT_(3),
-  EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = BIT_(5),
+  EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = TU_BIT(1),
+  EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = TU_BIT(3),
+  EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = TU_BIT(5),
 
   EHCI_PORTSC_MASK_ALL =
       EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
diff --git a/src/host/hub.c b/src/host/hub.c
index 6b87e935e..16560a812 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -97,7 +97,7 @@ bool hub_port_clear_feature_subtask(uint8_t hub_addr, uint8_t hub_port, uint8_t
   hub_port_status_response_t * p_port_status;

   p_port_status = (hub_port_status_response_t *) hub_enum_buffer;

 

-  TU_ASSERT( !BIT_TEST_(p_port_status->status_change.value, feature-16)  );

+  TU_ASSERT( !TU_BIT_TEST(p_port_status->status_change.value, feature-16)  );

 

   return true;

 }

@@ -225,7 +225,7 @@ void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xf
     for (uint8_t port=1; port <= p_hub->port_number; port++)

     {

       // TODO HUB ignore bit0 hub_status_change

-      if ( BIT_TEST_(p_hub->status_change, port) )

+      if ( TU_BIT_TEST(p_hub->status_change, port) )

       {

         hcd_event_t event =

         {

diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c
index bebb8a2ef..887b3e561 100644
--- a/src/host/ohci/ohci.c
+++ b/src/host/ohci/ohci.c
@@ -65,10 +65,10 @@ enum {
 

 enum {

   OHCI_CONTROL_CONTROL_BULK_RATIO           = 3, ///< This specifies the service ratio between Control and Bulk EDs. 0 = 1:1, 3 = 4:1

-  OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK    = BIT_(2),

-  OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = BIT_(3),

-  OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK     = BIT_(4),

-  OHCI_CONTROL_LIST_BULK_ENABLE_MASK        = BIT_(5),

+  OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK    = TU_BIT(2),

+  OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = TU_BIT(3),

+  OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK     = TU_BIT(4),

+  OHCI_CONTROL_LIST_BULK_ENABLE_MASK        = TU_BIT(5),

 };

 

 enum {

@@ -81,33 +81,33 @@ enum {
 };

 

 enum {

-  OHCI_INT_SCHEDULING_OVERUN_MASK    = BIT_(0),

-  OHCI_INT_WRITEBACK_DONEHEAD_MASK   = BIT_(1),

-  OHCI_INT_SOF_MASK                  = BIT_(2),

-  OHCI_INT_RESUME_DETECTED_MASK      = BIT_(3),

-  OHCI_INT_UNRECOVERABLE_ERROR_MASK  = BIT_(4),

-  OHCI_INT_FRAME_OVERFLOW_MASK       = BIT_(5),

-  OHCI_INT_RHPORT_STATUS_CHANGE_MASK = BIT_(6),

+  OHCI_INT_SCHEDULING_OVERUN_MASK    = TU_BIT(0),

+  OHCI_INT_WRITEBACK_DONEHEAD_MASK   = TU_BIT(1),

+  OHCI_INT_SOF_MASK                  = TU_BIT(2),

+  OHCI_INT_RESUME_DETECTED_MASK      = TU_BIT(3),

+  OHCI_INT_UNRECOVERABLE_ERROR_MASK  = TU_BIT(4),

+  OHCI_INT_FRAME_OVERFLOW_MASK       = TU_BIT(5),

+  OHCI_INT_RHPORT_STATUS_CHANGE_MASK = TU_BIT(6),

 

-  OHCI_INT_OWNERSHIP_CHANGE_MASK     = BIT_(30),

-  OHCI_INT_MASTER_ENABLE_MASK        = BIT_(31),

+  OHCI_INT_OWNERSHIP_CHANGE_MASK     = TU_BIT(30),

+  OHCI_INT_MASTER_ENABLE_MASK        = TU_BIT(31),

 };

 

 enum {

-  OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK      = BIT_(0),

-  OHCI_RHPORT_PORT_ENABLE_STATUS_MASK          = BIT_(1),

-  OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK         = BIT_(2),

-  OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = BIT_(3),

-  OHCI_RHPORT_PORT_RESET_STATUS_MASK           = BIT_(4), ///< write '1' to reset port

+  OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK      = TU_BIT(0),

+  OHCI_RHPORT_PORT_ENABLE_STATUS_MASK          = TU_BIT(1),

+  OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK         = TU_BIT(2),

+  OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = TU_BIT(3),

+  OHCI_RHPORT_PORT_RESET_STATUS_MASK           = TU_BIT(4), ///< write '1' to reset port

 

-  OHCI_RHPORT_PORT_POWER_STATUS_MASK           = BIT_(8),

-  OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK   = BIT_(9),

+  OHCI_RHPORT_PORT_POWER_STATUS_MASK           = TU_BIT(8),

+  OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK   = TU_BIT(9),

 

-  OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK       = BIT_(16),

-  OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK          = BIT_(17),

-  OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK         = BIT_(18),

-  OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK         = BIT_(19),

-  OHCI_RHPORT_PORT_RESET_CHANGE_MASK           = BIT_(20),

+  OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK       = TU_BIT(16),

+  OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK          = TU_BIT(17),

+  OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK         = TU_BIT(18),

+  OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK         = TU_BIT(19),

+  OHCI_RHPORT_PORT_RESET_CHANGE_MASK           = TU_BIT(20),

 

   OHCI_RHPORT_ALL_CHANGE_MASK = OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK | OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK |

     OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK | OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK | OHCI_RHPORT_PORT_RESET_CHANGE_MASK

@@ -131,7 +131,7 @@ enum {
 

 enum {

   OHCI_INT_ON_COMPLETE_YES = 0,

-  OHCI_INT_ON_COMPLETE_NO  = BIN8(111)

+  OHCI_INT_ON_COMPLETE_NO  = TU_BIN8(111)

 };

 //--------------------------------------------------------------------+

 // INTERNAL OBJECT & FUNCTION DECLARATION

@@ -300,7 +300,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   gtd_init(p_setup, (void*) setup_packet, 8);

   p_setup->index       = dev_addr;

   p_setup->pid         = OHCI_PID_SETUP;

-  p_setup->data_toggle = BIN8(10); // DATA0

+  p_setup->data_toggle = TU_BIN8(10); // DATA0

   p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;

 

   //------------- Attach TDs list to Control Endpoint -------------//

@@ -328,7 +328,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 

     p_data->index       = dev_addr;

     p_data->pid         = dir ? OHCI_PID_IN : OHCI_PID_OUT;

-    p_data->data_toggle = BIN8(11); // DATA1

+    p_data->data_toggle = TU_BIN8(11); // DATA1

     p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;

 

     p_ed->td_head.address = (uint32_t) p_data;

diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index ad5090eb0..7d13ef8c3 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -232,12 +232,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
 
   if ( dir == TUSB_DIR_OUT )
   {
-    NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPOUT0_Pos + epnum);
-    NRF_USBD->EPOUTEN |= BIT_(epnum);
+    NRF_USBD->INTENSET = TU_BIT(USBD_INTEN_ENDEPOUT0_Pos + epnum);
+    NRF_USBD->EPOUTEN |= TU_BIT(epnum);
   }else
   {
-    NRF_USBD->INTENSET = BIT_(USBD_INTEN_ENDEPIN0_Pos + epnum);
-    NRF_USBD->EPINEN  |= BIT_(epnum);
+    NRF_USBD->INTENSET = TU_BIT(USBD_INTEN_ENDEPIN0_Pos + epnum);
+    NRF_USBD->EPINEN  |= TU_BIT(epnum);
   }
   __ISB(); __DSB();
 
@@ -368,9 +368,9 @@ void USBD_IRQHandler(void)
 
   for(uint8_t i=0; i<USBD_INTEN_EPDATA_Pos+1; i++)
   {
-    if ( BIT_TEST_(inten, i) && regevt[i]  )
+    if ( TU_BIT_TEST(inten, i) && regevt[i]  )
     {
-      int_status |= BIT_(i);
+      int_status |= TU_BIT(i);
 
       // event clear
       regevt[i] = 0;
@@ -445,7 +445,7 @@ void USBD_IRQHandler(void)
    */
   for(uint8_t epnum=0; epnum<8; epnum++)
   {
-    if ( BIT_TEST_(int_status, USBD_INTEN_ENDEPOUT0_Pos+epnum))
+    if ( TU_BIT_TEST(int_status, USBD_INTEN_ENDEPOUT0_Pos+epnum))
     {
       xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT);
       uint8_t const xact_len = NRF_USBD->EPOUT[epnum].AMOUNT;
@@ -485,7 +485,7 @@ void USBD_IRQHandler(void)
     // CBI In: Endpoint -> Host (transaction complete)
     for(uint8_t epnum=0; epnum<8; epnum++)
     {
-      if ( BIT_TEST_(data_status, epnum ) || ( epnum == 0 && is_control_in) )
+      if ( TU_BIT_TEST(data_status, epnum ) || ( epnum == 0 && is_control_in) )
       {
         xfer_td_t* xfer = get_td(epnum, TUSB_DIR_IN);
 
@@ -506,7 +506,7 @@ void USBD_IRQHandler(void)
     // CBI OUT: Host -> Endpoint
     for(uint8_t epnum=0; epnum<8; epnum++)
     {
-      if ( BIT_TEST_(data_status, 16+epnum ) || ( epnum == 0 && is_control_out) )
+      if ( TU_BIT_TEST(data_status, 16+epnum ) || ( epnum == 0 && is_control_out) )
       {
         xfer_td_t* xfer = get_td(epnum, TUSB_DIR_OUT);
 
diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c
index c910bf1ec..26ecaf8be 100644
--- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c
+++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c
@@ -64,20 +64,20 @@ enum {
 };
 
 enum {
-  INT_SOF_MASK           = BIT_(30),
-  INT_DEVICE_STATUS_MASK = BIT_(31)
+  INT_SOF_MASK           = TU_BIT(30),
+  INT_DEVICE_STATUS_MASK = TU_BIT(31)
 };
 
 enum {
-  CMDSTAT_DEVICE_ADDR_MASK    = BIT_(7 )-1,
-  CMDSTAT_DEVICE_ENABLE_MASK  = BIT_(7 ),
-  CMDSTAT_SETUP_RECEIVED_MASK = BIT_(8 ),
-  CMDSTAT_DEVICE_CONNECT_MASK = BIT_(16), ///< reflect the softconnect only, does not reflect the actual attached state
-  CMDSTAT_DEVICE_SUSPEND_MASK = BIT_(17),
-  CMDSTAT_CONNECT_CHANGE_MASK = BIT_(24),
-  CMDSTAT_SUSPEND_CHANGE_MASK = BIT_(25),
-  CMDSTAT_RESET_CHANGE_MASK   = BIT_(26),
-  CMDSTAT_VBUS_DEBOUNCED_MASK = BIT_(28),
+  CMDSTAT_DEVICE_ADDR_MASK    = TU_BIT(7 )-1,
+  CMDSTAT_DEVICE_ENABLE_MASK  = TU_BIT(7 ),
+  CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ),
+  CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), ///< reflect the softconnect only, does not reflect the actual attached state
+  CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17),
+  CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24),
+  CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25),
+  CMDSTAT_RESET_CHANGE_MASK   = TU_BIT(26),
+  CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28),
 };
 
 typedef struct ATTR_PACKED
@@ -237,7 +237,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
 
   // Enable EP interrupt
-  LPC_USB->INTEN |= BIT_(ep_id);
+  LPC_USB->INTEN |= TU_BIT(ep_id);
 
   return true;
 }
@@ -296,14 +296,14 @@ static void bus_reset(void)
 
   LPC_USB->INTSTAT      = LPC_USB->INTSTAT; // clear all pending interrupt
   LPC_USB->DEVCMDSTAT  |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt
-  LPC_USB->INTEN        = INT_DEVICE_STATUS_MASK | BIT_(0) | BIT_(1); // enable device status & control endpoints
+  LPC_USB->INTEN        = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints
 }
 
 static void process_xfer_isr(uint32_t int_status)
 {
   for(uint8_t ep_id = 0; ep_id < EP_COUNT; ep_id++ )
   {
-    if ( BIT_TEST_(int_status, ep_id) )
+    if ( TU_BIT_TEST(int_status, ep_id) )
     {
       ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0];
       xfer_dma_t* xfer_dma = &_dcd.dma[ep_id];
@@ -378,7 +378,7 @@ void USB_IRQHandler(void)
   }
 
   // Setup Receive
-  if ( BIT_TEST_(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
+  if ( TU_BIT_TEST(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
   {
     // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints
     _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0;
@@ -392,7 +392,7 @@ void USB_IRQHandler(void)
     _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet);
 
     // clear bit0
-    int_status = BIT_CLR_(int_status, 0);
+    int_status = TU_BIT_CLEAR(int_status, 0);
   }
 
   // Endpoint transfer complete interrupt
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index 82d3c3cac..fca2c355d 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -148,7 +148,7 @@ static inline uint8_t ep_addr2idx(uint8_t ep_addr)
 static void set_ep_size(uint8_t ep_id, uint16_t max_packet_size)
 {
   // follows example in 11.10.4.2
-  LPC_USB->ReEp    |= BIT_(ep_id);
+  LPC_USB->ReEp    |= TU_BIT(ep_id);
   LPC_USB->EpInd    = ep_id; // select index before setting packet size
   LPC_USB->MaxPSize = max_packet_size;
 
@@ -419,15 +419,15 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t
     if ( ep_id % 2 )
     {
       // Clear EP interrupt before Enable DMA
-      LPC_USB->EpIntEn &= ~BIT_(ep_id);
-      LPC_USB->EpDMAEn = BIT_(ep_id);
+      LPC_USB->EpIntEn &= ~TU_BIT(ep_id);
+      LPC_USB->EpDMAEn = TU_BIT(ep_id);
 
       // endpoint IN need to actively raise DMA request
-      LPC_USB->DMARSet = BIT_(ep_id);
+      LPC_USB->DMARSet = TU_BIT(ep_id);
     }else
     {
       // Enable DMA
-      LPC_USB->EpDMAEn = BIT_(ep_id);
+      LPC_USB->EpDMAEn = TU_BIT(ep_id);
     }
 
     return true;
@@ -442,11 +442,11 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t
 static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status)
 {
   // Control out complete
-  if ( ep_int_status & BIT_(0) )
+  if ( ep_int_status & TU_BIT(0) )
   {
     bool is_setup = sie_read(SIE_CMDCODE_ENDPOINT_SELECT+0) & SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK;
 
-    LPC_USB->EpIntClr = BIT_(0);
+    LPC_USB->EpIntClr = TU_BIT(0);
 
     if (is_setup)
     {
@@ -472,9 +472,9 @@ static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status)
   }
 
   // Control In complete
-  if ( ep_int_status & BIT_(1) )
+  if ( ep_int_status & TU_BIT(1) )
   {
-    LPC_USB->EpIntClr = BIT_(1);
+    LPC_USB->EpIntClr = TU_BIT(1);
     dcd_event_xfer_complete(rhport, TUSB_DIR_IN_MASK, _dcd.control.in_bytes, XFER_RESULT_SUCCESS, true);
   }
 }
@@ -546,12 +546,12 @@ void hal_dcd_isr(uint8_t rhport)
   {
     for ( uint8_t ep_id = 3; ep_id < DCD_ENDPOINT_MAX; ep_id += 2 )
     {
-      if ( BIT_TEST_(ep_int_status, ep_id) )
+      if ( TU_BIT_TEST(ep_int_status, ep_id) )
       {
-        LPC_USB->EpIntClr = BIT_(ep_id);
+        LPC_USB->EpIntClr = TU_BIT(ep_id);
 
         // Clear Ep interrupt for next DMA
-        LPC_USB->EpIntEn &= ~BIT_(ep_id);
+        LPC_USB->EpIntEn &= ~TU_BIT(ep_id);
 
         dd_complete_isr(rhport, ep_id);
       }
@@ -569,12 +569,12 @@ void hal_dcd_isr(uint8_t rhport)
 
     for ( uint8_t ep_id = 2; ep_id < DCD_ENDPOINT_MAX; ep_id++ )
     {
-      if ( BIT_TEST_(eot, ep_id) )
+      if ( TU_BIT_TEST(eot, ep_id) )
       {
         if ( ep_id & 0x01 )
         {
           // IN enable EpInt for end of usb transfer
-          LPC_USB->EpIntEn |= BIT_(ep_id);
+          LPC_USB->EpIntEn |= TU_BIT(ep_id);
         }else
         {
           // OUT
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
index d6b76fcd1..eac8ec99b 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -51,45 +51,45 @@
 
 //------------- USB Interrupt USBIntSt -------------//
 //enum {
-//  DCD_USB_REQ_LOW_PRIO_MASK   = BIT_(0),
-//  DCD_USB_REQ_HIGH_PRIO_MASK  = BIT_(1),
-//  DCD_USB_REQ_DMA_MASK        = BIT_(2),
-//  DCD_USB_REQ_NEED_CLOCK_MASK = BIT_(8),
-//  DCD_USB_REQ_ENABLE_MASK     = BIT_(31)
+//  DCD_USB_REQ_LOW_PRIO_MASK   = TU_BIT(0),
+//  DCD_USB_REQ_HIGH_PRIO_MASK  = TU_BIT(1),
+//  DCD_USB_REQ_DMA_MASK        = TU_BIT(2),
+//  DCD_USB_REQ_NEED_CLOCK_MASK = TU_BIT(8),
+//  DCD_USB_REQ_ENABLE_MASK     = TU_BIT(31)
 //};
 
 //------------- Device Interrupt USBDevInt -------------//
 enum {
-  DEV_INT_FRAME_MASK              = BIT_(0),
-  DEV_INT_ENDPOINT_FAST_MASK      = BIT_(1),
-  DEV_INT_ENDPOINT_SLOW_MASK      = BIT_(2),
-  DEV_INT_DEVICE_STATUS_MASK      = BIT_(3),
-  DEV_INT_COMMAND_CODE_EMPTY_MASK = BIT_(4),
-  DEV_INT_COMMAND_DATA_FULL_MASK  = BIT_(5),
-  DEV_INT_RX_ENDPOINT_PACKET_MASK = BIT_(6),
-  DEV_INT_TX_ENDPOINT_PACKET_MASK = BIT_(7),
-  DEV_INT_ENDPOINT_REALIZED_MASK  = BIT_(8),
-  DEV_INT_ERROR_MASK              = BIT_(9)
+  DEV_INT_FRAME_MASK              = TU_BIT(0),
+  DEV_INT_ENDPOINT_FAST_MASK      = TU_BIT(1),
+  DEV_INT_ENDPOINT_SLOW_MASK      = TU_BIT(2),
+  DEV_INT_DEVICE_STATUS_MASK      = TU_BIT(3),
+  DEV_INT_COMMAND_CODE_EMPTY_MASK = TU_BIT(4),
+  DEV_INT_COMMAND_DATA_FULL_MASK  = TU_BIT(5),
+  DEV_INT_RX_ENDPOINT_PACKET_MASK = TU_BIT(6),
+  DEV_INT_TX_ENDPOINT_PACKET_MASK = TU_BIT(7),
+  DEV_INT_ENDPOINT_REALIZED_MASK  = TU_BIT(8),
+  DEV_INT_ERROR_MASK              = TU_BIT(9)
 };
 
 //------------- DMA Interrupt USBDMAInt-------------//
 enum {
-  DMA_INT_END_OF_XFER_MASK    = BIT_(0),
-  DMA_INT_NEW_DD_REQUEST_MASK = BIT_(1),
-  DMA_INT_ERROR_MASK          = BIT_(2)
+  DMA_INT_END_OF_XFER_MASK    = TU_BIT(0),
+  DMA_INT_NEW_DD_REQUEST_MASK = TU_BIT(1),
+  DMA_INT_ERROR_MASK          = TU_BIT(2)
 };
 
 //------------- USBCtrl -------------//
 enum {
-  USBCTRL_READ_ENABLE_MASK  = BIT_(0),
-  USBCTRL_WRITE_ENABLE_MASK = BIT_(1),
+  USBCTRL_READ_ENABLE_MASK  = TU_BIT(0),
+  USBCTRL_WRITE_ENABLE_MASK = TU_BIT(1),
 };
 
 //------------- USBRxPLen -------------//
 enum {
-  USBRXPLEN_PACKET_LENGTH_MASK = (BIT_(10)-1),
-  USBRXPLEN_DATA_VALID_MASK    = BIT_(10),
-  USBRXPLEN_PACKET_READY_MASK  = BIT_(11),
+  USBRXPLEN_PACKET_LENGTH_MASK = (TU_BIT(10)-1),
+  USBRXPLEN_DATA_VALID_MASK    = TU_BIT(10),
+  USBRXPLEN_PACKET_READY_MASK  = TU_BIT(11),
 };
 
 //------------- SIE Command Code -------------//
@@ -121,30 +121,30 @@ enum {
 
 //------------- SIE Device Status (get/set from SIE_CMDCODE_DEVICE_STATUS) -------------//
 enum {
-  SIE_DEV_STATUS_CONNECT_STATUS_MASK = BIT_(0),
-  SIE_DEV_STATUS_CONNECT_CHANGE_MASK = BIT_(1),
-  SIE_DEV_STATUS_SUSPEND_MASK        = BIT_(2),
-  SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = BIT_(3),
-  SIE_DEV_STATUS_RESET_MASK          = BIT_(4)
+  SIE_DEV_STATUS_CONNECT_STATUS_MASK = TU_BIT(0),
+  SIE_DEV_STATUS_CONNECT_CHANGE_MASK = TU_BIT(1),
+  SIE_DEV_STATUS_SUSPEND_MASK        = TU_BIT(2),
+  SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = TU_BIT(3),
+  SIE_DEV_STATUS_RESET_MASK          = TU_BIT(4)
 };
 
 //------------- SIE Select Endpoint Command -------------//
 enum {
-  SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK         = BIT_(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full
-  SIE_SELECT_ENDPOINT_STALL_MASK              = BIT_(1),
-  SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK     = BIT_(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT
-  SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = BIT_(3), // previous packet is overwritten by a SETUP packet
-  SIE_SELECT_ENDPOINT_NAK_MASK                = BIT_(4), // last packet response is NAK (auto clear by an ACK)
-  SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK       = BIT_(5),
-  SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK       = BIT_(6)
+  SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK         = TU_BIT(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full
+  SIE_SELECT_ENDPOINT_STALL_MASK              = TU_BIT(1),
+  SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK     = TU_BIT(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT
+  SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = TU_BIT(3), // previous packet is overwritten by a SETUP packet
+  SIE_SELECT_ENDPOINT_NAK_MASK                = TU_BIT(4), // last packet response is NAK (auto clear by an ACK)
+  SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK       = TU_BIT(5),
+  SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK       = TU_BIT(6)
 };
 
 typedef enum
 {
-  SIE_SET_ENDPOINT_STALLED_MASK           = BIT_(0),
-  SIE_SET_ENDPOINT_DISABLED_MASK          = BIT_(5),
-  SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK     = BIT_(6),
-  SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = BIT_(7),
+  SIE_SET_ENDPOINT_STALLED_MASK           = TU_BIT(0),
+  SIE_SET_ENDPOINT_DISABLED_MASK          = TU_BIT(5),
+  SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK     = TU_BIT(6),
+  SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = TU_BIT(7),
 }sie_endpoint_set_status_mask_t;
 
 //------------- DMA Descriptor Status -------------//
diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c
index 70b34d848..7761d547f 100644
--- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c
+++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c
@@ -94,7 +94,7 @@ static dcd_data_t* const dcd_data_ptr[2] =
 //--------------------------------------------------------------------+
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
-  LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
+  LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | TU_BIT(24);
 }
 
 void dcd_set_config(uint8_t rhport, uint8_t config_num)
@@ -158,7 +158,7 @@ bool dcd_init(uint8_t rhport)
   lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND | INT_MASK_SOF;
 
   lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0
-  lpc_usb->USBCMD_D |= BIT_(0); // connect
+  lpc_usb->USBCMD_D |= TU_BIT(0); // connect
 
   return true;
 }
@@ -284,7 +284,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   {
     // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
     // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out
-    while(LPC_USB[rhport]->ENDPTSETUPSTAT & BIT_(0)) {}
+    while(LPC_USB[rhport]->ENDPTSETUPSTAT & TU_BIT(0)) {}
   }
 
   dcd_qhd_t * p_qhd = &dcd_data_ptr[rhport]->qhd[ep_idx];
@@ -296,7 +296,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
 
   // start transfer
-  LPC_USB[rhport]->ENDPTPRIME = BIT_( ep_idx2bit(ep_idx) ) ;
+  LPC_USB[rhport]->ENDPTPRIME = TU_BIT( ep_idx2bit(ep_idx) ) ;
 
   return true;
 }
@@ -363,7 +363,7 @@ void hal_dcd_isr(uint8_t rhport)
     {
       for(uint8_t ep_idx = 0; ep_idx < QHD_MAX; ep_idx++)
       {
-        if ( BIT_TEST_(edpt_complete, ep_idx2bit(ep_idx)) )
+        if ( TU_BIT_TEST(edpt_complete, ep_idx2bit(ep_idx)) )
         {
           // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
           dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.h b/src/portable/nxp/lpc18_43/dcd_lpc18_43.h
index faf0e3b0f..c380be724 100644
--- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.h
+++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.h
@@ -55,37 +55,37 @@
 
 /*---------- ENDPTCTRL ----------*/
 enum {
-  ENDPTCTRL_MASK_STALL          = BIT_(0),
-  ENDPTCTRL_MASK_TOGGLE_INHIBIT = BIT_(5), ///< used for test only
-  ENDPTCTRL_MASK_TOGGLE_RESET   = BIT_(6),
-  ENDPTCTRL_MASK_ENABLE         = BIT_(7)
+  ENDPTCTRL_MASK_STALL          = TU_BIT(0),
+  ENDPTCTRL_MASK_TOGGLE_INHIBIT = TU_BIT(5), ///< used for test only
+  ENDPTCTRL_MASK_TOGGLE_RESET   = TU_BIT(6),
+  ENDPTCTRL_MASK_ENABLE         = TU_BIT(7)
 };
 
 /*---------- USBCMD ----------*/
 enum {
-  USBCMD_MASK_RUN_STOP         = BIT_(0),
-  USBCMD_MASK_RESET            = BIT_(1),
-  USBCMD_MASK_SETUP_TRIPWIRE   = BIT_(13),
-  USBCMD_MASK_ADD_QTD_TRIPWIRE = BIT_(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
+  USBCMD_MASK_RUN_STOP         = TU_BIT(0),
+  USBCMD_MASK_RESET            = TU_BIT(1),
+  USBCMD_MASK_SETUP_TRIPWIRE   = TU_BIT(13),
+  USBCMD_MASK_ADD_QTD_TRIPWIRE = TU_BIT(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
 };
 // Interrupt Threshold bit 23:16
 
 /*---------- USBSTS, USBINTR ----------*/
 enum {
-  INT_MASK_USB         = BIT_(0),
-  INT_MASK_ERROR       = BIT_(1),
-  INT_MASK_PORT_CHANGE = BIT_(2),
-  INT_MASK_RESET       = BIT_(6),
-  INT_MASK_SOF         = BIT_(7),
-  INT_MASK_SUSPEND     = BIT_(8),
-  INT_MASK_NAK         = BIT_(16)
+  INT_MASK_USB         = TU_BIT(0),
+  INT_MASK_ERROR       = TU_BIT(1),
+  INT_MASK_PORT_CHANGE = TU_BIT(2),
+  INT_MASK_RESET       = TU_BIT(6),
+  INT_MASK_SOF         = TU_BIT(7),
+  INT_MASK_SUSPEND     = TU_BIT(8),
+  INT_MASK_NAK         = TU_BIT(16)
 };
 
 //------------- PORTSC -------------//
 enum {
-  PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0),
-  PORTSC_FORCE_PORT_RESUME_MASK      = BIT_(6),
-  PORTSC_SUSPEND_MASK                = BIT_(7)
+  PORTSC_CURRENT_CONNECT_STATUS_MASK = TU_BIT(0),
+  PORTSC_FORCE_PORT_RESUME_MASK      = TU_BIT(6),
+  PORTSC_SUSPEND_MASK                = TU_BIT(7)
 };
 
 typedef struct