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authorhathach <[email protected]>2019-09-01 23:37:37 +0700
committerGitHub <[email protected]>2019-09-01 23:37:37 +0700
commit47cf7f2245b92ed060edc88c8aa62b9d51946836 (patch)
tree217a33cf4c3f5c3d8894056658cd07cdd13f427b /src
parent1f31d1b4846ef3c14d8687ecf475710194262915 (diff)
parentf2bbb75695650a6f1d43c6d648a9ad10d75019d9 (diff)
Merge pull request #112 from hathach/develop
Adding support for LPC54114
Diffstat (limited to 'src')
-rw-r--r--src/class/hid/hid_device.c2
-rw-r--r--src/class/msc/msc_device.c1
-rw-r--r--src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c (renamed from src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c)22
-rw-r--r--src/tusb_option.h1
4 files changed, 15 insertions, 11 deletions
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 949fd183d..572f2cad2 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -178,7 +178,7 @@ bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t
p_hid->boot_mode = false; // default mode is REPORT
p_hid->itf_num = desc_itf->bInterfaceNumber;
- p_hid->reprot_desc_len = desc_hid->wReportLength;
+ memcpy(&p_hid->reprot_desc_len, &desc_hid->wReportLength, 2);
*p_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t);
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 2ec8962ae..a77282ed5 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -44,6 +44,7 @@ enum
typedef struct
{
+ // TODO optimize alignment
CFG_TUSB_MEM_ALIGN msc_cbw_t cbw;
CFG_TUSB_MEM_ALIGN msc_csw_t csw;
diff --git a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 223c39c1a..0f0858b1b 100644
--- a/src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -26,7 +26,7 @@
#include "tusb_option.h"
-/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller
+/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511
* for almost their new MCUs. Currently supported and tested families are
* - LPC11Uxx
* - LPC13xx
@@ -38,14 +38,15 @@
#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
- CFG_TUSB_MCU == OPT_MCU_LPC51UXX )
+ CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \
+ CFG_TUSB_MCU == OPT_MCU_LPC54XXX )
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
// LPC11Uxx and LPC13xx use lpcopen
#include "chip.h"
#define DCD_REGS LPC_USB
#define DCD_IRQHandler USB_IRQHandler
-#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX
+#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX
#include "fsl_device_registers.h"
#define DCD_REGS USB0
#define DCD_IRQHandler USB0_IRQHandler
@@ -60,19 +61,20 @@
// Number of endpoints
#define EP_COUNT 10
-// only SRAM1 & USB RAM can be used for transfer
+// only SRAM1 & USB RAM can be used for transfer.
+// Used to set DATABUFSTART which is 22-bit aligned
// 2000 0000 to 203F FFFF
#define SRAM_REGION 0x20000000
-/* Although device controller are the same. DMA of
- * - M0/M+ can only transfer up to nbytes = 64
- * - M3/M4 can transfer nbytes = 1023 (maximum)
+/* Although device controller are the same. Somehow only LPC134x can execute
+ * DMA with 1023 bytes for Bulk/Control. Others (11u, 51u, 54xxx) can only work
+ * with max 64 bytes
*/
enum {
- #ifdef __ARM_ARCH_6M__ // Cortex M0/M0+
- DMA_NBYTES_MAX = 64
- #else
+ #if CFG_TUSB_MCU == OPT_MCU_LPC13XX
DMA_NBYTES_MAX = 1023
+ #else
+ DMA_NBYTES_MAX = 64
#endif
};
diff --git a/src/tusb_option.h b/src/tusb_option.h
index bf1fac6ea..83a5c119b 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -43,6 +43,7 @@
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
+#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series