diff options
| author | Michiel van Leeuwen <[email protected]> | 2023-04-28 11:26:26 +0200 |
|---|---|---|
| committer | Michiel van Leeuwen <[email protected]> | 2023-04-28 11:26:26 +0200 |
| commit | 5ade91780578bca10bae048a58fed4b788b553d1 (patch) | |
| tree | 58bf4464756016c06c542ccc6b2ffe0e34b54a6a /src | |
| parent | 2afef458be5ddea97d286f5dd8d3925c4846ee6e (diff) | |
dwc2: configure fifo size to be twice the max_size
This is needed in order to always be able to fit a packet in the fifo.
Writing to the fifo is done from an interrupts that fires when the fifo is
half-empty, so the fifo must be twice the packet size.
Diffstat (limited to 'src')
| -rw-r--r-- | src/portable/synopsys/dwc2/dcd_dwc2.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index c6132a1f5..bcd584953 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -534,6 +534,9 @@ void dcd_init (uint8_t rhport) int_mask = dwc2->gotgint; dwc2->gotgint |= int_mask; + // Configure TX FIFO to set the TX FIFO empty interrupt when half-empty + dwc2->gahbcfg &= ~GAHBCFG_TXFELVL; + // Required as part of core initialization. // TODO: How should mode mismatch be handled? It will cause // the core to stop working/require reset. @@ -645,7 +648,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) xfer->max_size = tu_edpt_packet_size(desc_edpt); xfer->interval = desc_edpt->bInterval; - uint16_t const fifo_size = tu_div_ceil(xfer->max_size, 4); + // The fifo-empty interrupt fires when the interrupt is half empty. In order + // to be able to write a packet at that point, the fifo must be twice the + // max_size. + uint16_t const fifo_size = tu_div_ceil(xfer->max_size * 2, 4); if(dir == TUSB_DIR_OUT) { |
