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authorhathach <[email protected]>2024-11-08 17:23:43 +0700
committerhathach <[email protected]>2024-11-08 17:23:43 +0700
commit5d00488907e5591f35772769a917cf6c3ff97181 (patch)
treed7a3ba6f9ff7c247c8526944abed8f89e0cfec36 /src
parentab8160a29bcfdc451b68c68598cdb5f9d212f395 (diff)
get hcd work esp32p4 but only in slave mode. In DMA channel's HCDMA is increased but data transfer over USB is not correct.
Diffstat (limited to 'src')
-rw-r--r--src/common/tusb_mcu.h3
-rw-r--r--src/portable/synopsys/dwc2/dwc2_esp32.h5
-rw-r--r--src/portable/synopsys/dwc2/dwc2_type.h9
-rw-r--r--src/tusb_option.h13
4 files changed, 25 insertions, 5 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c77afecad..41f552d33 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -169,6 +169,7 @@
defined (STM32F107xB) || defined (STM32F107xC)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
+ #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
#define TUP_DCD_ENDPOINT_MAX 4
#elif defined(STM32F102x6) || defined(STM32F102xB) || \
@@ -343,12 +344,14 @@
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_ESP32
#define TUP_DCD_ENDPOINT_MAX 7 // only 5 TX FIFO for endpoint IN
+ #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
#elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_ESP32
#define TUP_RHPORT_HIGHSPEED 1 // port0 FS, port1 HS
#define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep
+ #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
#if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index a86587786..42ab4b80f 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -100,14 +100,15 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
(void)dwc2;
(void)hs_phy_type;
- // nothing to do
+ // maybe usb_utmi_hal_init()
+
}
// MCU specific PHY update, it is called AFTER init() and core reset
TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
(void)dwc2;
(void)hs_phy_type;
- // nothing to do
+ // maybe usb_utmi_hal_disable()
}
#ifdef __cplusplus
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index dfd61bc32..1247f19a3 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -541,13 +541,22 @@ typedef struct {
volatile uint32_t gotgctl; // 000 OTG Control and Status
volatile dwc2_gotgctl_t gotgctl_bm;
};
+ union {
volatile uint32_t gotgint; // 004 OTG Interrupt
+ volatile dwc2_gotgint_t gotgint_bm;
+ };
+ union {
volatile uint32_t gahbcfg; // 008 AHB Configuration
+ volatile dwc2_gahbcfg_t gahbcfg_bm;
+ };
union {
volatile uint32_t gusbcfg; // 00c USB Configuration
volatile dwc2_gusbcfg_t gusbcfg_bm;
};
+ union {
volatile uint32_t grstctl; // 010 Reset
+ volatile dwc2_grstctl_t grstctl_bm;
+ };
volatile uint32_t gintsts; // 014 Interrupt
volatile uint32_t gintmsk; // 018 Interrupt Mask
volatile uint32_t grxstsr; // 01c Receive Status Debug Read
diff --git a/src/tusb_option.h b/src/tusb_option.h
index b193d9c09..e9b6a5806 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -241,6 +241,8 @@
#include "tusb_config.h"
#endif
+#include "common/tusb_mcu.h"
+
//--------------------------------------------------------------------+
// USBIP
//--------------------------------------------------------------------+
@@ -256,12 +258,18 @@
// Enable DWC2 Slave mode for host
#ifndef CFG_TUH_DWC2_SLAVE_ENABLE
- #define CFG_TUH_DWC2_SLAVE_ENABLE 1
+ #ifndef CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT
+ #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT 1
+ #endif
+ #define CFG_TUH_DWC2_SLAVE_ENABLE CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT
#endif
// Enable DWC2 DMA for host
#ifndef CFG_TUH_DWC2_DMA_ENABLE
- #define CFG_TUH_DWC2_DMA_ENABLE 1
+ #ifndef CFG_TUH_DWC2_DMA_ENABLE_DEFAULT
+ #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 1
+ #endif
+ #define CFG_TUH_DWC2_DMA_ENABLE CFG_TUH_DWC2_DMA_ENABLE_DEFAULT
#endif
// Enable PIO-USB software host controller
@@ -278,7 +286,6 @@
#define CFG_TUH_MAX3421 0
#endif
-#include "common/tusb_mcu.h"
//--------------------------------------------------------------------
// RootHub Mode detection