Merge remote-tracking branch 'tinyusb/master' into copilot/fix-dcd-edpt-xfer-issue

Signed-off-by: HiFiPhile <[email protected]>

45 files changed, 1595 insertions, 1377 deletions

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index bf631908f..9e62c6509 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -48,28 +48,23 @@
 typedef struct {
   uint8_t rhport;
   uint8_t itf_num;
-  uint8_t ep_in;
-  uint8_t ep_out;
-
   uint8_t ep_notify;
   uint8_t line_state; // Bit 0: DTR, Bit 1: RTS
 
   /*------------- From this point, data is not cleared by bus reset -------------*/
-  char wanted_char;
   TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding;
+  char wanted_char;
 
-  // FIFO
-  tu_fifo_t rx_ff;
-  tu_fifo_t tx_ff;
-
-  uint8_t rx_ff_buf[CFG_TUD_CDC_RX_BUFSIZE];
-  uint8_t tx_ff_buf[CFG_TUD_CDC_TX_BUFSIZE];
+  struct {
+    tu_edpt_stream_t tx;
+    tu_edpt_stream_t rx;
 
-  OSAL_MUTEX_DEF(rx_ff_mutex);
-  OSAL_MUTEX_DEF(tx_ff_mutex);
+    uint8_t tx_ff_buf[CFG_TUD_CDC_TX_BUFSIZE];
+    uint8_t rx_ff_buf[CFG_TUD_CDC_RX_BUFSIZE];
+  } stream;
 } cdcd_interface_t;
 
-#define ITF_MEM_RESET_SIZE   offsetof(cdcd_interface_t, wanted_char)
+#define ITF_MEM_RESET_SIZE offsetof(cdcd_interface_t, line_coding)
 
 typedef struct {
   TUD_EPBUF_DEF(epout, CFG_TUD_CDC_EP_BUFSIZE);
@@ -81,110 +76,100 @@ typedef struct {
 } cdcd_epbuf_t;
 
 //--------------------------------------------------------------------+
-// INTERNAL OBJECT & FUNCTION DECLARATION
-//--------------------------------------------------------------------+
-static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
-CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC];
-
-static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT();
-
-static bool _prep_out_transaction(uint8_t itf) {
-  const uint8_t rhport = 0;
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  cdcd_epbuf_t* p_epbuf = &_cdcd_epbuf[itf];
-
-  // Skip if usb is not ready yet
-  TU_VERIFY(tud_ready() && p_cdc->ep_out);
-
-  uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
-
-  // Prepare for incoming data but only allow what we can store in the ring buffer.
-  // TODO Actually we can still carry out the transfer, keeping count of received bytes
-  // and slowly move it to the FIFO when read().
-  // This pre-check reduces endpoint claiming
-  TU_VERIFY(available >= CFG_TUD_CDC_EP_BUFSIZE);
-
-  // claim endpoint
-  TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_out));
-
-  // fifo can be changed before endpoint is claimed
-  available = tu_fifo_remaining(&p_cdc->rx_ff);
-
-  if (available >= CFG_TUD_CDC_EP_BUFSIZE) {
-    return usbd_edpt_xfer(rhport, p_cdc->ep_out, p_epbuf->epout, CFG_TUD_CDC_EP_BUFSIZE, false);
-  } else {
-    // Release endpoint since we don't make any transfer
-    usbd_edpt_release(p_cdc->rhport, p_cdc->ep_out);
-    return false;
-  }
-}
-
-//--------------------------------------------------------------------+
 // Weak stubs: invoked if no strong implementation is available
 //--------------------------------------------------------------------+
 TU_ATTR_WEAK void tud_cdc_rx_cb(uint8_t itf) {
-  (void) itf;
+  (void)itf;
 }
 
 TU_ATTR_WEAK void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) {
-  (void) itf;
-  (void) wanted_char;
+  (void)itf;
+  (void)wanted_char;
 }
 
 TU_ATTR_WEAK void tud_cdc_tx_complete_cb(uint8_t itf) {
-  (void) itf;
+  (void)itf;
 }
 
 TU_ATTR_WEAK void tud_cdc_notify_complete_cb(uint8_t itf) {
-  (void) itf;
+  (void)itf;
 }
 
 TU_ATTR_WEAK void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
-  (void) itf;
-  (void) dtr;
-  (void) rts;
+  (void)itf;
+  (void)dtr;
+  (void)rts;
 }
 
-TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding) {
-  (void) itf;
-  (void) p_line_coding;
+TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, const cdc_line_coding_t *p_line_coding) {
+  (void)itf;
+  (void)p_line_coding;
 }
 
 TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms) {
-  (void) itf;
-  (void) duration_ms;
+  (void)itf;
+  (void)duration_ms;
+}
+
+//--------------------------------------------------------------------+
+// INTERNAL OBJECT & FUNCTION DECLARATION
+//--------------------------------------------------------------------+
+static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC];
+static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT();
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t find_cdc_itf(uint8_t ep_addr) {
+  for (uint8_t idx = 0; idx < CFG_TUD_CDC; idx++) {
+    const cdcd_interface_t *p_cdc = &_cdcd_itf[idx];
+    if (ep_addr == p_cdc->stream.rx.ep_addr || ep_addr == p_cdc->stream.tx.ep_addr ||
+        (ep_addr == p_cdc->ep_notify && ep_addr != 0)) {
+      return idx;
+    }
+  }
+  return TUSB_INDEX_INVALID_8;
 }
 
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
 bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg) {
-  TU_VERIFY(driver_cfg);
+  TU_VERIFY(driver_cfg != NULL);
   _cdcd_cfg = *driver_cfg;
   return true;
 }
 
 bool tud_cdc_n_ready(uint8_t itf) {
-  return tud_ready() && _cdcd_itf[itf].ep_in != 0 && _cdcd_itf[itf].ep_out != 0;
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  TU_VERIFY(tud_ready());
+  const cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+
+  const bool in_opened  = tu_edpt_stream_is_opened(&p_cdc->stream.tx);
+  const bool out_opened = tu_edpt_stream_is_opened(&p_cdc->stream.rx);
+  return in_opened && out_opened;
 }
 
 bool tud_cdc_n_connected(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  TU_VERIFY(tud_ready());
   // DTR (bit 0) active  is considered as connected
-  return tud_ready() && tu_bit_test(_cdcd_itf[itf].line_state, 0);
+  return tu_bit_test(_cdcd_itf[itf].line_state, 0);
 }
 
 uint8_t tud_cdc_n_get_line_state(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
   return _cdcd_itf[itf].line_state;
 }
 
-void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t* coding) {
+void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t *coding) {
+  TU_VERIFY(itf < CFG_TUD_CDC, );
   (*coding) = _cdcd_itf[itf].line_coding;
 }
 
 #if CFG_TUD_CDC_NOTIFY
 bool tud_cdc_n_notify_uart_state (uint8_t itf, const cdc_notify_uart_state_t *state) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  cdcd_epbuf_t* p_epbuf = &_cdcd_epbuf[itf];
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  cdcd_interface_t *p_cdc   = &_cdcd_itf[itf];
+  cdcd_epbuf_t     *p_epbuf = &_cdcd_epbuf[itf];
   TU_VERIFY(tud_ready() && p_cdc->ep_notify != 0);
   TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_notify));
 
@@ -200,8 +185,9 @@ bool tud_cdc_n_notify_uart_state (uint8_t itf, const cdc_notify_uart_state_t *st
 }
 
 bool tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed_change_t* conn_speed_change) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  cdcd_epbuf_t* p_epbuf = &_cdcd_epbuf[itf];
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  cdcd_interface_t *p_cdc   = &_cdcd_itf[itf];
+  cdcd_epbuf_t     *p_epbuf = &_cdcd_epbuf[itf];
   TU_VERIFY(tud_ready() && p_cdc->ep_notify != 0);
   TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_notify));
 
@@ -218,6 +204,7 @@ bool tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed
 #endif
 
 void tud_cdc_n_set_wanted_char(uint8_t itf, char wanted) {
+  TU_VERIFY(itf < CFG_TUD_CDC, );
   _cdcd_itf[itf].wanted_char = wanted;
 }
 
@@ -225,77 +212,53 @@ void tud_cdc_n_set_wanted_char(uint8_t itf, char wanted) {
 // READ API
 //--------------------------------------------------------------------+
 uint32_t tud_cdc_n_available(uint8_t itf) {
-  return tu_fifo_count(&_cdcd_itf[itf].rx_ff);
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
+  return tu_edpt_stream_read_available(&_cdcd_itf[itf].stream.rx);
 }
 
 uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
-  _prep_out_transaction(itf);
-  return num_read;
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  return tu_edpt_stream_read(p_cdc->rhport, &p_cdc->stream.rx, buffer, bufsize);
 }
 
-bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr) {
-  return tu_fifo_peek(&_cdcd_itf[itf].rx_ff, chr);
+bool tud_cdc_n_peek(uint8_t itf, uint8_t *chr) {
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  return tu_edpt_stream_peek(&_cdcd_itf[itf].stream.rx, chr);
 }
 
 void tud_cdc_n_read_flush(uint8_t itf) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  tu_fifo_clear(&p_cdc->rx_ff);
-  _prep_out_transaction(itf);
+  TU_VERIFY(itf < CFG_TUD_CDC, );
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  tu_edpt_stream_clear(&p_cdc->stream.rx);
+  tu_edpt_stream_read_xfer(p_cdc->rhport, &p_cdc->stream.rx);
 }
 
 //--------------------------------------------------------------------+
 // WRITE API
 //--------------------------------------------------------------------+
 uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint16_t wr_count = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
-
-  // flush if queue more than packet size
-  if (tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
-      #if CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE
-      || tu_fifo_full(&p_cdc->tx_ff) // check full if fifo size is less than packet size
-      #endif
-      ) {
-    tud_cdc_n_write_flush(itf);
-  }
-
-  return wr_count;
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  return tu_edpt_stream_write(p_cdc->rhport, &p_cdc->stream.tx, buffer, bufsize);
 }
 
 uint32_t tud_cdc_n_write_flush(uint8_t itf) {
-  cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  cdcd_epbuf_t* p_epbuf = &_cdcd_epbuf[itf];
-  TU_VERIFY(tud_ready(), 0); // Skip if usb is not ready yet
-
-  // No data to send
-  if (0 == tu_fifo_count(&p_cdc->tx_ff)) {
-    return 0;
-  }
-
-  TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_in), 0); // Claim the endpoint
-
-  // Pull data from FIFO
-  const uint16_t count = tu_fifo_read_n(&p_cdc->tx_ff, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE);
-
-  if (count > 0) {
-    TU_ASSERT(usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_in, p_epbuf->epin, count, false), 0);
-    return count;
-  } else {
-    // Release endpoint since we don't make any transfer
-    // Note: data is dropped if terminal is not connected
-    usbd_edpt_release(p_cdc->rhport, p_cdc->ep_in);
-    return 0;
-  }
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  return tu_edpt_stream_write_xfer(p_cdc->rhport, &p_cdc->stream.tx);
 }
 
 uint32_t tud_cdc_n_write_available(uint8_t itf) {
-  return tu_fifo_remaining(&_cdcd_itf[itf].tx_ff);
+  TU_VERIFY(itf < CFG_TUD_CDC, 0);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  return tu_edpt_stream_write_available(p_cdc->rhport, &p_cdc->stream.tx);
 }
 
 bool tud_cdc_n_write_clear(uint8_t itf) {
-  return tu_fifo_clear(&_cdcd_itf[itf].tx_ff);
+  TU_VERIFY(itf < CFG_TUD_CDC);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[itf];
+  return tu_edpt_stream_clear(&p_cdc->stream.tx);
 }
 
 //--------------------------------------------------------------------+
@@ -304,7 +267,8 @@ bool tud_cdc_n_write_clear(uint8_t itf) {
 void cdcd_init(void) {
   tu_memclr(_cdcd_itf, sizeof(_cdcd_itf));
   for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
-    cdcd_interface_t* p_cdc = &_cdcd_itf[i];
+    cdcd_interface_t *p_cdc   = &_cdcd_itf[i];
+    cdcd_epbuf_t     *p_epbuf = &_cdcd_epbuf[i];
 
     p_cdc->wanted_char = (char) -1;
 
@@ -314,44 +278,23 @@ void cdcd_init(void) {
     p_cdc->line_coding.parity = 0;
     p_cdc->line_coding.data_bits = 8;
 
-    // Config RX fifo
-    tu_fifo_config(&p_cdc->rx_ff, p_cdc->rx_ff_buf, TU_ARRAY_SIZE(p_cdc->rx_ff_buf), 1, false);
+    tu_edpt_stream_init(&p_cdc->stream.rx, false, false, false, p_cdc->stream.rx_ff_buf, CFG_TUD_CDC_RX_BUFSIZE,
+                        p_epbuf->epout, CFG_TUD_CDC_EP_BUFSIZE);
 
     // TX fifo can be configured to change to overwritable if not connected (DTR bit not set). Without DTR we do not
     // know if data is actually polled by terminal. This way the most current data is prioritized.
     // Default: is overwritable
-    tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, _cdcd_cfg.tx_overwritabe_if_not_connected);
-
-    #if OSAL_MUTEX_REQUIRED
-    osal_mutex_t mutex_rd = osal_mutex_create(&p_cdc->rx_ff_mutex);
-    osal_mutex_t mutex_wr = osal_mutex_create(&p_cdc->tx_ff_mutex);
-    TU_ASSERT(mutex_rd != NULL && mutex_wr != NULL, );
-
-    tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, mutex_rd);
-    tu_fifo_config_mutex(&p_cdc->tx_ff, mutex_wr, NULL);
-    #endif
+    tu_edpt_stream_init(&p_cdc->stream.tx, false, true, _cdcd_cfg.tx_overwritabe_if_not_connected,
+                        p_cdc->stream.tx_ff_buf, CFG_TUD_CDC_TX_BUFSIZE, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE);
   }
 }
 
 bool cdcd_deinit(void) {
-  #if OSAL_MUTEX_REQUIRED
-  for(uint8_t i=0; i<CFG_TUD_CDC; i++) {
+  for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
-    const osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
-    const osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
-
-    if (mutex_rd != NULL) {
-      osal_mutex_delete(mutex_rd);
-      tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, NULL);
-    }
-
-    if (mutex_wr != NULL) {
-      osal_mutex_delete(mutex_wr);
-      tu_fifo_config_mutex(&p_cdc->tx_ff, NULL, NULL);
-    }
+    tu_edpt_stream_deinit(&p_cdc->stream.rx);
+    tu_edpt_stream_deinit(&p_cdc->stream.tx);
   }
-  #endif
-
   return true;
 }
 
@@ -360,74 +303,85 @@ void cdcd_reset(uint8_t rhport) {
 
   for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
-
     tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
-    if (!_cdcd_cfg.rx_persistent) {
-      tu_fifo_clear(&p_cdc->rx_ff);
-    }
-    if (!_cdcd_cfg.tx_persistent) {
-      tu_fifo_clear(&p_cdc->tx_ff);
-    }
-    tu_fifo_set_overwritable(&p_cdc->tx_ff, _cdcd_cfg.tx_overwritabe_if_not_connected);
+
+    tu_fifo_set_overwritable(&p_cdc->stream.tx.ff, _cdcd_cfg.tx_overwritabe_if_not_connected); // back to default
+    tu_edpt_stream_close(&p_cdc->stream.rx);
+    tu_edpt_stream_close(&p_cdc->stream.tx);
   }
 }
 
 uint16_t cdcd_open(uint8_t rhport, const tusb_desc_interface_t* itf_desc, uint16_t max_len) {
   // Only support ACM subclass
-  TU_VERIFY( TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
-             CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass, 0);
+  TU_VERIFY(TUSB_CLASS_CDC == itf_desc->bInterfaceClass &&
+              CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass,
+            0);
 
-  // Find available interface
-  cdcd_interface_t* p_cdc;
-  uint8_t cdc_id;
-  for (cdc_id = 0; cdc_id < CFG_TUD_CDC; cdc_id++) {
-    p_cdc = &_cdcd_itf[cdc_id];
-    if (p_cdc->ep_in == 0) {
-      break;
-    }
-  }
+  const uint8_t cdc_id = find_cdc_itf(0); // Find available interface
   TU_ASSERT(cdc_id < CFG_TUD_CDC, 0);
+  cdcd_interface_t *p_cdc = &_cdcd_itf[cdc_id];
 
   //------------- Control Interface -------------//
   p_cdc->rhport = rhport;
   p_cdc->itf_num = itf_desc->bInterfaceNumber;
 
-  uint16_t drv_len = sizeof(tusb_desc_interface_t);
-  const uint8_t* p_desc = tu_desc_next(itf_desc);
+  const uint8_t *p_desc   = (const uint8_t *)itf_desc;
+  const uint8_t *desc_end = p_desc + max_len;
 
-  // Communication Functional Descriptors
-  while (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc) && drv_len <= max_len) {
-    drv_len += tu_desc_len(p_desc);
+  // Skip all class-specific descriptor
+  p_desc = tu_desc_next(itf_desc);
+  while (tu_desc_in_bounds(p_desc, desc_end) && TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) {
     p_desc = tu_desc_next(p_desc);
   }
 
+  // notification endpoint (optional)
   if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) {
-    // notification endpoint
     const tusb_desc_endpoint_t* desc_ep = (const tusb_desc_endpoint_t*) p_desc;
     TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
     p_cdc->ep_notify = desc_ep->bEndpointAddress;
 
-    drv_len += tu_desc_len(p_desc);
     p_desc = tu_desc_next(p_desc);
   }
 
-  //------------- Data Interface (if any) -------------//
-  if ((TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
-      (TUSB_CLASS_CDC_DATA == ((const tusb_desc_interface_t*) p_desc)->bInterfaceClass)) {
-    // next to endpoint descriptor
-    drv_len += tu_desc_len(p_desc);
-    p_desc = tu_desc_next(p_desc);
+  //------------- Data Interface (optional) -------------//
+  if (TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) {
+    const tusb_desc_interface_t *data_itf_desc = (const tusb_desc_interface_t *)p_desc;
+    if (TUSB_CLASS_CDC_DATA == data_itf_desc->bInterfaceClass) {
+      for (uint8_t e = 0; e < data_itf_desc->bNumEndpoints; e++) {
+        if (!tu_desc_in_bounds(p_desc, desc_end)) {
+          break;
+        }
+        p_desc = tu_desc_next(p_desc);
 
-    // Open endpoint pair
-    TU_ASSERT(usbd_open_edpt_pair(rhport, p_desc, 2, TUSB_XFER_BULK, &p_cdc->ep_out, &p_cdc->ep_in), 0);
+        const tusb_desc_endpoint_t *desc_ep = (const tusb_desc_endpoint_t *)p_desc;
+        TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType && TUSB_XFER_BULK == desc_ep->bmAttributes.xfer, 0);
 
-    drv_len += 2 * sizeof(tusb_desc_endpoint_t);
-  }
+        TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
+        if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
+          tu_edpt_stream_t *stream_tx = &p_cdc->stream.tx;
+
+          tu_edpt_stream_open(stream_tx, desc_ep);
+          if (_cdcd_cfg.tx_persistent) {
+            tu_edpt_stream_write_xfer(rhport, stream_tx); // flush pending data
+          } else {
+            tu_edpt_stream_clear(stream_tx);
+          }
+        } else {
+          tu_edpt_stream_t *stream_rx = &p_cdc->stream.rx;
 
-  // Prepare for incoming data
-  _prep_out_transaction(cdc_id);
+          tu_edpt_stream_open(stream_rx, desc_ep);
+          if (!_cdcd_cfg.rx_persistent) {
+            tu_edpt_stream_clear(stream_rx);
+          }
+          TU_ASSERT(tu_edpt_stream_read_xfer(rhport, stream_rx) > 0, 0); // prepare for incoming data
+        }
+      }
 
-  return drv_len;
+      p_desc = tu_desc_next(p_desc);
+    }
+  }
+
+  return (uint16_t)(p_desc - (const uint8_t *)itf_desc);
 }
 
 // Invoked when a control transfer occurred on an interface of this class
@@ -449,7 +403,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
   }
   TU_VERIFY(itf < CFG_TUD_CDC);
 
-  switch (request->bRequest) { //-V2520 //-V2659
+  switch (request->bRequest) {
     case CDC_REQUEST_SET_LINE_CODING:
       if (stage == CONTROL_STAGE_SETUP) {
         TU_LOG_DRV("  Set Line Coding\r\n");
@@ -484,15 +438,13 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
 
         // If enabled: fifo overwriting is disabled if DTR bit is set and vice versa
         if (_cdcd_cfg.tx_overwritabe_if_not_connected) {
-          tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
+          tu_fifo_set_overwritable(&p_cdc->stream.tx.ff, !dtr);
         } else {
-          tu_fifo_set_overwritable(&p_cdc->tx_ff, false);
+          tu_fifo_set_overwritable(&p_cdc->stream.tx.ff, false);
         }
 
         TU_LOG_DRV("  Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
-
-        // Invoke callback
-        tud_cdc_line_state_cb(itf, dtr, rts);
+        tud_cdc_line_state_cb(itf, dtr, rts); // invoke callback
       } else {
         // nothing to do
       }
@@ -507,7 +459,6 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
       } else {
         // nothing to do
       }
-
       break;
 
     default:
@@ -518,58 +469,45 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
 }
 
 bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
-  (void) result;
+  (void)result;
 
-  uint8_t itf;
-  cdcd_interface_t* p_cdc;
-
-  // Identify which interface to use
-  for (itf = 0; itf < CFG_TUD_CDC; itf++) {
-    p_cdc = &_cdcd_itf[itf];
-    if ((ep_addr == p_cdc->ep_out) || (ep_addr == p_cdc->ep_in) || (ep_addr == p_cdc->ep_notify)) {
-      break;
-    }
-  }
+  uint8_t itf = find_cdc_itf(ep_addr);
   TU_ASSERT(itf < CFG_TUD_CDC);
-  cdcd_epbuf_t* p_epbuf = &_cdcd_epbuf[itf];
+  cdcd_interface_t *p_cdc     = &_cdcd_itf[itf];
+  tu_edpt_stream_t *stream_rx = &p_cdc->stream.rx;
+  tu_edpt_stream_t *stream_tx = &p_cdc->stream.tx;
 
-  // Received new data
-  if (ep_addr == p_cdc->ep_out) {
-    tu_fifo_write_n(&p_cdc->rx_ff, p_epbuf->epout, (uint16_t) xferred_bytes);
+  // Received new data, move to fifo
+  if (ep_addr == stream_rx->ep_addr) {
+    tu_edpt_stream_read_xfer_complete(stream_rx, xferred_bytes);
 
-    // Check for wanted char and invoke callback if needed
-    if (((signed char) p_cdc->wanted_char) != -1) {
+    // Check for wanted char and invoke wanted callback (multiple times if multiple wanted received)
+    if (((signed char)p_cdc->wanted_char) != -1) {
       for (uint32_t i = 0; i < xferred_bytes; i++) {
-        if ((p_cdc->wanted_char == (char) p_epbuf->epout[i]) && !tu_fifo_empty(&p_cdc->rx_ff)) {
+        if ((p_cdc->wanted_char == (char)stream_rx->ep_buf[i]) && !tu_edpt_stream_empty(stream_rx)) {
           tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char);
         }
       }
     }
 
-    // invoke receive callback (if there is still data)
-    if (!tu_fifo_empty(&p_cdc->rx_ff)) {
+    // invoke receive callback if there is still data
+    if (!tu_edpt_stream_empty(stream_rx)) {
       tud_cdc_rx_cb(itf);
     }
 
-    // prepare for OUT transaction
-    _prep_out_transaction(itf);
+    tu_edpt_stream_read_xfer(rhport, stream_rx); // prepare for more data
   }
 
   // Data sent to host, we continue to fetch from tx fifo to send.
   // Note: This will cause incorrect baudrate set in line coding.
   //       Though maybe the baudrate is not really important !!!
-  if (ep_addr == p_cdc->ep_in) {
+  if (ep_addr == stream_tx->ep_addr) {
     // invoke transmit callback to possibly refill tx fifo
     tud_cdc_tx_complete_cb(itf);
 
-    if (0 == tud_cdc_n_write_flush(itf)) {
-      // If there is no data left, a ZLP should be sent if
-      // xferred_bytes is multiple of EP Packet size and not zero
-      if (0 == tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes > 0 && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
-        if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
-          TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0, false));
-        }
-      }
+    if (0 == tu_edpt_stream_write_xfer(rhport, stream_tx)) {
+      // If there is no data left, a ZLP should be sent if needed
+      tu_edpt_stream_write_zlp_if_needed(rhport, stream_tx, xferred_bytes);
     }
   }
 
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 7fdf0a7b9..35717ddf6 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -298,6 +298,7 @@ TU_VERIFY_STATIC(TU_ARRAY_SIZE(serial_drivers) == SERIAL_DRIVER_COUNT, "Serial d
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
+static bool open_ep_stream_pair(cdch_interface_t *p_cdc, const tusb_desc_endpoint_t *desc_ep);
 
 TU_ATTR_ALWAYS_INLINE static inline cdch_interface_t * get_itf(uint8_t idx) {
   TU_ASSERT(idx < CFG_TUH_CDC, NULL);
@@ -364,7 +365,7 @@ static cdch_interface_t* get_itf_by_xfer(const tuh_xfer_t * xfer) {
         #endif
 
         default:
-          break;
+          break; // unknown driver
       }
     }
   }
@@ -389,8 +390,6 @@ static cdch_interface_t * make_new_itf(uint8_t daddr, tusb_desc_interface_t cons
   return NULL;
 }
 
-static bool open_ep_stream_pair(cdch_interface_t * p_cdc , tusb_desc_endpoint_t const *desc_ep);
-
 //--------------------------------------------------------------------+
 // Weak stubs: invoked if no strong implementation is available
 //--------------------------------------------------------------------+
@@ -519,7 +518,7 @@ bool tuh_cdc_read_clear (uint8_t idx) {
   TU_VERIFY(p_cdc);
 
   bool ret = tu_edpt_stream_clear(&p_cdc->stream.rx);
-  tu_edpt_stream_read_xfer(p_cdc->daddr, &p_cdc->stream.rx);
+  (void)tu_edpt_stream_read_xfer(p_cdc->daddr, &p_cdc->stream.rx);
   return ret;
 }
 
@@ -648,13 +647,10 @@ bool cdch_init(void) {
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
     cdch_interface_t *p_cdc = &cdch_data[i];
     cdch_epbuf_t *epbuf = &cdch_epbuf[i];
-    tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false,
-                        p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE,
-                        epbuf->tx, CFG_TUH_CDC_TX_EPSIZE);
-
-    tu_edpt_stream_init(&p_cdc->stream.rx, true, false, false,
-                        p_cdc->stream.rx_ff_buf, CFG_TUH_CDC_RX_BUFSIZE,
-                        epbuf->rx, CFG_TUH_CDC_RX_EPSIZE);
+    TU_ASSERT(tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false, p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE,
+                                  epbuf->tx, CFG_TUH_CDC_TX_EPSIZE));
+    TU_ASSERT(tu_edpt_stream_init(&p_cdc->stream.rx, true, false, false, p_cdc->stream.rx_ff_buf,
+                                  CFG_TUH_CDC_RX_BUFSIZE, epbuf->rx, CFG_TUH_CDC_RX_EPSIZE));
   }
 
   return true;
@@ -663,8 +659,8 @@ bool cdch_init(void) {
 bool cdch_deinit(void) {
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
     cdch_interface_t *p_cdc = &cdch_data[i];
-    tu_edpt_stream_deinit(&p_cdc->stream.tx);
-    tu_edpt_stream_deinit(&p_cdc->stream.rx);
+    (void)tu_edpt_stream_deinit(&p_cdc->stream.tx);
+    (void)tu_edpt_stream_deinit(&p_cdc->stream.rx);
   }
   return true;
 }
@@ -674,11 +670,9 @@ void cdch_close(uint8_t daddr) {
     cdch_interface_t *p_cdc = &cdch_data[idx];
     if (p_cdc->daddr == daddr) {
       TU_LOG_CDC(p_cdc, "close");
+      tuh_cdc_umount_cb(idx); // invoke callback
 
-      // Invoke application callback
-      tuh_cdc_umount_cb(idx);
-
-      p_cdc->daddr = 0;
+      p_cdc->daddr            = 0;
       p_cdc->bInterfaceNumber = 0;
       p_cdc->mounted = false;
       tu_edpt_stream_close(&p_cdc->stream.tx);
@@ -696,13 +690,12 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   TU_ASSERT(p_cdc);
 
   if (ep_addr == p_cdc->stream.tx.ep_addr) {
-    // invoke tx complete callback to possibly refill tx fifo
-    tuh_cdc_tx_complete_cb(idx);
+    tuh_cdc_tx_complete_cb(idx); // invoke transmit complete callback
 
     if (0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx)) {
       // If there is no data left, a ZLP should be sent if:
       // - xferred_bytes is multiple of EP Packet size and not zero
-      tu_edpt_stream_write_zlp_if_needed(daddr, &p_cdc->stream.tx, xferred_bytes);
+      (void)tu_edpt_stream_write_zlp_if_needed(daddr, &p_cdc->stream.tx, xferred_bytes);
     }
   } else if (ep_addr == p_cdc->stream.rx.ep_addr) {
     #if CFG_TUH_CDC_FTDI
@@ -718,7 +711,6 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
     #endif
     {
       tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
-
       tuh_cdc_rx_cb(idx); // invoke receive callback
     }
 
@@ -727,7 +719,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   } else if (ep_addr == p_cdc->ep_notif) {
     // TODO handle notification endpoint
   } else {
-    TU_ASSERT(false);
+    return false;
   }
 
   return true;
@@ -736,20 +728,17 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 //--------------------------------------------------------------------+
 // Enumeration
 //--------------------------------------------------------------------+
-
 static bool open_ep_stream_pair(cdch_interface_t *p_cdc, tusb_desc_endpoint_t const *desc_ep) {
   for (size_t i = 0; i < 2; i++) {
     TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType &&
               TUSB_XFER_BULK == desc_ep->bmAttributes.xfer);
     TU_ASSERT(tuh_edpt_open(p_cdc->daddr, desc_ep));
+    tu_edpt_stream_t *stream =
+      (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) ? &p_cdc->stream.rx : &p_cdc->stream.tx;
+    tu_edpt_stream_open(stream, desc_ep);
+    tu_edpt_stream_clear(stream);
 
-    if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
-      tu_edpt_stream_open(&p_cdc->stream.rx, desc_ep);
-    } else {
-      tu_edpt_stream_open(&p_cdc->stream.tx, desc_ep);
-    }
-
-    desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(desc_ep);
+    desc_ep = (const tusb_desc_endpoint_t *)tu_desc_next(desc_ep);
   }
 
   return true;
@@ -832,6 +821,7 @@ static void cdch_process_set_config(tuh_xfer_t *xfer) {
   }
 }
 
+// return false if there is no active transfer
 static bool set_line_state_on_enum(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
   enum {
     ENUM_SET_LINE_CODING = 0,
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index 0d2b63b57..d3cc53918 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -50,21 +50,17 @@
 typedef struct {
   uint8_t attrs;
   uint8_t alt;
+  uint8_t state;
+  uint8_t status;
 
-  dfu_state_t state;
-  dfu_status_t status;
-
-  bool flashing_in_progress;
+  bool     flashing_in_progress;
   uint16_t block;
   uint16_t length;
 } dfu_state_ctx_t;
 
-// Only a single dfu state is allowed
 static dfu_state_ctx_t _dfu_ctx;
 
-CFG_TUD_MEM_SECTION static struct {
-  TUD_EPBUF_DEF(transfer_buf, CFG_TUD_DFU_XFER_BUFSIZE);
-} _dfu_epbuf;
+TU_ATTR_ALIGNED(4) uint8_t _transfer_buf[CFG_TUD_DFU_XFER_BUFSIZE];
 
 static void reset_state(void) {
   _dfu_ctx.state = DFU_IDLE;
@@ -253,6 +249,8 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control
           tud_control_status(rhport, request);
         } else if (stage == CONTROL_STAGE_ACK) {
           tud_dfu_detach_cb();
+        } else {
+          // nothing to do
         }
         break;
 
@@ -275,6 +273,8 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control
           tud_control_status(rhport, request);
         } else if (stage == CONTROL_STAGE_ACK) {
           tud_dfu_abort_cb(_dfu_ctx.alt);
+        } else {
+          // nothing to do
         }
         break;
 
@@ -283,10 +283,10 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control
           TU_VERIFY(_dfu_ctx.attrs & DFU_ATTR_CAN_UPLOAD);
           TU_VERIFY(request->wLength <= CFG_TUD_DFU_XFER_BUFSIZE);
 
-          const uint16_t xfer_len = tud_dfu_upload_cb(_dfu_ctx.alt, request->wValue, _dfu_epbuf.transfer_buf,
+          const uint16_t xfer_len = tud_dfu_upload_cb(_dfu_ctx.alt, request->wValue, _transfer_buf,
                                                       request->wLength);
 
-          return tud_control_xfer(rhport, request, _dfu_epbuf.transfer_buf, xfer_len);
+          return tud_control_xfer(rhport, request, _transfer_buf, xfer_len);
         }
         break;
 
@@ -303,10 +303,10 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control
           _dfu_ctx.block = request->wValue;
           _dfu_ctx.length = request->wLength;
 
-          if (request->wLength) {
+          if (request->wLength > 0) {
             // Download with payload -> transition to DOWNLOAD SYNC
             _dfu_ctx.state = DFU_DNLOAD_SYNC;
-            return tud_control_xfer(rhport, request, _dfu_epbuf.transfer_buf, request->wLength);
+            return tud_control_xfer(rhport, request, _transfer_buf, request->wLength);
           } else {
             // Download is complete -> transition to MANIFEST SYNC
             _dfu_ctx.state = DFU_MANIFEST_SYNC;
@@ -352,6 +352,8 @@ void tud_dfu_finish_flashing(uint8_t status) {
       _dfu_ctx.state = (_dfu_ctx.attrs & DFU_ATTR_MANIFESTATION_TOLERANT)
                          ? DFU_MANIFEST_SYNC
                          : DFU_MANIFEST_WAIT_RESET;
+    } else {
+      // nothing to do
     }
   } else {
     // failed while flashing, move to dfuError
@@ -378,10 +380,12 @@ static bool process_download_get_status(uint8_t rhport, uint8_t stage, const tus
   } else if (stage == CONTROL_STAGE_ACK) {
     if (_dfu_ctx.flashing_in_progress) {
       _dfu_ctx.state = DFU_DNBUSY;
-      tud_dfu_download_cb(_dfu_ctx.alt, _dfu_ctx.block, _dfu_epbuf.transfer_buf, _dfu_ctx.length);
+      tud_dfu_download_cb(_dfu_ctx.alt, _dfu_ctx.block, _transfer_buf, _dfu_ctx.length);
     } else {
       _dfu_ctx.state = DFU_DNLOAD_IDLE;
     }
+  } else {
+    // nothing to do
   }
 
   return true;
@@ -409,6 +413,8 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, const tus
     } else {
       _dfu_ctx.state = DFU_IDLE;
     }
+  } else {
+    // nothing to do
   }
 
   return true;
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index c4b4925d6..b20903d68 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -37,12 +37,18 @@
 #include "midi_device.h"
 
 //--------------------------------------------------------------------+
+// Weak stubs: invoked if no strong implementation is available
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK void tud_midi_rx_cb(uint8_t itf) {
+  (void)itf;
+}
+
+//--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 typedef struct {
+  uint8_t rhport;
   uint8_t itf_num;
-  uint8_t ep_in;
-  uint8_t ep_out;
 
   // For Stream read()/write() API
   // Messages are always 4 bytes long, queue them for reading and writing so the
@@ -51,134 +57,97 @@ typedef struct {
   midi_driver_stream_t stream_read;
 
   /*------------- From this point, data is not cleared by bus reset -------------*/
-  // FIFO
-  tu_fifo_t rx_ff;
-  tu_fifo_t tx_ff;
-  uint8_t rx_ff_buf[CFG_TUD_MIDI_RX_BUFSIZE];
-  uint8_t tx_ff_buf[CFG_TUD_MIDI_TX_BUFSIZE];
+  // Endpoint stream
+  struct {
+    tu_edpt_stream_t tx;
+    tu_edpt_stream_t rx;
 
-  #if CFG_FIFO_MUTEX
-  osal_mutex_def_t rx_ff_mutex;
-  osal_mutex_def_t tx_ff_mutex;
-  #endif
+    uint8_t rx_ff_buf[CFG_TUD_MIDI_RX_BUFSIZE];
+    uint8_t tx_ff_buf[CFG_TUD_MIDI_TX_BUFSIZE];
+  } ep_stream;
 } midid_interface_t;
 
-#define ITF_MEM_RESET_SIZE   offsetof(midid_interface_t, rx_ff)
+#define ITF_MEM_RESET_SIZE offsetof(midid_interface_t, ep_stream)
+
+static midid_interface_t _midid_itf[CFG_TUD_MIDI];
 
 // Endpoint Transfer buffer
-CFG_TUD_MEM_SECTION static struct {
+typedef struct {
   TUD_EPBUF_DEF(epin, CFG_TUD_MIDI_EP_BUFSIZE);
   TUD_EPBUF_DEF(epout, CFG_TUD_MIDI_EP_BUFSIZE);
-} _midid_epbuf[CFG_TUD_MIDI];
+} midid_epbuf_t;
+
+CFG_TUD_MEM_SECTION static midid_epbuf_t _midid_epbuf[CFG_TUD_MIDI];
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-static midid_interface_t _midid_itf[CFG_TUD_MIDI];
-
 bool tud_midi_n_mounted (uint8_t itf) {
-  midid_interface_t* midi = &_midid_itf[itf];
-  return midi->ep_in && midi->ep_out;
-}
-
-static void _prep_out_transaction(uint8_t idx) {
-  const uint8_t rhport = 0;
-  midid_interface_t* p_midi = &_midid_itf[idx];
-  uint16_t available = tu_fifo_remaining(&p_midi->rx_ff);
-
-  // Prepare for incoming data but only allow what we can store in the ring buffer.
-  // TODO Actually we can still carry out the transfer, keeping count of received bytes
-  // and slowly move it to the FIFO when read().
-  // This pre-check reduces endpoint claiming
-  TU_VERIFY(available >= CFG_TUD_MIDI_EP_BUFSIZE, );
-
-  // claim endpoint
-  TU_VERIFY(usbd_edpt_claim(rhport, p_midi->ep_out), );
-
-  // fifo can be changed before endpoint is claimed
-  available = tu_fifo_remaining(&p_midi->rx_ff);
-
-  if ( available >= CFG_TUD_MIDI_EP_BUFSIZE )  {
-    usbd_edpt_xfer(rhport, p_midi->ep_out, _midid_epbuf[idx].epout, CFG_TUD_MIDI_EP_BUFSIZE, false);
-  }else
-  {
-    // Release endpoint since we don't make any transfer
-    usbd_edpt_release(rhport, p_midi->ep_out);
-  }
-}
-
+  midid_interface_t *p_midi = &_midid_itf[itf];
 
-//--------------------------------------------------------------------+
-// Weak stubs: invoked if no strong implementation is available
-//--------------------------------------------------------------------+
-TU_ATTR_WEAK void tud_midi_rx_cb(uint8_t itf) {
-  (void) itf;
+  const bool tx_opened = tu_edpt_stream_is_opened(&p_midi->ep_stream.tx);
+  const bool rx_opened = tu_edpt_stream_is_opened(&p_midi->ep_stream.rx);
+  return tx_opened && rx_opened;
 }
 
 //--------------------------------------------------------------------+
 // READ API
 //--------------------------------------------------------------------+
-uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num)
-{
+uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num) {
   (void) cable_num;
-
-  midid_interface_t* midi = &_midid_itf[itf];
-  const midi_driver_stream_t* stream = &midi->stream_read;
+  const midid_interface_t    *p_midi = &_midid_itf[itf];
+  const midi_driver_stream_t *stream = &p_midi->stream_read;
+  const tu_edpt_stream_t     *ep_str = &p_midi->ep_stream.rx;
 
   // when using with packet API stream total & index are both zero
-  return tu_fifo_count(&midi->rx_ff) + (uint8_t) (stream->total - stream->index);
+  return tu_edpt_stream_read_available(ep_str) + (uint8_t)(stream->total - stream->index);
 }
 
-uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize)
-{
+uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void *buffer, uint32_t bufsize) {
   (void) cable_num;
-  TU_VERIFY(bufsize, 0);
-
-  uint8_t* buf8 = (uint8_t*) buffer;
+  TU_VERIFY(buffer != NULL && bufsize > 0, 0);
 
-  midid_interface_t* midi = &_midid_itf[itf];
-  midi_driver_stream_t* stream = &midi->stream_read;
+  uint8_t              *buf8   = (uint8_t *)buffer;
+  midid_interface_t    *p_midi = &_midid_itf[itf];
+  midi_driver_stream_t *stream = &p_midi->stream_read;
 
   uint32_t total_read = 0;
-  while( bufsize )
-  {
+  while (bufsize > 0) {
     // Get new packet from fifo, then set packet expected bytes
-    if ( stream->total == 0 )
-    {
-      // return if there is no more data from fifo
-      if ( !tud_midi_n_packet_read(itf, stream->buffer) ) return total_read;
+    if (stream->total == 0) {
+      if (!tud_midi_n_packet_read(itf, stream->buffer)) {
+        return total_read; // return if there is no more data from fifo
+      }
 
-      uint8_t const code_index = stream->buffer[0] & 0x0f;
+      const uint8_t code_index = stream->buffer[0] & 0x0f;
 
       // MIDI 1.0 Table 4-1: Code Index Number Classifications
-      switch(code_index)
-      {
+      switch (code_index) {
         case MIDI_CIN_MISC:
         case MIDI_CIN_CABLE_EVENT:
           // These are reserved and unused, possibly issue somewhere, skip this packet
           return 0;
-        break;
 
         case MIDI_CIN_SYSEX_END_1BYTE:
         case MIDI_CIN_1BYTE_DATA:
           stream->total = 1;
-        break;
+          break;
 
         case MIDI_CIN_SYSCOM_2BYTE     :
         case MIDI_CIN_SYSEX_END_2BYTE  :
         case MIDI_CIN_PROGRAM_CHANGE   :
         case MIDI_CIN_CHANNEL_PRESSURE :
           stream->total = 2;
-        break;
+          break;
 
         default:
           stream->total = 3;
-        break;
+          break;
       }
     }
 
     // Copy data up to bufsize
-    uint8_t const count = (uint8_t) tu_min32(stream->total - stream->index, bufsize);
+    const uint8_t count = (uint8_t)tu_min32((uint32_t)(stream->total - stream->index), bufsize);
 
     // Skip the header (1st byte) in the buffer
     TU_VERIFY(0 == tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count));
@@ -189,8 +158,7 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui
     bufsize -= count;
 
     // complete current event packet, reset stream
-    if ( stream->total == stream->index )
-    {
+    if (stream->total == stream->index) {
       stream->index = 0;
       stream->total = 0;
     }
@@ -199,150 +167,107 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui
   return total_read;
 }
 
-bool tud_midi_n_packet_read (uint8_t itf, uint8_t packet[4])
-{
-  midid_interface_t* midi = &_midid_itf[itf];
-  TU_VERIFY(midi->ep_out);
+bool tud_midi_n_packet_read(uint8_t itf, uint8_t packet[4]) {
+  midid_interface_t *p_midi = &_midid_itf[itf];
+  tu_edpt_stream_t  *ep_str = &p_midi->ep_stream.rx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_str));
+  return 4 == tu_edpt_stream_read(p_midi->rhport, ep_str, packet, 4);
+}
+
+uint32_t tud_midi_n_packet_read_n(uint8_t itf, uint8_t packets[], uint32_t max_packets) {
+  midid_interface_t *p_midi = &_midid_itf[itf];
+  tu_edpt_stream_t  *ep_str = &p_midi->ep_stream.rx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_str), 0);
 
-  const uint32_t num_read = tu_fifo_read_n(&midi->rx_ff, packet, 4);
-  _prep_out_transaction(itf);
-  return (num_read == 4);
+  const uint32_t num_read = tu_edpt_stream_read(p_midi->rhport, ep_str, packets, 4u * max_packets);
+  return num_read >> 2u;
 }
 
 //--------------------------------------------------------------------+
 // WRITE API
 //--------------------------------------------------------------------+
-
-static uint32_t write_flush(uint8_t idx) {
-  midid_interface_t* midi = &_midid_itf[idx];
-
-  if (!tu_fifo_count(&midi->tx_ff)) {
-    return 0; // No data to send
-  }
-
-  const uint8_t rhport = 0;
-
-  // skip if previous transfer not complete
-  TU_VERIFY( usbd_edpt_claim(rhport, midi->ep_in), 0 );
-
-  uint16_t count = tu_fifo_read_n(&midi->tx_ff, _midid_epbuf[idx].epin, CFG_TUD_MIDI_EP_BUFSIZE);
-
-  if (count) {
-    TU_ASSERT( usbd_edpt_xfer(rhport, midi->ep_in, _midid_epbuf[idx].epin, count, false), 0 );
-    return count;
-  }else {
-    // Release endpoint since we don't make any transfer
-    usbd_edpt_release(rhport, midi->ep_in);
-    return 0;
-  }
-}
-
-uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, const uint8_t* buffer, uint32_t bufsize)
-{
-  midid_interface_t* midi = &_midid_itf[itf];
-  TU_VERIFY(midi->ep_in, 0);
-
-  midi_driver_stream_t* stream = &midi->stream_write;
+uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, const uint8_t *buffer, uint32_t bufsize) {
+  midid_interface_t *p_midi = &_midid_itf[itf];
+  midi_driver_stream_t *stream = &p_midi->stream_write;
+  tu_edpt_stream_t  *ep_str = &p_midi->ep_stream.tx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_str), 0);
 
   uint32_t i = 0;
-  while ( (i < bufsize) && (tu_fifo_remaining(&midi->tx_ff) >= 4) )
-  {
+  while (i < bufsize) {
+    if (tu_edpt_stream_write_available(p_midi->rhport, ep_str) < 4) {
+      break;
+    }
+
     const uint8_t data = buffer[i];
     i++;
 
-    if ( stream->index == 0 )
-    {
+    if (stream->index == 0) {
       //------------- New event packet -------------//
       const uint8_t msg = data >> 4;
 
-      stream->index = 2;
+      stream->index     = 2;
       stream->buffer[1] = data;
 
       // Check to see if we're still in a SysEx transmit.
-      if ( ((stream->buffer[0]) & 0xF) == MIDI_CIN_SYSEX_START )
-      {
-        if ( data == MIDI_STATUS_SYSEX_END )
-        {
-          stream->buffer[0] = (uint8_t) ((cable_num << 4) | MIDI_CIN_SYSEX_END_1BYTE);
-          stream->total = 2;
-        }
-        else
-        {
+      if (((stream->buffer[0]) & 0xF) == MIDI_CIN_SYSEX_START) {
+        if (data == MIDI_STATUS_SYSEX_END) {
+          stream->buffer[0] = (uint8_t)((cable_num << 4) | MIDI_CIN_SYSEX_END_1BYTE);
+          stream->total     = 2;
+        } else {
           stream->total = 4;
         }
-      }
-      else if ( (msg >= 0x8 && msg <= 0xB) || msg == 0xE )
-      {
+      } else if ((msg >= 0x8 && msg <= 0xB) || msg == 0xE) {
         // Channel Voice Messages
-        stream->buffer[0] = (uint8_t) ((cable_num << 4) | msg);
-        stream->total = 4;
-      }
-      else if ( msg == 0xC || msg == 0xD)
-      {
+        stream->buffer[0] = (uint8_t)((cable_num << 4) | msg);
+        stream->total     = 4;
+      } else if (msg == 0xC || msg == 0xD) {
         // Channel Voice Messages, two-byte variants (Program Change and Channel Pressure)
-        stream->buffer[0] = (uint8_t) ((cable_num << 4) | msg);
-        stream->total = 3;
-      }
-      else if ( msg == 0xf )
-      {
+        stream->buffer[0] = (uint8_t)((cable_num << 4) | msg);
+        stream->total     = 3;
+      } else if (msg == 0xf) {
         // System message
-        if ( data == MIDI_STATUS_SYSEX_START )
-        {
+        if (data == MIDI_STATUS_SYSEX_START) {
           stream->buffer[0] = MIDI_CIN_SYSEX_START;
-          stream->total = 4;
-        }
-        else if ( data == MIDI_STATUS_SYSCOM_TIME_CODE_QUARTER_FRAME || data == MIDI_STATUS_SYSCOM_SONG_SELECT )
-        {
+          stream->total     = 4;
+        } else if (data == MIDI_STATUS_SYSCOM_TIME_CODE_QUARTER_FRAME || data == MIDI_STATUS_SYSCOM_SONG_SELECT) {
           stream->buffer[0] = MIDI_CIN_SYSCOM_2BYTE;
-          stream->total = 3;
-        }
-        else if ( data == MIDI_STATUS_SYSCOM_SONG_POSITION_POINTER )
-        {
+          stream->total     = 3;
+        } else if (data == MIDI_STATUS_SYSCOM_SONG_POSITION_POINTER) {
           stream->buffer[0] = MIDI_CIN_SYSCOM_3BYTE;
-          stream->total = 4;
-        }
-        else
-        {
+          stream->total     = 4;
+        } else {
           stream->buffer[0] = MIDI_CIN_SYSEX_END_1BYTE;
-          stream->total = 2;
+          stream->total     = 2;
         }
         stream->buffer[0] |= (uint8_t)(cable_num << 4);
-      }
-      else
-      {
+      } else {
         // Pack individual bytes if we don't support packing them into words.
-        stream->buffer[0] = (uint8_t) (cable_num << 4 | 0xf);
+        stream->buffer[0] = (uint8_t)(cable_num << 4 | 0xf);
         stream->buffer[2] = 0;
         stream->buffer[3] = 0;
-        stream->index = 2;
-        stream->total = 2;
+        stream->total     = 2; // index already set to 2
       }
-    }
-    else
-    {
+    } else {
       //------------- On-going (buffering) packet -------------//
-
       TU_ASSERT(stream->index < 4, i);
       stream->buffer[stream->index] = data;
       stream->index++;
 
       // See if this byte ends a SysEx.
-      if ( (stream->buffer[0] & 0xF) == MIDI_CIN_SYSEX_START && data == MIDI_STATUS_SYSEX_END )
-      {
-        stream->buffer[0] = (uint8_t) ((cable_num << 4) | (MIDI_CIN_SYSEX_START + (stream->index - 1)));
-        stream->total = stream->index;
+      if ((stream->buffer[0] & 0xF) == MIDI_CIN_SYSEX_START && data == MIDI_STATUS_SYSEX_END) {
+        stream->buffer[0] = (uint8_t)((cable_num << 4) | (MIDI_CIN_SYSEX_START + (stream->index - 1)));
+        stream->total     = stream->index;
       }
     }
 
     // Send out packet
-    if ( stream->index == stream->total )
-    {
+    if (stream->index == stream->total) {
       // zeroes unused bytes
       for (uint8_t idx = stream->total; idx < 4; idx++) {
         stream->buffer[idx] = 0;
       }
 
-      const uint16_t count = tu_fifo_write_n(&midi->tx_ff, stream->buffer, 4);
+      const uint32_t count = tu_edpt_stream_write(p_midi->rhport, ep_str, stream->buffer, 4);
 
       // complete current event packet, reset stream
       stream->index = stream->total = 0;
@@ -352,25 +277,37 @@ uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, const uint8_t*
     }
   }
 
-  write_flush(itf);
+  (void)tu_edpt_stream_write_xfer(p_midi->rhport, ep_str);
 
   return i;
 }
 
 bool tud_midi_n_packet_write (uint8_t itf, const uint8_t packet[4]) {
-  midid_interface_t* midi = &_midid_itf[itf];
-  TU_VERIFY(midi->ep_in);
+  midid_interface_t *p_midi = &_midid_itf[itf];
+  tu_edpt_stream_t  *ep_str = &p_midi->ep_stream.tx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_str));
 
-  if (tu_fifo_remaining(&midi->tx_ff) < 4) {
-    return false;
-  }
-
-  tu_fifo_write_n(&midi->tx_ff, packet, 4);
-  write_flush(itf);
+  TU_VERIFY(tu_edpt_stream_write_available(p_midi->rhport, ep_str) >= 4);
+  TU_VERIFY(tu_edpt_stream_write(p_midi->rhport, ep_str, packet, 4) > 0);
+  (void)tu_edpt_stream_write_xfer(p_midi->rhport, ep_str);
 
   return true;
 }
 
+uint32_t tud_midi_n_packet_write_n(uint8_t itf, const uint8_t packets[], uint32_t n_packets) {
+  midid_interface_t *p_midi = &_midid_itf[itf];
+  tu_edpt_stream_t  *ep_str = &p_midi->ep_stream.tx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_str), 0);
+
+  uint32_t n_bytes = tu_edpt_stream_write_available(p_midi->rhport, ep_str);
+  n_bytes          = tu_min32(tu_align4(n_bytes), n_packets << 2u);
+
+  const uint32_t n_write = tu_edpt_stream_write(p_midi->rhport, ep_str, packets, n_bytes);
+  (void)tu_edpt_stream_write_xfer(p_midi->rhport, ep_str);
+
+  return n_write >> 2u;
+}
+
 //--------------------------------------------------------------------+
 // USBD Driver API
 //--------------------------------------------------------------------+
@@ -378,72 +315,64 @@ void midid_init(void) {
   tu_memclr(_midid_itf, sizeof(_midid_itf));
 
   for (uint8_t i = 0; i < CFG_TUD_MIDI; i++) {
-    midid_interface_t* midi = &_midid_itf[i];
-
-    // config fifo
-    tu_fifo_config(&midi->rx_ff, midi->rx_ff_buf, CFG_TUD_MIDI_RX_BUFSIZE, 1, false); // true, true
-    tu_fifo_config(&midi->tx_ff, midi->tx_ff_buf, CFG_TUD_MIDI_TX_BUFSIZE, 1, false); // OBVS.
+    midid_interface_t *p_midi  = &_midid_itf[i];
+    midid_epbuf_t     *p_epbuf = &_midid_epbuf[i];
 
-    #if CFG_FIFO_MUTEX
-    osal_mutex_t mutex_rd = osal_mutex_create(&midi->rx_ff_mutex);
-    osal_mutex_t mutex_wr = osal_mutex_create(&midi->tx_ff_mutex);
-    TU_ASSERT(mutex_wr != NULL && mutex_wr != NULL, );
+    tu_edpt_stream_init(
+        &p_midi->ep_stream.rx, false, false, false, p_midi->ep_stream.rx_ff_buf, CFG_TUD_MIDI_RX_BUFSIZE,
+        p_epbuf->epout, CFG_TUD_MIDI_EP_BUFSIZE);
 
-    tu_fifo_config_mutex(&midi->rx_ff, NULL, mutex_rd);
-    tu_fifo_config_mutex(&midi->tx_ff, mutex_wr, NULL);
-    #endif
+    tu_edpt_stream_init(
+        &p_midi->ep_stream.tx, false, true, false, p_midi->ep_stream.tx_ff_buf, CFG_TUD_MIDI_TX_BUFSIZE, p_epbuf->epin,
+        CFG_TUD_MIDI_EP_BUFSIZE);
   }
 }
 
 bool midid_deinit(void) {
-  #if CFG_FIFO_MUTEX
-  for(uint8_t i=0; i<CFG_TUD_MIDI; i++) {
-    midid_interface_t* midi = &_midid_itf[i];
-    osal_mutex_t mutex_rd = midi->rx_ff.mutex_rd;
-    osal_mutex_t mutex_wr = midi->tx_ff.mutex_wr;
-
-    if (mutex_rd) {
-      osal_mutex_delete(mutex_rd);
-      tu_fifo_config_mutex(&midi->rx_ff, NULL, NULL);
-    }
-
-    if (mutex_wr) {
-      osal_mutex_delete(mutex_wr);
-      tu_fifo_config_mutex(&midi->tx_ff, NULL, NULL);
-    }
+  for (uint8_t i = 0; i < CFG_TUD_MIDI; i++) {
+    midid_interface_t *p_midi = &_midid_itf[i];
+    tu_edpt_stream_deinit(&p_midi->ep_stream.rx);
+    tu_edpt_stream_deinit(&p_midi->ep_stream.tx);
   }
-  #endif
-
   return true;
 }
 
-void midid_reset(uint8_t rhport)
-{
-  (void) rhport;
+void midid_reset(uint8_t rhport) {
+  (void)rhport;
+  for (uint8_t i = 0; i < CFG_TUD_MIDI; i++) {
+    midid_interface_t *p_midi = &_midid_itf[i];
+    tu_memclr(p_midi, ITF_MEM_RESET_SIZE);
+
+    tu_edpt_stream_clear(&p_midi->ep_stream.rx);
+    tu_edpt_stream_close(&p_midi->ep_stream.rx);
+
+    tu_edpt_stream_clear(&p_midi->ep_stream.tx);
+    tu_edpt_stream_close(&p_midi->ep_stream.tx);
+  }
+}
 
-  for(uint8_t i=0; i<CFG_TUD_MIDI; i++)
-  {
-    midid_interface_t* midi = &_midid_itf[i];
-    tu_memclr(midi, ITF_MEM_RESET_SIZE);
-    tu_fifo_clear(&midi->rx_ff);
-    tu_fifo_clear(&midi->tx_ff);
+TU_ATTR_ALWAYS_INLINE static inline uint8_t find_midi_itf(uint8_t ep_addr) {
+  for (uint8_t idx = 0; idx < CFG_TUD_MIDI; idx++) {
+    const midid_interface_t *p_midi = &_midid_itf[idx];
+    if (ep_addr == p_midi->ep_stream.rx.ep_addr || ep_addr == p_midi->ep_stream.tx.ep_addr) {
+      return idx;
+    }
   }
+  return TUSB_INDEX_INVALID_8;
 }
 
-uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uint16_t max_len) {
-  uint16_t drv_len = 0;
-  uint8_t const * p_desc = (uint8_t const *)desc_itf;
+uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t *desc_itf, uint16_t max_len) {
+  const uint8_t *p_desc   = (const uint8_t *)desc_itf;
+  const uint8_t *desc_end = p_desc + max_len;
 
   // 1st Interface is Audio Control v1 (optional)
   if (TUSB_CLASS_AUDIO               == desc_itf->bInterfaceClass    &&
       AUDIO_SUBCLASS_CONTROL         == desc_itf->bInterfaceSubClass &&
       AUDIO_FUNC_PROTOCOL_CODE_UNDEF == desc_itf->bInterfaceProtocol) {
-    drv_len = tu_desc_len(desc_itf);
     p_desc = tu_desc_next(desc_itf);
     // Skip Class Specific descriptors
-    while (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc) && drv_len <= max_len) {
-      drv_len += tu_desc_len(p_desc);
-      p_desc   = tu_desc_next(p_desc);
+    while (tu_desc_in_bounds(p_desc, desc_end) && TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) {
+      p_desc = tu_desc_next(p_desc);
     }
   }
 
@@ -451,59 +380,48 @@ uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uint1
   TU_VERIFY(TUSB_DESC_INTERFACE == tu_desc_type(p_desc), 0);
   const tusb_desc_interface_t* desc_midi = (const tusb_desc_interface_t*) p_desc;
 
-  TU_VERIFY(TUSB_CLASS_AUDIO               == desc_midi->bInterfaceClass    &&
-            AUDIO_SUBCLASS_MIDI_STREAMING  == desc_midi->bInterfaceSubClass &&
-            AUDIO_FUNC_PROTOCOL_CODE_UNDEF == desc_midi->bInterfaceProtocol, 0);
+  TU_VERIFY(TUSB_CLASS_AUDIO == desc_midi->bInterfaceClass &&
+              AUDIO_SUBCLASS_MIDI_STREAMING == desc_midi->bInterfaceSubClass &&
+              AUDIO_FUNC_PROTOCOL_CODE_UNDEF == desc_midi->bInterfaceProtocol,
+            0);
 
-  // Find available interface
-  midid_interface_t * p_midi = NULL;
-  uint8_t idx;
-  for(idx=0; idx<CFG_TUD_MIDI; idx++) {
-    if ( _midid_itf[idx].ep_in == 0 && _midid_itf[idx].ep_out == 0 ) {
-      p_midi = &_midid_itf[idx];
-      break;
-    }
-  }
-  TU_ASSERT(p_midi);
+  uint8_t idx = find_midi_itf(0); // find unused interface
+  TU_ASSERT(idx < CFG_TUD_MIDI, 0);
+  midid_interface_t *p_midi = &_midid_itf[idx];
 
+  p_midi->rhport  = rhport;
   p_midi->itf_num = desc_midi->bInterfaceNumber;
   (void) p_midi->itf_num;
 
-  // next descriptor
-  drv_len += tu_desc_len(p_desc);
-  p_desc   = tu_desc_next(p_desc);
+  p_desc = tu_desc_next(p_desc);
 
   // Find and open endpoint descriptors
-  uint8_t found_endpoints = 0;
-  while ( (found_endpoints < desc_midi->bNumEndpoints) && (drv_len <= max_len)  )
-  {
-    if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) )
-    {
-      TU_ASSERT(usbd_edpt_open(rhport, (const tusb_desc_endpoint_t*) p_desc), 0);
-      uint8_t ep_addr = ((const tusb_desc_endpoint_t*) p_desc)->bEndpointAddress;
+  uint8_t found_ep = 0;
+  while ((found_ep < desc_midi->bNumEndpoints) && tu_desc_in_bounds(p_desc, desc_end)) {
+    if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) {
+      const tusb_desc_endpoint_t *desc_ep = (const tusb_desc_endpoint_t *)p_desc;
+      TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
+      const uint8_t ep_addr = ((const tusb_desc_endpoint_t *)p_desc)->bEndpointAddress;
 
-      if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN)
-      {
-        p_midi->ep_in = ep_addr;
+      if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
+        tu_edpt_stream_t *stream_tx = &p_midi->ep_stream.tx;
+        tu_edpt_stream_open(stream_tx, desc_ep);
+        tu_edpt_stream_clear(stream_tx);
       } else {
-        p_midi->ep_out = ep_addr;
+        tu_edpt_stream_t *stream_rx = &p_midi->ep_stream.rx;
+        tu_edpt_stream_open(stream_rx, desc_ep);
+        tu_edpt_stream_clear(stream_rx);
+        TU_ASSERT(tu_edpt_stream_read_xfer(rhport, stream_rx) > 0, 0); // prepare to receive data
       }
 
-      // Class Specific MIDI Stream endpoint descriptor
-      drv_len += tu_desc_len(p_desc);
-      p_desc   = tu_desc_next(p_desc);
-
-      found_endpoints += 1;
+      p_desc = tu_desc_next(p_desc);                                   // skip CS Endpoint descriptor
+      found_ep++;
     }
 
-    drv_len += tu_desc_len(p_desc);
-    p_desc   = tu_desc_next(p_desc);
+    p_desc = tu_desc_next(p_desc);
   }
 
-  // Prepare for incoming data
-  _prep_out_transaction(idx);
-
-  return drv_len;
+  return (uint16_t)(p_desc - (const uint8_t *)desc_itf);
 }
 
 // Invoked when a control transfer occurred on an interface of this class
@@ -514,44 +432,31 @@ bool midid_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_req
   return false; // driver doesn't support any request yet
 }
 
-bool midid_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
-  (void) result;
-  (void) rhport;
-
-  uint8_t idx;
-  midid_interface_t* p_midi;
+bool midid_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
+  (void)result;
 
-  // Identify which interface to use
-  for (idx = 0; idx < CFG_TUD_MIDI; idx++) {
-    p_midi = &_midid_itf[idx];
-    if ((ep_addr == p_midi->ep_out) || (ep_addr == p_midi->ep_in)) {
-      break;
-    }
-  }
+  uint8_t idx = find_midi_itf(ep_addr);
   TU_ASSERT(idx < CFG_TUD_MIDI);
+  midid_interface_t *p_midi = &_midid_itf[idx];
 
-  // receive new data
-  if (ep_addr == p_midi->ep_out) {
-    tu_fifo_write_n(&p_midi->rx_ff, _midid_epbuf[idx].epout, (uint16_t)xferred_bytes);
+  tu_edpt_stream_t *ep_st_rx = &p_midi->ep_stream.rx;
+  tu_edpt_stream_t *ep_st_tx = &p_midi->ep_stream.tx;
 
-    // invoke receive callback if available
-    tud_midi_rx_cb(idx);
-
-    // prepare for next
-    // TODO for now ep_out is not used by public API therefore there is no race condition,
-    // and does not need to claim like ep_in
-    _prep_out_transaction(idx);
-  } else if (ep_addr == p_midi->ep_in) {
-    if (0 == write_flush(idx)) {
-      // If there is no data left, a ZLP should be sent if
-      // xferred_bytes is multiple of EP size and not zero
-      if (!tu_fifo_count(&p_midi->tx_ff) && xferred_bytes && (0 == (xferred_bytes % CFG_TUD_MIDI_EP_BUFSIZE))) {
-        if (usbd_edpt_claim(rhport, p_midi->ep_in)) {
-          usbd_edpt_xfer(rhport, p_midi->ep_in, NULL, 0, false);
-        }
-      }
+  if (ep_addr == ep_st_rx->ep_addr) {
+    // Received new data: put into stream's fifo
+    if (result == XFER_RESULT_SUCCESS) {
+      tu_edpt_stream_read_xfer_complete(ep_st_rx, xferred_bytes);
+      tud_midi_rx_cb(idx);                      // invoke callback
     }
+    tu_edpt_stream_read_xfer(rhport, ep_st_rx); // prepare for next data
+  } else if (ep_addr == ep_st_tx->ep_addr && result == XFER_RESULT_SUCCESS) {
+    // sent complete: try to send more if possible
+    if (0 == tu_edpt_stream_write_xfer(rhport, ep_st_tx)) {
+      // If there is no data left, a ZLP should be sent if needed
+      (void)tu_edpt_stream_write_zlp_if_needed(rhport, ep_st_tx, xferred_bytes);
+    }
+  } else {
+    return false;
   }
 
   return true;
diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h
index d23516cec..ddbc2f9f0 100644
--- a/src/class/midi/midi_device.h
+++ b/src/class/midi/midi_device.h
@@ -36,21 +36,21 @@
 
 #if !defined(CFG_TUD_MIDI_EP_BUFSIZE) && defined(CFG_TUD_MIDI_EPSIZE)
   #warning CFG_TUD_MIDI_EPSIZE is renamed to CFG_TUD_MIDI_EP_BUFSIZE, please update to use the new name
-  #define CFG_TUD_MIDI_EP_BUFSIZE    CFG_TUD_MIDI_EPSIZE
+  #define CFG_TUD_MIDI_EP_BUFSIZE CFG_TUD_MIDI_EPSIZE
 #endif
 
 #ifndef CFG_TUD_MIDI_EP_BUFSIZE
-  #define CFG_TUD_MIDI_EP_BUFSIZE     (TUD_OPT_HIGH_SPEED ? 512 : 64)
+  #define CFG_TUD_MIDI_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
 #endif
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
-/** \addtogroup MIDI_Serial Serial
- *  @{
- *  \defgroup   MIDI_Serial_Device Device
- *  @{ */
+//--------------------------------------------------------------------+
+// Application Callback API (optional)
+//--------------------------------------------------------------------+
+void tud_midi_rx_cb(uint8_t itf);
 
 //--------------------------------------------------------------------+
 // Application API (Multiple Interfaces)
@@ -58,117 +58,77 @@
 //--------------------------------------------------------------------+
 
 // Check if midi interface is mounted
-bool     tud_midi_n_mounted      (uint8_t itf);
+bool tud_midi_n_mounted(uint8_t itf);
 
 // Get the number of bytes available for reading
-uint32_t tud_midi_n_available    (uint8_t itf, uint8_t cable_num);
-
-// Read byte stream              (legacy)
-uint32_t tud_midi_n_stream_read  (uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize);
-
-// Write byte Stream             (legacy)
-uint32_t tud_midi_n_stream_write (uint8_t itf, uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize);
-
-// Read event packet             (4 bytes)
-bool     tud_midi_n_packet_read  (uint8_t itf, uint8_t packet[4]);
-
-// Write event packet            (4 bytes)
-bool     tud_midi_n_packet_write (uint8_t itf, uint8_t const packet[4]);
+uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num);
 
-//--------------------------------------------------------------------+
-// Application API (Single Interface)
-//--------------------------------------------------------------------+
-static inline bool     tud_midi_mounted      (void);
-static inline uint32_t tud_midi_available    (void);
-
-static inline uint32_t tud_midi_stream_read  (void* buffer, uint32_t bufsize);
-static inline uint32_t tud_midi_stream_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize);
-
-static inline bool     tud_midi_packet_read  (uint8_t packet[4]);
-static inline bool     tud_midi_packet_write (uint8_t const packet[4]);
-
-//------------- Deprecated API name  -------------//
-// TODO remove after 0.10.0 release
-
-TU_ATTR_DEPRECATED("tud_midi_read() is renamed to tud_midi_stream_read()")
-static inline uint32_t tud_midi_read (void* buffer, uint32_t bufsize)
-{
-  return tud_midi_stream_read(buffer, bufsize);
-}
+// Read byte stream (legacy)
+uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void *buffer, uint32_t bufsize);
 
-TU_ATTR_DEPRECATED("tud_midi_write() is renamed to tud_midi_stream_write()")
-static inline uint32_t tud_midi_write(uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize)
-{
-  return tud_midi_stream_write(cable_num, buffer, bufsize);
-}
+// Write byte Stream (legacy)
+uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, const uint8_t *buffer, uint32_t bufsize);
 
+// Read an event 4-byte packet
+bool tud_midi_n_packet_read(uint8_t itf, uint8_t packet[4]);
 
-TU_ATTR_DEPRECATED("tud_midi_send() is renamed to tud_midi_packet_write()")
-static inline bool tud_midi_send(uint8_t packet[4])
-{
-  return tud_midi_packet_write(packet);
-}
+// Read multiple event packets, return number of read packets
+uint32_t tud_midi_n_packet_read_n(uint8_t itf, uint8_t packets[], uint32_t max_packets);
 
-TU_ATTR_DEPRECATED("tud_midi_receive() is renamed to tud_midi_packet_read()")
-static inline bool tud_midi_receive(uint8_t packet[4])
-{
-  return tud_midi_packet_read(packet);
-}
+// Write an event 4-byte packet
+bool tud_midi_n_packet_write(uint8_t itf, const uint8_t packet[4]);
 
-//--------------------------------------------------------------------+
-// Application Callback API (optional)
-//--------------------------------------------------------------------+
-void tud_midi_rx_cb(uint8_t itf);
+// Write multiple event packets, return number of written packets
+uint32_t tud_midi_n_packet_write_n(uint8_t itf, const uint8_t packets[], uint32_t n_packets);
 
 //--------------------------------------------------------------------+
-// Inline Functions
+// Application API (Single Interface)
 //--------------------------------------------------------------------+
-
-static inline bool tud_midi_mounted (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_mounted(void) {
   return tud_midi_n_mounted(0);
 }
 
-static inline uint32_t tud_midi_available (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_available(void) {
   return tud_midi_n_available(0, 0);
 }
 
-static inline uint32_t tud_midi_stream_read (void* buffer, uint32_t bufsize)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_stream_read(void *buffer, uint32_t bufsize) {
   return tud_midi_n_stream_read(0, 0, buffer, bufsize);
 }
 
-static inline uint32_t tud_midi_stream_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t
+tud_midi_stream_write(uint8_t cable_num, const uint8_t *buffer, uint32_t bufsize) {
   return tud_midi_n_stream_write(0, cable_num, buffer, bufsize);
 }
 
-static inline bool tud_midi_packet_read (uint8_t packet[4])
-{
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_packet_read(uint8_t packet[4]) {
   return tud_midi_n_packet_read(0, packet);
 }
 
-static inline bool tud_midi_packet_write (uint8_t const packet[4])
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_packet_read_n(uint8_t packets[], uint32_t max_packets) {
+  return tud_midi_n_packet_read_n(0, packets, max_packets);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_packet_write(const uint8_t packet[4]) {
   return tud_midi_n_packet_write(0, packet);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_packet_write_n(const uint8_t packets[], uint32_t n_packets) {
+  return tud_midi_n_packet_write_n(0, packets, n_packets);
+}
+
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+
-void     midid_init            (void);
-bool     midid_deinit          (void);
-void     midid_reset           (uint8_t rhport);
-uint16_t midid_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
-bool     midid_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
-bool     midid_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     midid_init(void);
+bool     midid_deinit(void);
+void     midid_reset(uint8_t rhport);
+uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+bool     midid_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t *request);
+bool     midid_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
 
 #ifdef __cplusplus
- }
+}
 #endif
 
-#endif /* TUSB_MIDI_DEVICE_H_ */
-
-/** @} */
-/** @} */
+#endif
diff --git a/src/class/midi/midi_host.c b/src/class/midi/midi_host.c
index 8b78fe945..07062875c 100644
--- a/src/class/midi/midi_host.c
+++ b/src/class/midi/midi_host.c
@@ -59,9 +59,6 @@ typedef struct {
   uint8_t iInterface;
   uint8_t itf_count;        // number of interface including Audio Control + MIDI streaming
 
-  uint8_t ep_in;          // IN endpoint address
-  uint8_t ep_out;         // OUT endpoint address
-
   uint8_t rx_cable_count;  // IN endpoint CS descriptor bNumEmbMIDIJack value
   uint8_t tx_cable_count;  // OUT endpoint CS descriptor bNumEmbMIDIJack value
 
@@ -147,8 +144,6 @@ void midih_close(uint8_t daddr) {
       TU_LOG_DRV("  MIDI close addr = %u index = %u\r\n", daddr, idx);
       tuh_midi_umount_cb(idx);
 
-      p_midi->ep_in = 0;
-      p_midi->ep_out = 0;
       p_midi->bInterfaceNumber = 0;
       p_midi->rx_cable_count = 0;
       p_midi->tx_cable_count = 0;
@@ -169,23 +164,25 @@ bool midih_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint
   const uint8_t idx = get_idx_by_ep_addr(dev_addr, ep_addr);
   TU_VERIFY(idx < CFG_TUH_MIDI);
   midih_interface_t *p_midi = &_midi_host[idx];
+  tu_edpt_stream_t  *ep_str_rx = &p_midi->ep_stream.rx;
+  tu_edpt_stream_t  *ep_str_tx = &p_midi->ep_stream.tx;
 
-  if (ep_addr == p_midi->ep_stream.rx.ep_addr) {
+  if (ep_addr == ep_str_rx->ep_addr) {
     // receive new data, put it into FIFO and invoke callback if available
     // Note: some devices send back all zero packets even if there is no data ready
-    if (xferred_bytes && !tu_mem_is_zero(p_midi->ep_stream.rx.ep_buf, xferred_bytes)) {
-      tu_edpt_stream_read_xfer_complete(&p_midi->ep_stream.rx, xferred_bytes);
+    if (xferred_bytes && !tu_mem_is_zero(ep_str_rx->ep_buf, xferred_bytes)) {
+      tu_edpt_stream_read_xfer_complete(ep_str_rx, xferred_bytes);
       tuh_midi_rx_cb(idx, xferred_bytes);
     }
 
-    tu_edpt_stream_read_xfer(dev_addr, &p_midi->ep_stream.rx); // prepare for next transfer
-  } else if (ep_addr == p_midi->ep_stream.tx.ep_addr) {
+    tu_edpt_stream_read_xfer(dev_addr, ep_str_rx); // prepare for next transfer
+  } else if (ep_addr == ep_str_tx->ep_addr) {
     tuh_midi_tx_cb(idx, xferred_bytes);
 
-    if (0 == tu_edpt_stream_write_xfer(dev_addr, &p_midi->ep_stream.tx)) {
+    if (0 == tu_edpt_stream_write_xfer(dev_addr, ep_str_tx)) {
       // If there is no data left, a ZLP should be sent if
       // xferred_bytes is multiple of EP size and not zero
-      tu_edpt_stream_write_zlp_if_needed(dev_addr, &p_midi->ep_stream.tx, xferred_bytes);
+      tu_edpt_stream_write_zlp_if_needed(dev_addr, ep_str_tx, xferred_bytes);
     }
   }
 
@@ -295,21 +292,20 @@ bool midih_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *d
         const midi_desc_cs_endpoint_t *p_csep = (const midi_desc_cs_endpoint_t *) p_desc;
 
         TU_LOG_DRV("  Endpoint and CS_Endpoint descriptor %02x\r\n", p_ep->bEndpointAddress);
+        tu_edpt_stream_t *ep_stream;
         if (tu_edpt_dir(p_ep->bEndpointAddress) == TUSB_DIR_OUT) {
-          p_midi->ep_out = p_ep->bEndpointAddress;
           p_midi->tx_cable_count = p_csep->bNumEmbMIDIJack;
           desc_cb.desc_epout = p_ep;
-
-          TU_ASSERT(tuh_edpt_open(dev_addr, p_ep));
-          tu_edpt_stream_open(&p_midi->ep_stream.tx, p_ep);
+          ep_stream              = &p_midi->ep_stream.tx;
         } else {
-          p_midi->ep_in = p_ep->bEndpointAddress;
           p_midi->rx_cable_count = p_csep->bNumEmbMIDIJack;
-          desc_cb.desc_epin = p_ep;
-
-          TU_ASSERT(tuh_edpt_open(dev_addr, p_ep));
-          tu_edpt_stream_open(&p_midi->ep_stream.rx, p_ep);
+          desc_cb.desc_epin      = p_ep;
+          ep_stream              = &p_midi->ep_stream.rx;
         }
+        TU_ASSERT(tuh_edpt_open(dev_addr, p_ep));
+        tu_edpt_stream_open(ep_stream, p_ep);
+        tu_edpt_stream_clear(ep_stream);
+
         break;
       }
 
@@ -379,8 +375,14 @@ bool tuh_midi_itf_get_info(uint8_t idx, tuh_itf_info_t* info) {
   desc->bDescriptorType    = TUSB_DESC_INTERFACE;
 
   desc->bInterfaceNumber   = p_midi->bInterfaceNumber;
-  desc->bAlternateSetting  = 0;
-  desc->bNumEndpoints      = (uint8_t)((p_midi->ep_in != 0 ? 1:0) + (p_midi->ep_out != 0 ? 1:0));
+  desc->bAlternateSetting = 0;
+  desc->bNumEndpoints     = 0;
+  if (tu_edpt_stream_is_opened(&p_midi->ep_stream.tx)) {
+    desc->bNumEndpoints++;
+  }
+  if (tu_edpt_stream_is_opened(&p_midi->ep_stream.rx)) {
+    desc->bNumEndpoints++;
+  }
   desc->bInterfaceClass    = TUSB_CLASS_AUDIO;
   desc->bInterfaceSubClass = AUDIO_SUBCLASS_MIDI_STREAMING;
   desc->bInterfaceProtocol = 0;
diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index 27724b194..7da4d2239 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -202,8 +202,9 @@ void vendord_reset(uint8_t rhport) {
     vendord_interface_t* p_itf = &_vendord_itf[i];
     tu_memclr(p_itf, ITF_MEM_RESET_SIZE);
     tu_edpt_stream_clear(&p_itf->rx.stream);
-    tu_edpt_stream_clear(&p_itf->tx.stream);
     tu_edpt_stream_close(&p_itf->rx.stream);
+
+    tu_edpt_stream_clear(&p_itf->tx.stream);
     tu_edpt_stream_close(&p_itf->tx.stream);
   }
 }
@@ -233,16 +234,18 @@ uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uin
       const tusb_desc_endpoint_t* desc_ep = (const tusb_desc_endpoint_t*) p_desc;
       TU_ASSERT(usbd_edpt_open(rhport, desc_ep));
 
-      // open endpoint stream, skip if already opened
+      // open endpoint stream, skip if already opened (multiple IN/OUT endpoints)
       if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
-        if (p_vendor->tx.stream.ep_addr == 0) {
-          tu_edpt_stream_open(&p_vendor->tx.stream, desc_ep);
-          tud_vendor_n_write_flush(itf);
+        tu_edpt_stream_t *stream_tx = &p_vendor->tx.stream;
+        if (stream_tx->ep_addr == 0) {
+          tu_edpt_stream_open(stream_tx, desc_ep);
+          tu_edpt_stream_write_xfer(rhport, stream_tx); // flush pending data
         }
       } else {
-        if (p_vendor->rx.stream.ep_addr == 0) {
-          tu_edpt_stream_open(&p_vendor->rx.stream, desc_ep);
-          TU_ASSERT(tu_edpt_stream_read_xfer(rhport, &p_vendor->rx.stream) > 0, 0); // prepare for incoming data
+        tu_edpt_stream_t *stream_rx = &p_vendor->rx.stream;
+        if (stream_rx->ep_addr == 0) {
+          tu_edpt_stream_open(stream_rx, desc_ep);
+          TU_ASSERT(tu_edpt_stream_read_xfer(rhport, stream_rx) > 0, 0); // prepare for incoming data
         }
       }
     }
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 85e85e75e..b2375def9 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -214,6 +214,12 @@ TU_ATTR_WEAK int tud_video_commit_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx,
   return VIDEO_ERROR_NONE;
 }
 
+TU_ATTR_WEAK void tud_video_prepare_payload_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, tud_video_payload_request_t* request) {
+  (void) ctl_idx;
+  (void) stm_idx;
+  (void) request;
+}
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -874,7 +880,16 @@ static uint_fast16_t _prepare_in_payload(videod_streaming_interface_t *stm, uint
   }
   TU_ASSERT(pkt_len >= hdr_len);
   uint_fast16_t data_len = pkt_len - hdr_len;
-  memcpy(&ep_buf[hdr_len], stm->buffer + stm->offset, data_len);
+  if (stm->buffer) {
+    memcpy(&ep_buf[hdr_len], stm->buffer + stm->offset, data_len);
+  } else {
+    tud_video_payload_request_t rqst = {
+      .buf = &ep_buf[hdr_len],
+      .length = data_len,
+      .offset = stm->offset
+    };
+    tud_video_prepare_payload_cb(stm->index_vc, stm->index_vs, &rqst);
+  }
   stm->offset += data_len;
   remaining -= data_len;
   if (!remaining) {
@@ -1255,13 +1270,14 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu
   TU_ASSERT(ctl_idx < CFG_TUD_VIDEO);
   TU_ASSERT(stm_idx < CFG_TUD_VIDEO_STREAMING);
 
-  if (NULL == buffer || 0 == bufsize) {
+  if (0 == bufsize) {
     return false;
   }
+
   videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
   videod_streaming_epbuf_t *stm_epbuf = &_videod_streaming_epbuf[ctl_idx];
 
-  if (NULL == stm || 0 == stm->desc.ep[0] || stm->buffer) {
+  if (NULL == stm || 0 == stm->desc.ep[0] || stm->bufsize) {
     return false;
   }
   if (stm->state == VS_STATE_PROBING) {
diff --git a/src/class/video/video_device.h b/src/class/video/video_device.h
index 2b41c3bfe..f14555e4f 100644
--- a/src/class/video/video_device.h
+++ b/src/class/video/video_device.h
@@ -35,6 +35,16 @@
 extern "C" {
 #endif
 
+
+//--------------------------------------------------------------------+
+// Payload request
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED {
+    void* buf;      /* Payload buffer to be filled */
+    size_t length;  /* Length of the requested data in bytes */
+    size_t offset;  /* Offset within the frame (in bytes) */
+} tud_video_payload_request_t;
+
 //--------------------------------------------------------------------+
 // Application API (Multiple Ports)
 // CFG_TUD_VIDEO > 1
@@ -83,6 +93,16 @@ int tud_video_power_mode_cb(uint_fast8_t ctl_idx, uint8_t power_mod);
 int tud_video_commit_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx,
                                      video_probe_and_commit_control_t const *parameters);
 
+/** Invoked if buffer is set to NULL (allows bufferless on the fly data generation)
+ *
+ * @param[in]   ctl_idx       Destination control interface index
+ * @param[in]   stm_idx       Destination streaming interface index
+ * @param[out]  payload_buf   Payload storage buffer (target buffer for requested data)
+ * @param[in]   payload_size  Size of payload_buf (requested data size)
+ * @param[in]   offset        Current byte offset relative to given bufsize from tud_video_n_frame_xfer (framesize)
+ * @return video_error_code_t */
+void tud_video_prepare_payload_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, tud_video_payload_request_t* request);
+
 //--------------------------------------------------------------------+
 // INTERNAL USBD-CLASS DRIVER API
 //--------------------------------------------------------------------+
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 7aa42a2d7..f377d5272 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -354,7 +354,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
   return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_in_bounds(uint8_t const* p_desc, uint8_t const* desc_end) {
+TU_ATTR_ALWAYS_INLINE static inline bool tu_desc_in_bounds(const uint8_t *p_desc, const uint8_t *desc_end) {
   if (p_desc >= desc_end) {
     return false;
   }
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 419046b8b..5c9e586fb 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -551,29 +551,12 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_
     @returns Number of items in FIFO
  */
 /******************************************************************************/
-uint16_t tu_fifo_count(tu_fifo_t *f) {
+uint16_t tu_fifo_count(const tu_fifo_t *f) {
   return tu_min16(_ff_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
 }
 
 /******************************************************************************/
 /*!
-    @brief Check if FIFO is empty.
-
-    As this function only reads the read and write pointers once, this function is
-    reentrant and thus thread and ISR save without any mutexes.
-
-    @param[in]  f
-                Pointer to the FIFO buffer to manipulate
-
-    @returns Number of items in FIFO
- */
-/******************************************************************************/
-bool tu_fifo_empty(tu_fifo_t *f) {
-  return f->wr_idx == f->rd_idx;
-}
-
-/******************************************************************************/
-/*!
     @brief Check if FIFO is full.
 
     As this function only reads the read and write pointers once, this function is
@@ -585,7 +568,7 @@ bool tu_fifo_empty(tu_fifo_t *f) {
     @returns Number of items in FIFO
  */
 /******************************************************************************/
-bool tu_fifo_full(tu_fifo_t *f) {
+bool tu_fifo_full(const tu_fifo_t *f) {
   return _ff_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
 }
 
@@ -602,7 +585,7 @@ bool tu_fifo_full(tu_fifo_t *f) {
     @returns Number of items in FIFO
  */
 /******************************************************************************/
-uint16_t tu_fifo_remaining(tu_fifo_t *f) {
+uint16_t tu_fifo_remaining(const tu_fifo_t *f) {
   return _ff_remaining(f->depth, f->wr_idx, f->rd_idx);
 }
 
@@ -627,7 +610,7 @@ uint16_t tu_fifo_remaining(tu_fifo_t *f) {
     @returns True if overflow happened
  */
 /******************************************************************************/
-bool tu_fifo_overflowed(tu_fifo_t *f) {
+bool tu_fifo_overflowed(const tu_fifo_t *f) {
   return _ff_count(f->depth, f->wr_idx, f->rd_idx) > f->depth;
 }
 
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index 0f4ba00d8..9d8b864e9 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -155,33 +155,35 @@ void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_m
 #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex)
 #endif
 
-bool     tu_fifo_write                  (tu_fifo_t* f, void const * data);
-uint16_t tu_fifo_write_n                (tu_fifo_t* f, void const * data, uint16_t n);
-#ifdef TUP_MEM_CONST_ADDR
-uint16_t tu_fifo_write_n_const_addr_full_words    (tu_fifo_t* f, const void * data, uint16_t n);
-#endif
+bool     tu_fifo_write(tu_fifo_t *f, void const *data);
+uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n);
+
+bool     tu_fifo_read(tu_fifo_t *f, void *buffer);
+uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n);
 
-bool     tu_fifo_read                   (tu_fifo_t* f, void * buffer);
-uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * buffer, uint16_t n);
 #ifdef TUP_MEM_CONST_ADDR
-uint16_t tu_fifo_read_n_const_addr_full_words     (tu_fifo_t* f, void * buffer, uint16_t n);
+uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t *f, const void *data, uint16_t n);
+uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t *f, void *buffer, uint16_t n);
 #endif
 
-bool     tu_fifo_peek                   (tu_fifo_t* f, void * p_buffer);
-uint16_t tu_fifo_peek_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
+bool     tu_fifo_peek(tu_fifo_t *f, void *p_buffer);
+uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
 
-uint16_t tu_fifo_count                  (tu_fifo_t* f);
-uint16_t tu_fifo_remaining              (tu_fifo_t* f);
-bool     tu_fifo_empty                  (tu_fifo_t* f);
-bool     tu_fifo_full                   (tu_fifo_t* f);
-bool     tu_fifo_overflowed             (tu_fifo_t* f);
-void     tu_fifo_correct_read_pointer   (tu_fifo_t* f);
+uint16_t tu_fifo_count(const tu_fifo_t *f);
+uint16_t tu_fifo_remaining(const tu_fifo_t *f);
+bool     tu_fifo_full(const tu_fifo_t *f);
+bool     tu_fifo_overflowed(const tu_fifo_t *f);
 
-TU_ATTR_ALWAYS_INLINE static inline
-uint16_t tu_fifo_depth(tu_fifo_t* f) {
+TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) {
+  return f->wr_idx == f->rd_idx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_depth(const tu_fifo_t *f) {
   return f->depth;
 }
 
+void tu_fifo_correct_read_pointer(tu_fifo_t *f);
+
 // Pointer modifications intended to be used in combinations with DMAs.
 // USE WITH CARE - NO SAFETY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED!
 void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n);
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index fd922ee56..002cd3a0e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -37,14 +37,14 @@
 #ifdef __ARM_ARCH
   // ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access
   #if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1
-    #define TUP_ARCH_STRICT_ALIGN   0
+    #define TUP_ARCH_STRICT_ALIGN 0
   #else
-    #define TUP_ARCH_STRICT_ALIGN   1
+    #define TUP_ARCH_STRICT_ALIGN 1
   #endif
 #else
   // TODO default to strict align for others
   // Should investigate other architecture such as risv, xtensa, mips for optimal setting
-  #define TUP_ARCH_STRICT_ALIGN   1
+  #define TUP_ARCH_STRICT_ALIGN 1
 #endif
 
 /* USB Controller Attributes for Device, Host or MCU (both)
@@ -57,41 +57,41 @@
 //--------------------------------------------------------------------+
 // NXP
 //--------------------------------------------------------------------+
-#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
   #define TUP_USBIP_IP3511
-  #define TUP_DCD_ENDPOINT_MAX    5
+  #define TUP_DCD_ENDPOINT_MAX 5
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX 16
   #define TUP_USBIP_OHCI
   #define TUP_USBIP_OHCI_NXP
-  #define TUP_OHCI_RHPORTS        2
+  #define TUP_OHCI_RHPORTS 2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
-   #define TUP_USBIP_IP3511
-   #define TUP_DCD_ENDPOINT_MAX   5
+  #define TUP_USBIP_IP3511
+  #define TUP_DCD_ENDPOINT_MAX 5
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC54)
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
-  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC55)
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
   #define TUP_USBIP_OHCI
   #define TUP_USBIP_OHCI_NXP
-  #define TUP_OHCI_RHPORTS        1 // 1 downstream port
+  #define TUP_OHCI_RHPORTS     1 // 1 downstream port
 
-  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // USB0 has 6 with HS PHY, USB1 has 4 only FS
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
-  #define TUP_DCD_ENDPOINT_MAX    6
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 6
+  #define TUP_RHPORT_HIGHSPEED 1
 
 #elif TU_CHECK_MCU(OPT_MCU_MCXN9)
   // USB0 is chipidea FS
@@ -102,15 +102,15 @@
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
-  #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
 
 #elif TU_CHECK_MCU(OPT_MCU_MCXA15)
   // USB0 is chipidea FS
   #define TUP_USBIP_CHIPIDEA_FS
   #define TUP_USBIP_CHIPIDEA_FS_MCX
 
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX 16
 
 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
   #include "fsl_device_registers.h"
@@ -118,60 +118,61 @@
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
-  #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
 
   #if __CORTEX_M == 7
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT        1
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT        1
-  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT   32
+    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     1
+    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     1
+    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K)
   #define TUP_USBIP_CHIPIDEA_FS
   #define TUP_USBIP_CHIPIDEA_FS_KINETIS
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX 16
 
 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUP_DCD_EDPT_CLOSE_API
 
 //--------------------------------------------------------------------+
 // Nordic
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // 8 CBI + 1 ISO
-  #define TUP_DCD_ENDPOINT_MAX    9
+  #define TUP_DCD_ENDPOINT_MAX 9
+  #define TUP_DCD_EDPT_CLOSE_API
 
 #elif TU_CHECK_MCU(OPT_MCU_NRF54)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_NRF
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX            16
   #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
 
 //--------------------------------------------------------------------+
 // Microchip
 //--------------------------------------------------------------------+
-#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML2X, OPT_MCU_SAMD21) || \
-      TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
-  #define TUP_DCD_ENDPOINT_MAX    8
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML2X, OPT_MCU_SAMD21) || TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMG)
-  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_MAX 6
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
-  #define TUP_DCD_ENDPOINT_MAX    10
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 10
+  #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
-#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
-      TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
-  #define TUP_DCD_ENDPOINT_MAX    16
+#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
+  #define TUP_DCD_ENDPOINT_MAX 16
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define TUP_DCD_EDPT_CLOSE_API
 
 //--------------------------------------------------------------------+
 // ST
@@ -179,23 +180,23 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F1)
   // - F102, F103 use fsdev
   // - F105, F107 use dwc2
-  #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
-      defined (STM32F107xB) || defined (STM32F107xC)
+  #if defined(STM32F105x8) || defined(STM32F105xB) || defined(STM32F105xC) || defined(STM32F107xB) || \
+    defined(STM32F107xC)
     #define TUP_USBIP_DWC2
     #define TUP_USBIP_DWC2_STM32
     #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
 
-    #define TUP_DCD_ENDPOINT_MAX  4
-  #elif defined(STM32F102x6) || defined(STM32F102xB) || \
-        defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
+    #define TUP_DCD_ENDPOINT_MAX            4
+  #elif defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || defined(STM32F103xB) || \
+    defined(STM32F103xE) || defined(STM32F103xG)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX  8
+    #define TUP_DCD_ENDPOINT_MAX 8
   #else
     #error "Unsupported STM32F1 mcu"
   #endif
@@ -205,55 +206,55 @@
   #define TUP_USBIP_DWC2_STM32
 
   // FS has 4 ep, HS has 5 ep
-  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F3)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F4)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
   // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
-  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F7)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
   // FS has 6, HS has 9
-  #define TUP_DCD_ENDPOINT_MAX    9
+  #define TUP_DCD_ENDPOINT_MAX 9
 
   // MCU with on-chip HS Phy
   #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
-    #define TUP_RHPORT_HIGHSPEED  1 // Port0: FS, Port1: HS
+    #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
   #endif
 
   // Enable dcache if DMA is enabled
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
-  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  32
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
   #include "stm32h7xx.h"
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
-  #define TUP_DCD_ENDPOINT_MAX    9
+  #define TUP_DCD_ENDPOINT_MAX 9
 
   #if __CORTEX_M == 7
     // Enable dcache if DMA is enabled
-    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
-    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
-    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  32
+    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32H5)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G4)
   // Device controller
@@ -262,41 +263,40 @@
 
   // TypeC controller
   #define TUP_USBIP_TYPEC_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX  8
   #define TUP_TYPEC_RHPORTS_NUM 1
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32C0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L4)
   // - L4x2, L4x3 use fsdev
   // - L4x4, L4x6, L4x7, L4x9 use dwc2
-  #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
-      defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
-      defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
-      defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
-      defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
+  #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
+    defined(STM32L496xx) || defined(STM32L4A6xx) || defined(STM32L4P5xx) || defined(STM32L4Q5xx) ||   \
+    defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) ||   \
+    defined(STM32L4S7xx) || defined(STM32L4S9xx)
     #define TUP_USBIP_DWC2
     #define TUP_USBIP_DWC2_STM32
 
-    #define TUP_DCD_ENDPOINT_MAX  6
+    #define TUP_DCD_ENDPOINT_MAX 6
   #elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \
-        defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
+    defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX  8
+    #define TUP_DCD_ENDPOINT_MAX 8
   #else
     #error "Unsupported STM32L4 mcu"
   #endif
@@ -304,19 +304,19 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32WB)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
-  #define TUP_DCD_ENDPOINT_MAX    9
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 9
+  #define TUP_RHPORT_HIGHSPEED 1
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32U5)
-  #if defined (STM32U535xx) || defined (STM32U545xx)
+  #if defined(STM32U535xx) || defined(STM32U545xx)
     #define TUP_USBIP_FSDEV
     #define TUP_USBIP_FSDEV_STM32
-    #define TUP_DCD_ENDPOINT_MAX    8
+    #define TUP_DCD_ENDPOINT_MAX 8
 
   #else
     #define TUP_USBIP_DWC2
@@ -324,38 +324,38 @@
 
     // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY
     #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \
-        defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
-      #define TUP_DCD_ENDPOINT_MAX  9
-      #define TUP_RHPORT_HIGHSPEED  1
+      defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
+      #define TUP_DCD_ENDPOINT_MAX 9
+      #define TUP_RHPORT_HIGHSPEED 1
     #else
-      #define TUP_DCD_ENDPOINT_MAX  6
+      #define TUP_DCD_ENDPOINT_MAX 6
     #endif
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L5)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32U0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32U3)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
 
   // FS has 6, HS has 9
-  #define TUP_DCD_ENDPOINT_MAX    9
+  #define TUP_DCD_ENDPOINT_MAX                  9
 
   // MCU with on-chip HS Phy
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_RHPORT_HIGHSPEED                  1
 
   // Enable dcache if DMA is enabled
   #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
@@ -366,43 +366,39 @@
 // Sony
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_CXD56)
-  #define TUP_DCD_ENDPOINT_MAX    7
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 7
+  #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
-  #define TUP_DCD_EDPT_ISO_ALLOC
 
 //--------------------------------------------------------------------+
 // TI
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
   #define TUP_USBIP_MUSB
   #define TUP_USBIP_MUSB_TI
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 //--------------------------------------------------------------------+
 // ValentyUSB (Litex)
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
-  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_DCD_ENDPOINT_MAX 16
 
 //--------------------------------------------------------------------+
 // Nuvoton
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
-  #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_DCD_EDPT_ISO_ALLOC
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_NUC120)
-  #define TUP_DCD_ENDPOINT_MAX    6
-  #define TUP_DCD_EDPT_ISO_ALLOC
+  #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_NUC505)
-  #define TUP_DCD_ENDPOINT_MAX    12
-  #define TUP_RHPORT_HIGHSPEED    1
-  #define TUP_DCD_EDPT_ISO_ALLOC
+  #define TUP_DCD_ENDPOINT_MAX 12
+  #define TUP_RHPORT_HIGHSPEED 1
 
 //--------------------------------------------------------------------+
 // Espressif
@@ -410,114 +406,124 @@
 #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_ESP32
-  #define TUP_DCD_ENDPOINT_MAX    7 // only 5 TX FIFO for endpoint IN
-  #define CFG_TUSB_OS_INC_PATH_DEFAULT   freertos/
+  #define TUP_DCD_ENDPOINT_MAX         7 // only 5 TX FIFO for endpoint IN
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+  // clang-format on
 
   #if CFG_TUSB_MCU == OPT_MCU_ESP32S3
     #define TUP_MCU_MULTIPLE_CORE 1
   #endif
 
   // Disable slave if DMA is enabled
-  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT  !CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT  !CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT !CFG_TUH_DWC2_DMA_ENABLE
 
 #elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_ESP32
-  #define TUP_RHPORT_HIGHSPEED    1  // port0 FS, port1 HS
-  #define TUP_DCD_ENDPOINT_MAX    16 // FS 7 ep, HS 16 ep
+  #define TUP_RHPORT_HIGHSPEED                  1  // port0 FS, port1 HS
+  #define TUP_DCD_ENDPOINT_MAX                  16 // FS 7 ep, HS 16 ep
 
-  #define CFG_TUSB_OS_INC_PATH_DEFAULT   freertos/
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT          freertos/
+  // clang-format on
 
-  #define TUP_MCU_MULTIPLE_CORE   1
+  #define TUP_MCU_MULTIPLE_CORE                 1
 
   // Disable slave if DMA is enabled
-  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT  !CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT  !CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUH_DWC2_DMA_ENABLE
 
   // Enable dcache if DMA is enabled
-  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUD_DWC2_DMA_ENABLE
-  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT      CFG_TUH_DWC2_DMA_ENABLE
-  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT  64
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64
 
-#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
+#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, \
+                   OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
   #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
-  #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
+    #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
   #endif
 
-  #define TUP_DCD_ENDPOINT_MAX    0
-  #define CFG_TUSB_OS_INC_PATH_DEFAULT   freertos/
+  #define TUP_DCD_ENDPOINT_MAX         0
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+  // clang-format on
+
 
 //--------------------------------------------------------------------+
 // Dialog
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_DA1469X)
-  #define TUP_DCD_ENDPOINT_MAX    4
+  #define TUP_DCD_ENDPOINT_MAX 4
+  #define TUP_DCD_EDPT_CLOSE_API
 
 //--------------------------------------------------------------------+
 // Raspberry Pi
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_RP2040)
-  #define TUP_DCD_EDPT_ISO_ALLOC
-  #define TUP_DCD_ENDPOINT_MAX    16
-  #define TUP_MCU_MULTIPLE_CORE   1
+  #define TUP_DCD_ENDPOINT_MAX  16
+  #define TUP_MCU_MULTIPLE_CORE 1
 
-  #define TU_ATTR_FAST_FUNC       __not_in_flash("tinyusb")
+  #define TU_ATTR_FAST_FUNC     __not_in_flash("tinyusb")
 
 //--------------------------------------------------------------------+
 // Silabs
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
   #define TUP_USBIP_DWC2
-  #define TUP_DCD_ENDPOINT_MAX    7
+  #define TUP_DCD_ENDPOINT_MAX 7
 
 //--------------------------------------------------------------------+
 // Renesas
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
   #define TUP_USBIP_RUSB2
-  #define TUP_DCD_ENDPOINT_MAX    10
+  #define TUP_DCD_ENDPOINT_MAX 10
 
 //--------------------------------------------------------------------+
 // GigaDevice
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
   #define TUP_USBIP_DWC2
-  #define TUP_DCD_ENDPOINT_MAX    4
+  #define TUP_DCD_ENDPOINT_MAX 4
 
 //--------------------------------------------------------------------+
 // Broadcom
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
   #define TUP_USBIP_DWC2
-  #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
 
 //--------------------------------------------------------------------+
 // Infineon
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_XMC4000)
   #define TUP_USBIP_DWC2
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 //--------------------------------------------------------------------+
 // BridgeTek
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_FT90X)
-  #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_FT93X)
-  #define TUP_DCD_ENDPOINT_MAX    16
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 //--------------------------------------------------------------------+
 // Allwinner
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_F1C100S)
-  #define TUP_DCD_ENDPOINT_MAX    4
+  #define TUP_DCD_ENDPOINT_MAX 4
 
 //--------------------------------------------------------------------+
 // WCH
@@ -527,31 +533,35 @@
   #define TUP_USBIP_WCH_USBFS
 
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
-  #define CFG_TUD_WCH_USBIP_USBFS 0
+    #define CFG_TUD_WCH_USBIP_USBFS 0
   #endif
 
   #if !defined(CFG_TUD_WCH_USBIP_USBHS)
-  #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+    #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
   #endif
 
-  #define TUP_RHPORT_HIGHSPEED    CFG_TUD_WCH_USBIP_USBHS
-  #define TUP_DCD_ENDPOINT_MAX    (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+  #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
+  #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_CH32V103)
   #define TUP_USBIP_WCH_USBFS
 
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
-  #define CFG_TUD_WCH_USBIP_USBFS 1
+    #define CFG_TUD_WCH_USBIP_USBFS 1
   #endif
 
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
   // v20x support both port0 FSDEV (USBD) and port1 USBFS
   #define TUP_USBIP_WCH_USBFS
 
   #ifndef CFG_TUH_WCH_USBIP_USBFS
-  #define CFG_TUH_WCH_USBIP_USBFS 1
+    #define CFG_TUH_WCH_USBIP_USBFS 1
   #endif
 
   #define TUP_USBIP_FSDEV
@@ -559,14 +569,14 @@
 
   // default to FSDEV for device
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
-  #define CFG_TUD_WCH_USBIP_USBFS 0
+    #define CFG_TUD_WCH_USBIP_USBFS 0
   #endif
 
   #if !defined(CFG_TUD_WCH_USBIP_FSDEV)
-  #define CFG_TUD_WCH_USBIP_FSDEV  (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+    #define CFG_TUD_WCH_USBIP_FSDEV (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
   #endif
 
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_CH32V307)
   // v307 support both FS and HS, default to HS
@@ -574,15 +584,19 @@
   #define TUP_USBIP_WCH_USBFS
 
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
-  #define CFG_TUD_WCH_USBIP_USBFS 0
+    #define CFG_TUD_WCH_USBIP_USBFS 0
   #endif
 
   #if !defined(CFG_TUD_WCH_USBIP_USBHS)
-  #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+    #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
   #endif
 
-  #define TUP_RHPORT_HIGHSPEED    CFG_TUD_WCH_USBIP_USBHS
-  #define TUP_DCD_ENDPOINT_MAX    (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+  #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
+  #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
 
 //--------------------------------------------------------------------+
 // Analog Devices
@@ -590,8 +604,8 @@
 #elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
   #define TUP_USBIP_MUSB
   #define TUP_USBIP_MUSB_ADI
-  #define TUP_DCD_ENDPOINT_MAX    12
-  #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_ENDPOINT_MAX 12
+  #define TUP_RHPORT_HIGHSPEED 1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 //--------------------------------------------------------------------+
@@ -600,46 +614,44 @@
 #elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F413)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F415)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX    4
+  #define TUP_DCD_ENDPOINT_MAX 4
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F435_437)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F423)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F402_405)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
   // AT32F405xx has on-chip HS PHY
-  #if defined(AT32F405CBT7) || defined(AT32F405CBU7) ||     \
-      defined(AT32F405CCT7) || defined(AT32F405CCU7) ||     \
-      defined(AT32F405KBU7_4) || defined(AT32F405KCU7_4) || \
-      defined(AT32F405RBT7_7) || defined(AT32F405RBT7) ||   \
-      defined(AT32F405RCT7_7) || defined(AT32F405RCT7)
-    #define TUP_RHPORT_HIGHSPEED  1 // Port0: FS, Port1: HS
+  #if defined(AT32F405CBT7) || defined(AT32F405CBU7) || defined(AT32F405CCT7) || defined(AT32F405CCU7) ||     \
+    defined(AT32F405KBU7_4) || defined(AT32F405KCU7_4) || defined(AT32F405RBT7_7) || defined(AT32F405RBT7) || \
+    defined(AT32F405RCT7_7) || defined(AT32F405RCT7)
+    #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_AT32F425)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 
 #endif
 
@@ -649,7 +661,7 @@
 
 #if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
   #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
-    #define CFG_TUH_MAX3421_ENDPOINT_TOTAL  (8 + 4*(CFG_TUH_DEVICE_MAX-1))
+    #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4 * (CFG_TUH_DEVICE_MAX - 1))
   #endif
 #endif
 
@@ -659,17 +671,17 @@
 //--------------------------------------------------------------------+
 
 #ifndef TUP_MCU_MULTIPLE_CORE
-#define TUP_MCU_MULTIPLE_CORE 0
+  #define TUP_MCU_MULTIPLE_CORE 0
 #endif
 
 #if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED
   #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
-  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_ENDPOINT_MAX 8
 #endif
 
 // Default to fullspeed if not defined
 #ifndef TUP_RHPORT_HIGHSPEED
-  #define TUP_RHPORT_HIGHSPEED    0
+  #define TUP_RHPORT_HIGHSPEED 0
 #endif
 
 // fast function, normally mean placing function in SRAM
@@ -677,8 +689,12 @@
   #define TU_ATTR_FAST_FUNC
 #endif
 
-// USBIP that support ISO alloc & activate API
-#if defined(TUP_USBIP_DWC2) || defined(TUP_USBIP_FSDEV) || defined(TUP_USBIP_MUSB)
+#if defined(TUP_USBIP_IP3511) || defined(TUP_USBIP_RUSB2)
+  #define TUP_DCD_EDPT_CLOSE_API
+#endif
+
+// USBIP implement dcd_edpt_close() and does not support ISO alloc & activate API
+#ifndef TUP_DCD_EDPT_CLOSE_API
   #define TUP_DCD_EDPT_ISO_ALLOC
 #endif
 
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index dcd5c45d6..be1264a71 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -100,20 +100,26 @@ bool tu_edpt_stream_deinit(tu_edpt_stream_t* s);
 
 // Open an stream for an endpoint
 TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) {
-  tu_fifo_clear(&s->ff);
   s->ep_addr = desc_ep->bEndpointAddress;
   s->is_mps512 = tu_edpt_packet_size(desc_ep) == 512;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_is_opened(const tu_edpt_stream_t *s) {
+  return s->ep_addr != 0;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_close(tu_edpt_stream_t* s) {
   s->ep_addr = 0;
 }
 
-// Clear fifo
 TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_clear(tu_edpt_stream_t* s) {
   return tu_fifo_clear(&s->ff);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_empty(tu_edpt_stream_t *s) {
+  return tu_fifo_empty(&s->ff);
+}
+
 //--------------------------------------------------------------------+
 // Stream Write
 //--------------------------------------------------------------------+
@@ -121,7 +127,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_clear(tu_edpt_stream_t*
 // Write to stream
 uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const *buffer, uint32_t bufsize);
 
-// Start an usb transfer if endpoint is not busy
+// Start an usb transfer if endpoint is not busy. Return number of queued bytes
 uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s);
 
 // Start an zero-length packet if needed
@@ -151,20 +157,18 @@ void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_byt
 
 // Complete read transfer with provided buffer
 TU_ATTR_ALWAYS_INLINE static inline
-void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t* s, const void * buf, uint32_t xferred_bytes) {
+void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t *s, const void *buf, uint32_t xferred_bytes) {
   if (0u != tu_fifo_depth(&s->ff)) {
     tu_fifo_write_n(&s->ff, buf, (uint16_t) xferred_bytes);
   }
 }
 
 // Get the number of bytes available for reading
-TU_ATTR_ALWAYS_INLINE static inline
-uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_edpt_stream_read_available(const tu_edpt_stream_t *s) {
   return (uint32_t) tu_fifo_count(&s->ff);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline
-bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch) {
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_peek(tu_edpt_stream_t *s, uint8_t *ch) {
   return tu_fifo_peek(&s->ff, ch);
 }
 
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index a3a660d3b..73c816e3e 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -103,6 +103,7 @@ typedef enum {
   TUSB_DIR_OUT = 0,
   TUSB_DIR_IN  = 1,
 
+  TUSB_EPNUM_MASK = 0x0F,
   TUSB_DIR_IN_MASK = 0x80
 } tusb_dir_t;
 
@@ -544,7 +545,7 @@ TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) {
 
 // Get Endpoint number from address
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
-  return (uint8_t) (addr & (~TUSB_DIR_IN_MASK));
+  return (uint8_t) (addr & TUSB_EPNUM_MASK);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
diff --git a/src/device/dcd.h b/src/device/dcd.h
index da675bb33..8a074ab47 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -171,7 +171,12 @@ void dcd_edpt_stall           (uint8_t rhport, uint8_t ep_addr);
 // This API never calls with control endpoints, since it is auto cleared when receiving setup packet
 void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
 
-#ifdef TUP_DCD_EDPT_ISO_ALLOC
+#ifdef TUP_DCD_EDPT_CLOSE_API
+// Close an endpoint.
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr);
+
+#else
+
 // Allocate packet buffer used by ISO endpoints
 // Some MCU need manual packet buffer allocation, we allocate the largest size to avoid clustering
 bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
@@ -179,10 +184,6 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 // Configure and enable an ISO endpoint according to descriptor
 bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
 
-#else
-// Close an endpoint.
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr);
-
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 70827bfee..47d58a1f9 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -60,7 +60,7 @@ typedef struct {
 static usbd_control_xfer_t _ctrl_xfer;
 
 CFG_TUD_MEM_SECTION static struct {
-  TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_SIZE);
+  TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_BUFSIZE);
 } _ctrl_epbuf;
 
 //--------------------------------------------------------------------+
@@ -88,13 +88,13 @@ bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) {
 // Each transaction has up to Endpoint0's max packet size.
 // This function can also transfer an zero-length packet
 static bool data_stage_xact(uint8_t rhport) {
-  const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_SIZE);
+  const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_BUFSIZE);
   uint8_t ep_addr = EDPT_CTRL_OUT;
 
   if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
     ep_addr = EDPT_CTRL_IN;
     if (0u != xact_len) {
-      TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len));
+      TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
     }
   }
 
@@ -179,7 +179,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
   // Data Stage is complete when all request's length are transferred or
   // a short packet is sent including zero-length packet.
   if ((_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) ||
-      (xferred_bytes < CFG_TUD_ENDPOINT0_SIZE)) {
+      (xferred_bytes < CFG_TUD_ENDPOINT0_BUFSIZE)) {
     // DATA stage is complete
     bool is_ok = true;
 
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index bc86dcb28..174136e38 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -34,26 +34,41 @@ extern "C" {
 //--------------------------------------------------------------------+
 // Spinlock API
 //--------------------------------------------------------------------+
+// Note: This implementation is designed for bare-metal single-core systems without RTOS.
+// - Supports nested locking within the same execution context
+// - NOT suitable for true SMP (Symmetric Multi-Processing) systems
+// - NOT thread-safe for multi-threaded environments
+// - Primarily manages interrupt enable/disable state for critical sections
 typedef struct {
   void (* interrupt_set)(bool enabled);
+  uint32_t nested_count;
 } osal_spinlock_t;
 
 // For SMP, spinlock must be locked by hardware, cannot just use interrupt
 #define OSAL_SPINLOCK_DEF(_name, _int_set) \
-  osal_spinlock_t _name = { .interrupt_set = _int_set }
+  osal_spinlock_t _name = { .interrupt_set = _int_set, .nested_count = 0 }
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
-  if (!in_isr) {
+  // Disable interrupts first to make nested_count increment atomic
+  if (!in_isr && ctx->nested_count == 0) {
     ctx->interrupt_set(false);
   }
+  ctx->nested_count++;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
-  if (!in_isr) {
+  if (ctx->nested_count == 0) {
+    return; // spin is not locked to begin with
+  }
+
+  ctx->nested_count--;
+
+  // Only re-enable interrupts when fully unlocked
+  if (!in_isr && ctx->nested_count == 0) {
     ctx->interrupt_set(true);
   }
 }
diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
index 76a54e62e..89477b9ac 100644
--- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
@@ -806,6 +806,20 @@ void dcd_edpt_close_all(uint8_t rhport)
   _ft9xx_reset_edpts();
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+
+
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
@@ -1202,5 +1216,4 @@ void ft9xx_usbd_pm_ISR(void)
       }
   }
 }
-
 #endif
diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
index 558d64b57..312a98299 100644
--- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
@@ -344,24 +344,21 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
-
-  const unsigned ep_addr  = ep_desc->bEndpointAddress;
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  const unsigned xfer     = ep_desc->bmAttributes.xfer;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  const unsigned odd      = ep->odd;
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+static bool edpt_open(uint8_t rhport, uint8_t ep_addr, uint16_t max_packet_size, tusb_xfer_type_t xfer) {
+  (void)rhport;
+  const unsigned       epn = tu_edpt_number(ep_addr);
+  const unsigned       dir = tu_edpt_dir(ep_addr);
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  const unsigned       odd = ep->odd;
+  buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
 
   /* No support for control transfer */
   TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
 
-  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  ep->max_packet_size = max_packet_size;
+
   unsigned val = USB_ENDPT_EPCTLDIS_MASK;
-  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   CI_REG->EP[epn].CTL |= val;
 
@@ -375,8 +372,27 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
-void dcd_edpt_close_all(uint8_t rhport)
-{
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  return edpt_open(rhport, ep_desc->bEndpointAddress, tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer);
+}
+
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  return edpt_open(rhport, ep_addr, largest_packet_size, TUSB_XFER_ISOCHRONOUS);
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  const unsigned    epn = tu_edpt_number(ep_desc->bEndpointAddress);
+  const unsigned    dir = tu_edpt_dir(ep_desc->bEndpointAddress);
+  endpoint_state_t *ep  = &_dcd.endpoint[epn][dir];
+
+  dcd_int_disable(rhport);
+  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  dcd_int_enable(rhport);
+
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport) {
   dcd_int_disable(rhport);
 
   for (unsigned i = 1; i < 16; ++i) {
@@ -399,26 +415,6 @@ void dcd_edpt_close_all(uint8_t rhport)
   }
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
-  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
-
-  dcd_int_disable(rhport);
-
-  CI_REG->EP[epn].CTL &= ~msk;
-  ep->max_packet_size = 0;
-  ep->length          = 0;
-  ep->remaining       = 0;
-  bd[0].head          = 0;
-  bd[1].head          = 0;
-
-  dcd_int_enable(rhport);
-}
-
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
   (void) is_isr;
@@ -565,5 +561,4 @@ void dcd_int_handler(uint8_t rhport)
     process_tokdne(rhport);
   }
 }
-
 #endif
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 808c293a5..c6d405e98 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -65,15 +65,18 @@ bool dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
 
 // ENDPTCTRL
 enum {
+  ENDPTCTRL_TYPE_POS = 2, // Endpoint type is 2-bit field
+};
+
+enum {
   ENDPTCTRL_STALL          = TU_BIT(0),
   ENDPTCTRL_TOGGLE_INHIBIT = TU_BIT(5), // used for test only
   ENDPTCTRL_TOGGLE_RESET   = TU_BIT(6),
-  ENDPTCTRL_ENABLE         = TU_BIT(7)
+  ENDPTCTRL_ENABLE         = TU_BIT(7),
 };
 
-enum {
-  ENDPTCTRL_TYPE_POS  = 2, // Endpoint type is 2-bit field
-};
+#define ENDPTCTRL_TYPE(_type) ((_type) << ENDPTCTRL_TYPE_POS)
+  #define ENDPTCTRL_RESET_MASK  (ENDPTCTRL_TYPE(TUSB_XFER_BULK) | (ENDPTCTRL_TYPE(TUSB_XFER_BULK) << 16u))
 
 // USBSTS, USBINTR
 enum {
@@ -170,9 +173,7 @@ static dcd_data_t _dcd_data;
 // Prototypes and Helper Functions
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE
-static inline uint8_t ci_ep_count(ci_hs_regs_t const* dcd_reg)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint8_t ci_ep_count(const ci_hs_regs_t *dcd_reg) {
   return dcd_reg->DCCPARAMS & DCCPARAMS_DEN_MASK;
 }
 
@@ -191,9 +192,8 @@ static void bus_reset(uint8_t rhport)
   // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior
   // for the data PID tracking on the active endpoint.
   uint8_t const ep_count = ci_ep_count(dcd_reg);
-  for( uint8_t i=1; i < ep_count; i++)
-  {
-    dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS));
+  for (uint8_t i = 1; i < ep_count; i++) {
+    dcd_reg->ENDPTCTRL[i] = ENDPTCTRL_RESET_MASK;
   }
 
   //------------- Clear All Registers -------------//
@@ -315,26 +315,25 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 // HELPER
 //--------------------------------------------------------------------+
 
-static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
-{
-  dcd_dcache_clean_invalidate((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes);
+static void qtd_init(dcd_qtd_t *p_qtd, void *data_ptr, uint16_t total_bytes) {
+  dcd_dcache_clean_invalidate((uint32_t *)tu_align((uint32_t)data_ptr, 4), total_bytes);
 
   tu_memclr(p_qtd, sizeof(dcd_qtd_t));
 
-  p_qtd->next            = QTD_NEXT_INVALID;
-  p_qtd->active          = 1;
-  p_qtd->total_bytes     = p_qtd->expected_bytes = total_bytes;
-  p_qtd->int_on_complete = true;
+  p_qtd->next        = QTD_NEXT_INVALID;
+  p_qtd->active      = 1;
+  p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
+  p_qtd->int_on_complete                     = true;
 
-  if (data_ptr != NULL)
-  {
-    p_qtd->buffer[0] = (uint32_t) data_ptr;
+  if (data_ptr != NULL) {
+    p_qtd->buffer[0] = (uint32_t)data_ptr;
 
-    uint32_t const bufend = p_qtd->buffer[0] + total_bytes;
-    for(uint8_t i=1; i<5; i++)
-    {
-      uint32_t const next_page = tu_align4k( p_qtd->buffer[i-1] ) + 4096;
-      if ( bufend <= next_page ) break;
+    const uint32_t bufend = p_qtd->buffer[0] + total_bytes;
+    for (uint8_t i = 1; i < 5; i++) {
+      const uint32_t next_page = tu_align4k(p_qtd->buffer[i - 1]) + 4096;
+      if (bufend <= next_page) {
+        break;
+      }
 
       p_qtd->buffer[i] = next_page;
 
@@ -346,6 +345,35 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
 //--------------------------------------------------------------------+
 // DCD Endpoint Port
 //--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void ep_ctrl_write(volatile uint32_t *epctrl, uint8_t dir, uint32_t value) {
+  if (dir == TUSB_DIR_OUT) {
+    *epctrl = (*epctrl & 0xFFFF0000u) | value;
+  } else {
+    *epctrl = (*epctrl & 0x0000FFFFu) | (value << 16);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_ctrl_mask(volatile uint32_t *epctrl, uint8_t dir, uint32_t and_mask,
+                                                      uint32_t or_mask) {
+  uint32_t value = *epctrl;
+  if (and_mask != 0) {
+    value &= (dir == TUSB_DIR_OUT) ? and_mask : (and_mask << 16u);
+  }
+  if (or_mask != 0) {
+    value |= (dir == TUSB_DIR_OUT) ? or_mask : (or_mask << 16u);
+  }
+
+  *epctrl = value;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_ctrl_set(volatile uint32_t *epctrl, uint8_t dir, uint32_t mask) {
+  ep_ctrl_mask(epctrl, dir, 0, mask);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_ctrl_clear(volatile uint32_t *epctrl, uint8_t dir, uint32_t mask) {
+  ep_ctrl_mask(epctrl, dir, ~mask, 0);
+}
+
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 {
   uint8_t const epnum  = tu_edpt_number(ep_addr);
@@ -366,80 +394,91 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   // data toggle also need to be reset
   ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
   dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 );
-  dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir  ? 16 : 0));
+  dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << (dir ? 16 : 0));
 }
 
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
-{
-  uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
-  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-
-  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
-
-  // Must not exceed max endpoint number
-  TU_ASSERT(epnum < ci_ep_count(dcd_reg));
-
-  //------------- Prepare Queue Head -------------//
-  dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
+static void qhd_init(dcd_qhd_t *p_qhd, uint16_t max_packet_size, uint8_t iso_mult) {
   tu_memclr(p_qhd, sizeof(dcd_qhd_t));
-
   p_qhd->zero_length_termination = 1;
-  p_qhd->max_packet_size         = tu_edpt_packet_size(p_endpoint_desc);
-  if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
-  {
-    p_qhd->iso_mult = 1;
-  }
-
+  p_qhd->max_packet_size         = max_packet_size;
+  p_qhd->iso_mult                = iso_mult;
   p_qhd->qtd_overlay.next        = QTD_NEXT_INVALID;
-
   dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
+}
 
-  // Enable EP Control
-  uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET;
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *endpoint_desc) {
+  ci_hs_regs_t *dcd_reg   = CI_HS_REG(rhport);
+  const uint8_t epnum     = tu_edpt_number(endpoint_desc->bEndpointAddress);
+  const uint8_t dir       = tu_edpt_dir(endpoint_desc->bEndpointAddress);
+  const uint8_t xfer_type = endpoint_desc->bmAttributes.xfer;
+  TU_ASSERT(epnum < ci_ep_count(dcd_reg));
 
-  if ( dir == TUSB_DIR_OUT )
-  {
-    dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0xFFFF0000u) | epctrl;
-  }else
-  {
-    dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0x0000FFFFu) | (epctrl << 16);
-  }
+  dcd_qhd_t *p_qhd = &_dcd_data.qhd[epnum][dir];
+  qhd_init(p_qhd, tu_edpt_packet_size(endpoint_desc), 0u);
+
+  // EP Control
+  const uint32_t epctrl = ENDPTCTRL_TYPE(xfer_type) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET;
+  ep_ctrl_write(&dcd_reg->ENDPTCTRL[epnum], dir, epctrl);
 
   return true;
 }
 
-void dcd_edpt_close_all (uint8_t rhport)
-{
-  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
 
-  // Disable all non-control endpoints
-  uint8_t const ep_count = ci_ep_count(dcd_reg);
-  for (uint8_t epnum = 1; epnum < ep_count; epnum++)
-  {
-    _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1;
-    _dcd_data.qhd[epnum][TUSB_DIR_IN ].qtd_overlay.halted = 1;
+  ci_hs_regs_t *dcd_reg = CI_HS_REG(rhport);
+  const uint8_t epnum   = tu_edpt_number(ep_addr);
+  const uint8_t dir     = tu_edpt_dir(ep_addr);
+  TU_ASSERT(epnum < ci_ep_count(dcd_reg));
 
-    dcd_reg->ENDPTFLUSH = TU_BIT(epnum) |  TU_BIT(epnum+16);
-    dcd_reg->ENDPTCTRL[epnum] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS));
-  }
+  // EP Control: set type but not enabled yet
+  const uint32_t epctrl = ENDPTCTRL_TYPE(TUSB_XFER_ISOCHRONOUS) | ENDPTCTRL_TOGGLE_RESET;
+  ep_ctrl_write(&dcd_reg->ENDPTCTRL[epnum], dir, epctrl);
+
+  return true;
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  uint8_t const epnum  = tu_edpt_number(ep_addr);
-  uint8_t const dir    = tu_edpt_dir(ep_addr);
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  const uint8_t epnum   = tu_edpt_number(desc_ep->bEndpointAddress);
+  const uint8_t dir     = tu_edpt_dir(desc_ep->bEndpointAddress);
+  ci_hs_regs_t *dcd_reg = CI_HS_REG(rhport);
+  TU_ASSERT(epnum < ci_ep_count(dcd_reg));
 
-  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
+  dcd_qhd_t         *p_qhd     = &_dcd_data.qhd[epnum][dir];
+  volatile uint32_t *endptctrl = &dcd_reg->ENDPTCTRL[epnum];
 
-  _dcd_data.qhd[epnum][dir].qtd_overlay.halted = 1;
+  // _dcd_data.qhd[epnum][dir].qtd_overlay.halted = 1;
+  // dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 
   // Flush EP
-  uint32_t const flush_mask = TU_BIT(epnum + (dir ? 16 : 0));
-  dcd_reg->ENDPTFLUSH = flush_mask;
-  while(dcd_reg->ENDPTFLUSH & flush_mask);
+  const uint32_t flush_mask = TU_BIT(epnum + (dir ? 16 : 0));
+  dcd_reg->ENDPTFLUSH       = flush_mask;
+  while (dcd_reg->ENDPTFLUSH & flush_mask) {}
+
+  // disable to change max packet size
+  ep_ctrl_clear(endptctrl, dir, ENDPTCTRL_ENABLE);
 
-  // Clear EP enable
-  dcd_reg->ENDPTCTRL[epnum] &=~(ENDPTCTRL_ENABLE << (dir ? 16 : 0));
+  qhd_init(p_qhd, tu_edpt_packet_size(desc_ep), 1u);
+
+  ep_ctrl_set(endptctrl, dir, ENDPTCTRL_ENABLE);
+
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport) {
+  ci_hs_regs_t *dcd_reg = CI_HS_REG(rhport);
+
+  // Disable all non-control endpoints
+  uint8_t const ep_count = ci_ep_count(dcd_reg);
+  for (uint8_t epnum = 1; epnum < ep_count; epnum++) {
+    _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1;
+    _dcd_data.qhd[epnum][TUSB_DIR_IN].qtd_overlay.halted  = 1;
+
+    dcd_reg->ENDPTFLUSH       = TU_BIT(epnum) | TU_BIT(epnum + 16);
+    dcd_reg->ENDPTCTRL[epnum] = ENDPTCTRL_RESET_MASK;
+  }
 }
 
 static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir)
@@ -680,5 +719,4 @@ void dcd_int_handler(uint8_t rhport)
     dcd_event_sof(rhport, frame, true);
   }
 }
-
 #endif
diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c
index 5beb62b4d..a283c8362 100644
--- a/src/portable/dialog/da146xx/dcd_da146xx.c
+++ b/src/portable/dialog/da146xx/dcd_da146xx.c
@@ -1025,6 +1025,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   tu_memclr(xfer, sizeof(*xfer));
 }
 
+#if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
+}
+#endif
+
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
   (void) is_isr;
@@ -1219,5 +1234,4 @@ void dcd_int_handler(uint8_t rhport)
     handle_alt_ev();
   }
 }
-
 #endif
diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c
index 3114295de..fedede8ab 100644
--- a/src/portable/microchip/pic/dcd_pic.c
+++ b/src/portable/microchip/pic/dcd_pic.c
@@ -687,6 +687,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   if (ie) intr_enable(rhport);
 }
 
+#if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
+}
+#endif
+
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
   (void) is_isr;
@@ -867,5 +882,4 @@ void dcd_int_handler(uint8_t rhport)
 
   intr_clear(rhport);
 }
-
 #endif
diff --git a/src/portable/microchip/pic32mz/dcd_pic32mz.c b/src/portable/microchip/pic32mz/dcd_pic32mz.c
index a903c3ae2..94ecf1455 100644
--- a/src/portable/microchip/pic32mz/dcd_pic32mz.c
+++ b/src/portable/microchip/pic32mz/dcd_pic32mz.c
@@ -438,12 +438,20 @@ void dcd_edpt_close_all (uint8_t rhport)
   }
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void) rhport;
   (void) ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
+
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
   (void) is_isr;
@@ -745,5 +753,4 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
 }
-
 #endif
diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c
index 8293273e5..cdfb00e3c 100644
--- a/src/portable/microchip/samd/dcd_samd.c
+++ b/src/portable/microchip/samd/dcd_samd.c
@@ -245,11 +245,17 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   return true;
 }
 
-void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) {
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void) rhport;
   (void) ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
 
-  // TODO: implement if necessary?
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
 void dcd_edpt_close_all (uint8_t rhport)
@@ -428,5 +434,4 @@ void dcd_int_handler (uint8_t rhport)
   // Handle complete transfer
   maybe_transfer_complete();
 }
-
 #endif
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index c6c7f15d1..149eee794 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -270,9 +270,17 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport; (void) ep_addr;
-  // TODO implement dcd_edpt_close()
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
 void dcd_edpt_close_all (uint8_t rhport)
@@ -496,5 +504,4 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
 }
-
 #endif
diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c
index 57c0fcb4d..4d54f9057 100644
--- a/src/portable/microchip/samx7x/dcd_samx7x.c
+++ b/src/portable/microchip/samx7x/dcd_samx7x.c
@@ -559,15 +559,17 @@ void dcd_edpt_close_all (uint8_t rhport)
   // TODO implement dcd_edpt_close_all()
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void) rhport;
-  uint8_t const epnum  = tu_edpt_number(ep_addr);
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
 
-  // Disable endpoint interrupt
-  USB_REG->DEVIDR = 1 << (DEVIDR_PEP_0_Pos + epnum);
-  // Disable EP
-  USB_REG->DEVEPT &=~(1 << (DEVEPT_EPEN0_Pos + epnum));
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
 }
 
 static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix)
@@ -775,5 +777,4 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   USB_REG->DEVEPTIDR[epnum] = DEVEPTIDR_CTRL_STALLRQC;
   USB_REG->DEVEPTIER[epnum] = HSTPIPIER_RSTDTS;
 }
-
 #endif
diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
index 929cb40c4..6f88e0a24 100644
--- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
+++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_MM32F327X )
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_MM32F327X)
 
 #include "reg_usb_otg_fs.h"
 #include "mm32_device.h"
@@ -43,56 +43,53 @@ enum {
   TOK_PID_SETUP = 0xDu,
 };
 
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   union {
     uint32_t head;
     struct {
       union {
         struct {
-          uint16_t          :  2;
-          uint16_t tok_pid  :  4;
-          uint16_t data     :  1;
-          uint16_t own      :  1;
-          uint16_t          :  8;
+          uint16_t         : 2;
+          uint16_t tok_pid : 4;
+          uint16_t data    : 1;
+          uint16_t own     : 1;
+          uint16_t         : 8;
         };
         struct {
-          uint16_t          :  2;
-          uint16_t bdt_stall:  1;
-          uint16_t dts      :  1;
-          uint16_t ninc     :  1;
-          uint16_t keep     :  1;
-          uint16_t          : 10;
+          uint16_t           : 2;
+          uint16_t bdt_stall : 1;
+          uint16_t dts       : 1;
+          uint16_t ninc      : 1;
+          uint16_t keep      : 1;
+          uint16_t           : 10;
         };
       };
-      uint16_t bc          : 10;
-      uint16_t             :  6;
+      uint16_t bc : 10;
+      uint16_t    : 6;
     };
   };
   uint8_t *addr;
-}buffer_descriptor_t;
+} buffer_descriptor_t;
 
-TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" );
+TU_VERIFY_STATIC(sizeof(buffer_descriptor_t) == 8, "size is not correct");
 
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   union {
     uint32_t state;
     struct {
-      uint32_t max_packet_size :11;
+      uint32_t max_packet_size : 11;
       uint32_t                 : 5;
       uint32_t odd             : 1;
-      uint32_t                 :15;
+      uint32_t                 : 15;
     };
   };
   uint16_t length;
   uint16_t remaining;
-}endpoint_state_t;
+} endpoint_state_t;
 
-TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" );
+TU_VERIFY_STATIC(sizeof(endpoint_state_t) == 8, "size is not correct");
 
-typedef struct
-{
+typedef struct {
   union {
     /* [#EP][OUT,IN][EVEN,ODD] */
     buffer_descriptor_t bdt[16][2][2];
@@ -104,7 +101,7 @@ typedef struct
   };
   uint8_t setup_packet[8];
   uint8_t addr;
-}dcd_data_t;
+} dcd_data_t;
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
@@ -112,10 +109,9 @@ typedef struct
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
 CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
 
-TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
+TU_VERIFY_STATIC(sizeof(_dcd.bdt) == 512, "size is not correct");
 
-static void prepare_next_setup_packet(uint8_t rhport)
-{
+static void prepare_next_setup_packet(uint8_t rhport) {
   const unsigned out_odd = _dcd.endpoint[0][0].odd;
   const unsigned in_odd  = _dcd.endpoint[0][1].odd;
   if (_dcd.bdt[0][0][out_odd].own) {
@@ -126,12 +122,10 @@ static void prepare_next_setup_packet(uint8_t rhport)
   _dcd.bdt[0][0][out_odd ^ 1].data = 1;
   _dcd.bdt[0][1][in_odd].data      = 1;
   _dcd.bdt[0][1][in_odd ^ 1].data  = 0;
-  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT),
-                _dcd.setup_packet, sizeof(_dcd.setup_packet), false);
+  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), _dcd.setup_packet, sizeof(_dcd.setup_packet), false);
 }
 
-static void process_stall(uint8_t rhport)
-{
+static void process_stall(uint8_t rhport) {
   if (USB_OTG_FS->EP_CTL[0] & USB_ENDPT_EPSTALL_MASK) {
     /* clear stall condition of the control pipe */
     prepare_next_setup_packet(rhport);
@@ -139,13 +133,12 @@ static void process_stall(uint8_t rhport)
   }
 }
 
-static void process_tokdne(uint8_t rhport)
-{
-  const unsigned s = USB_OTG_FS->STAT;
-  USB_OTG_FS->INT_STAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */
-  buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s];
-  endpoint_state_t    *ep = &_dcd.endpoint_unified[s >> 3];
-  unsigned odd = (s & USB_STAT_ODD_MASK) ? 1 : 0;
+static void process_tokdne(uint8_t rhport) {
+  const unsigned s         = USB_OTG_FS->STAT;
+  USB_OTG_FS->INT_STAT     = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */
+  buffer_descriptor_t *bd  = (buffer_descriptor_t *)&_dcd.bda[s];
+  endpoint_state_t    *ep  = &_dcd.endpoint_unified[s >> 3];
+  unsigned             odd = (s & USB_STAT_ODD_MASK) ? 1 : 0;
 
   /* fetch pid before discarded by the next steps */
   const unsigned pid = bd->tok_pid;
@@ -155,7 +148,7 @@ static void process_tokdne(uint8_t rhport)
   bd->ninc      = 0;
   bd->keep      = 0;
   /* update the odd variable to prepare for the next transfer */
-  ep->odd       = odd ^ 1;
+  ep->odd = odd ^ 1;
   if (pid == TOK_PID_SETUP) {
     dcd_event_setup_received(rhport, bd->addr, true);
     USB_OTG_FS->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
@@ -165,25 +158,24 @@ static void process_tokdne(uint8_t rhport)
     TU_LOG1("TKDNE %x\r\n", s);
   }
 
-  const unsigned bc = bd->bc;
+  const unsigned bc        = bd->bc;
   const unsigned remaining = ep->remaining - bc;
   if (remaining && bc == ep->max_packet_size) {
     /* continue the transferring consecutive data */
-    ep->remaining = remaining;
+    ep->remaining            = remaining;
     const int next_remaining = remaining - ep->max_packet_size;
     if (next_remaining > 0) {
       /* prepare to the after next transfer */
       bd->addr += ep->max_packet_size * 2;
-      bd->bc    = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining;
+      bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size : next_remaining;
       __DSB();
-      bd->own   = 1; /* the own bit must set after addr */
+      bd->own = 1; /* the own bit must set after addr */
     }
     return;
   }
   const unsigned length = ep->length;
-  dcd_event_xfer_complete(rhport,
-                          ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT),
-                          length - remaining, XFER_RESULT_SUCCESS, true);
+  dcd_event_xfer_complete(rhport, ((s & USB_STAT_TX_MASK) << 4) | (s >> USB_STAT_ENDP_SHIFT), length - remaining,
+                          XFER_RESULT_SUCCESS, true);
   if (0 == (s & USB_STAT_ENDP_MASK) && 0 == length) {
     /* After completion a ZLP of control transfer,
      * it prepares for the next steup transfer. */
@@ -191,24 +183,23 @@ static void process_tokdne(uint8_t rhport)
       /* When the transfer was the SetAddress,
        * the device address should be updated here. */
       USB_OTG_FS->ADDR = _dcd.addr;
-      _dcd.addr  = 0;
+      _dcd.addr        = 0;
     }
     prepare_next_setup_packet(rhport);
   }
 }
 
-static void process_bus_reset(uint8_t rhport)
-{
-  USB_OTG_FS->CTL     |= USB_CTL_ODDRST_MASK;
-  USB_OTG_FS->ADDR     = 0;
-  USB_OTG_FS->INT_ENB    = (USB_OTG_FS->INT_ENB & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK;
+static void process_bus_reset(uint8_t rhport) {
+  USB_OTG_FS->CTL |= USB_CTL_ODDRST_MASK;
+  USB_OTG_FS->ADDR    = 0;
+  USB_OTG_FS->INT_ENB = (USB_OTG_FS->INT_ENB & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK;
 
   USB_OTG_FS->EP_CTL[0] = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK;
   for (unsigned i = 1; i < 16; ++i) {
     USB_OTG_FS->EP_CTL[i] = 0;
   }
   buffer_descriptor_t *bd = _dcd.bdt[0][0];
-  for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) {
+  for (unsigned i = 0; i < sizeof(_dcd.bdt) / sizeof(*bd); ++i, ++bd) {
     bd->head = 0;
   }
   const endpoint_state_t ep0 = {
@@ -226,31 +217,29 @@ static void process_bus_reset(uint8_t rhport)
   dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
 }
 
-static void process_bus_inactive(uint8_t rhport)
-{
-  (void) rhport;
+static void process_bus_inactive(uint8_t rhport) {
+  (void)rhport;
   const unsigned inten = USB_OTG_FS->INT_ENB;
-  USB_OTG_FS->INT_ENB    = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK;
+  USB_OTG_FS->INT_ENB  = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK;
   dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
 }
 
-static void process_bus_active(uint8_t rhport)
-{
-  (void) rhport;
+static void process_bus_active(uint8_t rhport) {
+  (void)rhport;
   const unsigned inten = USB_OTG_FS->INT_ENB;
-  USB_OTG_FS->INT_ENB    = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK;
+  USB_OTG_FS->INT_ENB  = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK;
   dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
 }
 
 /*------------------------------------------------------------------*/
 /* Device API
  *------------------------------------------------------------------*/
-bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
-  (void) rhport;
-  (void) rh_init;
+bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
+  (void)rhport;
+  (void)rh_init;
 
   tu_memclr(&_dcd, sizeof(_dcd));
-  USB_OTG_FS->BDT_PAGE_01 = (uint8_t)((uintptr_t)_dcd.bdt >>  8);
+  USB_OTG_FS->BDT_PAGE_01 = (uint8_t)((uintptr_t)_dcd.bdt >> 8);
   USB_OTG_FS->BDT_PAGE_02 = (uint8_t)((uintptr_t)_dcd.bdt >> 16);
   USB_OTG_FS->BDT_PAGE_03 = (uint8_t)((uintptr_t)_dcd.bdt >> 24);
 
@@ -259,27 +248,24 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   return true;
 }
 #define USB_DEVICE_INTERRUPT_PRIORITY (3U)
-void dcd_int_enable(uint8_t rhport)
-{
+void dcd_int_enable(uint8_t rhport) {
   uint8_t irqNumber;
   irqNumber = USB_FS_IRQn;
-  (void) rhport;
-  USB_OTG_FS->INT_ENB = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK |
-    USB_INTEN_SLEEPEN_MASK | USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK;
+  (void)rhport;
+  USB_OTG_FS->INT_ENB = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | USB_INTEN_SLEEPEN_MASK |
+                        USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK;
   NVIC_SetPriority((IRQn_Type)irqNumber, USB_DEVICE_INTERRUPT_PRIORITY);
   NVIC_EnableIRQ(USB_FS_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
+void dcd_int_disable(uint8_t rhport) {
+  (void)rhport;
   NVIC_DisableIRQ(USB_FS_IRQn);
   USB_OTG_FS->INT_ENB = 0;
 }
 
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
-{
-  (void) rhport;
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
+  (void)rhport;
   _dcd.addr = dev_addr & 0x7F;
   /* Response with status first before changing device address */
   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0, false);
@@ -296,31 +282,29 @@ extern u32 SystemCoreClock;
 #pragma GCC diagnostic pop
 #endif
 
-void dcd_remote_wakeup(uint8_t rhport)
-{
-  (void) rhport;
+void dcd_remote_wakeup(uint8_t rhport) {
+  (void)rhport;
   unsigned cnt = SystemCoreClock / 100;
   USB_OTG_FS->CTL |= USB_CTL_RESUME_MASK;
-  while (cnt--) __NOP();
+  while (cnt--) {
+    __NOP();
+  }
   USB_OTG_FS->CTL &= ~USB_CTL_RESUME_MASK;
 }
 
-void dcd_connect(uint8_t rhport)
-{
-  (void) rhport;
-  USB_OTG_FS->CTL     |= USB_CTL_USBENSOFEN_MASK;
+void dcd_connect(uint8_t rhport) {
+  (void)rhport;
+  USB_OTG_FS->CTL |= USB_CTL_USBENSOFEN_MASK;
 }
 
-void dcd_disconnect(uint8_t rhport)
-{
-  (void) rhport;
-  USB_OTG_FS->CTL      = 0;
+void dcd_disconnect(uint8_t rhport) {
+  (void)rhport;
+  USB_OTG_FS->CTL = 0;
 }
 
-void dcd_sof_enable(uint8_t rhport, bool en)
-{
-  (void) rhport;
-  (void) en;
+void dcd_sof_enable(uint8_t rhport, bool en) {
+  (void)rhport;
+  (void)en;
 
   // TODO implement later
 }
@@ -328,24 +312,23 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  (void)rhport;
 
-  const unsigned ep_addr  = ep_desc->bEndpointAddress;
-  const unsigned epn      = ep_addr & 0xFu;
-  const unsigned dir      = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
-  const unsigned xfer     = ep_desc->bmAttributes.xfer;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  const unsigned odd      = ep->odd;
-  buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0];
+  const unsigned       ep_addr = ep_desc->bEndpointAddress;
+  const unsigned       epn     = ep_addr & 0xFu;
+  const unsigned       dir     = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+  const unsigned       xfer    = ep_desc->bmAttributes.xfer;
+  endpoint_state_t    *ep      = &_dcd.endpoint[epn][dir];
+  const unsigned       odd     = ep->odd;
+  buffer_descriptor_t *bd      = &_dcd.bdt[epn][dir][0];
 
   /* No support for control transfer */
   TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
 
   ep->max_packet_size = tu_edpt_packet_size(ep_desc);
-  unsigned val = USB_ENDPT_EPCTLDIS_MASK;
-  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  unsigned val        = USB_ENDPT_EPCTLDIS_MASK;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   USB_OTG_FS->EP_CTL[epn] |= val;
 
@@ -359,21 +342,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
-void dcd_edpt_close_all (uint8_t rhport)
-{
-  (void) rhport;
+void dcd_edpt_close_all(uint8_t rhport) {
+  (void)rhport;
   // TODO implement dcd_edpt_close_all()
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void)rhport;
 
-  const unsigned epn      = ep_addr & 0xFu;
-  const unsigned dir      = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][0];
-  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
+  const unsigned       epn = ep_addr & 0xFu;
+  const unsigned       dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  buffer_descriptor_t *bd  = &_dcd.bdt[epn][dir][0];
+  const unsigned       msk = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   USB_OTG_FS->EP_CTL[epn] &= ~msk;
   ep->max_packet_size = 0;
   ep->length          = 0;
@@ -381,15 +362,29 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   bd->head            = 0;
 }
 
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
-{
+  #if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+  #endif
+
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t  *buffer, uint16_t total_bytes, bool is_isr) {
   (void) is_isr;
-  (void) rhport;
+  (void)rhport;
   NVIC_DisableIRQ(USB_FS_IRQn);
-  const unsigned epn = ep_addr & 0xFu;
-  const unsigned dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
-  endpoint_state_t    *ep = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd];
+  const unsigned       epn = ep_addr & 0xFu;
+  const unsigned       dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  buffer_descriptor_t *bd  = &_dcd.bdt[epn][dir][ep->odd];
 
   if (bd->own) {
     TU_LOG1("DCD XFER fail %x %d %lx %lx\r\n", ep_addr, total_bytes, ep->state, bd->head);
@@ -400,42 +395,40 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
 
   const unsigned mps = ep->max_packet_size;
   if (total_bytes > mps) {
-    buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1;
+    buffer_descriptor_t *next = ep->odd ? bd - 1 : bd + 1;
     /* When total_bytes is greater than the max packet size,
      * it prepares to the next transfer to avoid NAK in advance. */
-    next->bc   = total_bytes >= 2 * mps ? mps: total_bytes - mps;
+    next->bc   = total_bytes >= 2 * mps ? mps : total_bytes - mps;
     next->addr = buffer + mps;
     next->own  = 1;
   }
-  bd->bc        = total_bytes >= mps ? mps: total_bytes;
-  bd->addr      = buffer;
+  bd->bc   = total_bytes >= mps ? mps : total_bytes;
+  bd->addr = buffer;
   __DSB();
-  bd->own  = 1; /* the own bit must set after addr */
+  bd->own = 1; /* the own bit must set after addr */
   NVIC_EnableIRQ(USB_FS_IRQn);
   return true;
 }
 
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
+  (void)rhport;
   const unsigned epn = ep_addr & 0xFu;
   if (0 == epn) {
-    USB_OTG_FS->EP_CTL[epn] |=  USB_ENDPT_EPSTALL_MASK;
+    USB_OTG_FS->EP_CTL[epn] |= USB_ENDPT_EPSTALL_MASK;
   } else {
-    const unsigned dir      = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
-    buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
-    bd[0].bdt_stall = 1;
-    bd[1].bdt_stall = 1;
+    const unsigned       dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+    buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
+    bd[0].bdt_stall          = 1;
+    bd[1].bdt_stall          = 1;
   }
 }
 
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
-  const unsigned epn      = ep_addr & 0xFu;
-  const unsigned dir      = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
-  const unsigned odd      = _dcd.endpoint[epn][dir].odd;
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
+  (void)rhport;
+  const unsigned       epn = ep_addr & 0xFu;
+  const unsigned       dir = (ep_addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+  const unsigned       odd = _dcd.endpoint[epn][dir].odd;
+  buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
 
   bd[odd ^ 1].own       = 0;
   bd[odd ^ 1].data      = 1;
@@ -448,19 +441,18 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 //--------------------------------------------------------------------+
 // ISR
 //--------------------------------------------------------------------+
-void dcd_int_handler(uint8_t rhport)
-{
-  (void) rhport;
+void dcd_int_handler(uint8_t rhport) {
+  (void)rhport;
 
-  uint32_t is  = USB_OTG_FS->INT_STAT;
-  uint32_t msk = USB_OTG_FS->INT_ENB;
+  uint32_t is          = USB_OTG_FS->INT_STAT;
+  uint32_t msk         = USB_OTG_FS->INT_ENB;
   USB_OTG_FS->INT_STAT = is & ~msk;
   is &= msk;
   if (is & USB_ISTAT_ERROR_MASK) {
     /* TODO: */
-    uint32_t es = USB_OTG_FS->ERR_STAT;
+    uint32_t es          = USB_OTG_FS->ERR_STAT;
     USB_OTG_FS->ERR_STAT = es;
-    USB_OTG_FS->INT_STAT   = is; /* discard any pending events */
+    USB_OTG_FS->INT_STAT = is; /* discard any pending events */
     return;
   }
 
@@ -494,5 +486,4 @@ void dcd_int_handler(uint8_t rhport)
     return;
   }
 }
-
 #endif
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 89dff4995..82b6db5fd 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -426,9 +426,24 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
   __DSB();
 }
 
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr) {
-  (void) is_isr;
+#if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+#endif
+
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes, bool is_isr) {
   (void) rhport;
+  (void) is_isr;
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir = tu_edpt_dir(ep_addr);
@@ -1063,5 +1078,4 @@ void tusb_hal_nrf_power_event(uint32_t event) {
       break;
   }
 }
-
 #endif
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index 8941ca766..ad27b8528 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -355,24 +355,21 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
+static bool edpt_open(uint8_t rhport, uint8_t ep_addr, uint16_t max_packet_size, tusb_xfer_type_t xfer) {
+  (void)rhport;
 
-  const unsigned ep_addr  = ep_desc->bEndpointAddress;
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  const unsigned xfer     = ep_desc->bmAttributes.xfer;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  const unsigned odd      = ep->odd;
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+  const unsigned       epn = tu_edpt_number(ep_addr);
+  const unsigned       dir = tu_edpt_dir(ep_addr);
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  const unsigned       odd = ep->odd;
+  buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
 
   /* No support for control transfer */
   TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
 
-  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
-  unsigned val = USB_ENDPT_EPCTLDIS_MASK;
-  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  ep->max_packet_size = max_packet_size;
+  unsigned val        = USB_ENDPT_EPCTLDIS_MASK;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   KHCI->ENDPOINT[epn].ENDPT |= val;
 
@@ -386,6 +383,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  return edpt_open(rhport, ep_desc->bEndpointAddress, tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer);
+}
+
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  return edpt_open(rhport, ep_addr, largest_packet_size, TUSB_XFER_ISOCHRONOUS);
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  const unsigned    epn = tu_edpt_number(ep_desc->bEndpointAddress);
+  const unsigned    dir = tu_edpt_dir(ep_desc->bEndpointAddress);
+  endpoint_state_t *ep  = &_dcd.endpoint[epn][dir];
+
+  dcd_int_disable(rhport);
+  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  dcd_int_enable(rhport);
+
+  return true;
+}
+
 void dcd_edpt_close_all(uint8_t rhport)
 {
   (void) rhport;
@@ -408,30 +425,10 @@ void dcd_edpt_close_all(uint8_t rhport)
   }
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
-
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
-  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
-  const unsigned ie       = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
-  KHCI->ENDPOINT[epn].ENDPT &= ~msk;
-  ep->max_packet_size = 0;
-  ep->length          = 0;
-  ep->remaining       = 0;
-  bd[0].head          = 0;
-  bd[1].head          = 0;
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
-}
-
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
-  (void) is_isr;
   (void) rhport;
+  (void) is_isr;
   const unsigned epn      = tu_edpt_number(ep_addr);
   const unsigned dir      = tu_edpt_dir(ep_addr);
   endpoint_state_t    *ep = &_dcd.endpoint[epn][dir];
@@ -578,5 +575,4 @@ void dcd_int_handler(uint8_t rhport)
     process_tokdne(rhport);
   }
 }
-
 #endif
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index 364cf8de4..349229c8d 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -337,9 +337,17 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport; (void) ep_addr;
-  // TODO implement dcd_edpt_close()
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
 void dcd_edpt_close_all (uint8_t rhport)
@@ -601,5 +609,4 @@ void dcd_int_handler(uint8_t rhport)
     TU_BREAKPOINT();
   }
 }
-
 #endif
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 143b0277c..5f4a441dc 100644
--- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -432,6 +432,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
 }
 
+#if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+#endif
+
 static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) {
   uint16_t nbytes;
   ep_cmd_sts_t* ep_cs = get_ep_cs(ep_id);
@@ -632,5 +647,4 @@ void dcd_int_handler(uint8_t rhport)
   // Endpoint transfer complete interrupt
   process_xfer_isr(rhport, int_status);
 }
-
 #endif
diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
index 5e3dd7faf..78df2b6a6 100644
--- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
@@ -113,6 +113,19 @@ void dcd_edpt_close_all (uint8_t rhport)
   (void) rhport;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
@@ -208,5 +221,4 @@ void __no_inline_not_in_flash_func(pio_usb_device_irq_handler)(uint8_t root_id)
   // clear all
   rport->ints &= ~ints;
 }
-
 #endif
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 6ac1c5ee4..7caf5d68a 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -859,6 +859,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   _dcd.ep[dir][epn] = 0;
 }
 
+#if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+#endif
+
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
   (void) is_isr;
@@ -1030,5 +1045,4 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
 }
-
 #endif
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index 46d05e3e6..d43ea1dc3 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -1082,6 +1082,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   musb_int_unmask();
 }
 
+  #if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+  #endif
+
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr)
 {
@@ -1212,5 +1227,4 @@ void dcd_int_handler(uint8_t rhport)
     rxis &= ~TU_BIT(num);
   }
 }
-
 #endif
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 22a25fe40..e99cd29c6 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -51,6 +51,7 @@ typedef struct {
   uint16_t total_len;
   uint16_t max_size;
   uint8_t interval;
+  uint8_t iso_retry; // ISO retry counter
 } xfer_ctl_t;
 
 // This variable is modified from ISR context, so it must be protected by critical section
@@ -261,7 +262,13 @@ static void edpt_activate(uint8_t rhport, const tusb_desc_endpoint_t* p_endpoint
 
   xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, dir);
   xfer->max_size = tu_edpt_packet_size(p_endpoint_desc);
-  xfer->interval = p_endpoint_desc->bInterval;
+
+  const dwc2_dsts_t dsts = {.value = dwc2->dsts};
+  if (dsts.enum_speed == DCFG_SPEED_HIGH) {
+    xfer->interval = 1 << (p_endpoint_desc->bInterval - 1);
+  } else {
+    xfer->interval =  p_endpoint_desc->bInterval;
+  }
 
   // Endpoint control
   dwc2_depctl_t depctl = {.value = 0};
@@ -332,6 +339,40 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
   }
 }
 
+static uint16_t epin_write_tx_fifo(uint8_t rhport, uint8_t epnum) {
+  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+  dwc2_dep_t* const epin = &dwc2->ep[0][epnum];
+  xfer_ctl_t* const xfer = XFER_CTL_BASE(epnum, TUSB_DIR_IN);
+
+  dwc2_ep_tsize_t tsiz = {.value = epin->tsiz};
+  const uint16_t remain_packets = tsiz.packet_count;
+
+  uint16_t total_bytes_written = 0;
+  // Process every single packet (only whole packets can be written to fifo)
+  for (uint16_t i = 0; i < remain_packets; i++) {
+    tsiz.value = epin->tsiz;
+    const uint16_t remain_bytes = (uint16_t) tsiz.xfer_size;
+    const uint16_t xact_bytes = tu_min16(remain_bytes, xfer->max_size);
+
+    // Check if dtxfsts has enough space available
+    if (xact_bytes > ((epin->dtxfsts & DTXFSTS_INEPTFSAV_Msk) << 2)) {
+      break;
+    }
+
+    // Push packet to Tx-FIFO
+    if (xfer->ff) {
+      volatile uint32_t* tx_fifo = dwc2->fifo[epnum];
+      tu_fifo_read_n_const_addr_full_words(xfer->ff, (void*)(uintptr_t)tx_fifo, xact_bytes);
+      total_bytes_written += xact_bytes;
+    } else {
+      dfifo_write_packet(dwc2, epnum, xfer->buffer, xact_bytes);
+      xfer->buffer += xact_bytes;
+      total_bytes_written += xact_bytes;
+    }
+  }
+  return total_bytes_written;
+}
+
 // Since this function returns void, it is not possible to return a boolean success message
 // We must make sure that this function is not called when the EP is disabled
 // Must be called from critical section
@@ -345,7 +386,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
 
   // EP0 is limited to one packet per xfer
   if (epnum == 0) {
-    total_bytes = tu_min16(_dcd_data.ep0_pending[dir], xfer->max_size);
+    total_bytes = tu_min16(_dcd_data.ep0_pending[dir], CFG_TUD_ENDPOINT0_SIZE);
     _dcd_data.ep0_pending[dir] -= total_bytes;
     num_packets = 1;
   } else {
@@ -366,7 +407,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
   dwc2_depctl_t depctl = {.value = dep->ctl};
   depctl.clear_nak = 1;
   depctl.enable = 1;
-  if (depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS && xfer->interval == 1) {
+  if (depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS) {
     const dwc2_dsts_t dsts = {.value = dwc2->dsts};
     const uint32_t odd_now = dsts.frame_number & 1u;
     if (odd_now != 0) {
@@ -383,12 +424,21 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
     }
     dep->diepdma = (uintptr_t) xfer->buffer;
     dep->diepctl = depctl.value; // enable endpoint
+    // Advance buffer pointer for EP0
+    if (epnum == 0) {
+      xfer->buffer += total_bytes;
+    }
   } else {
     dep->diepctl = depctl.value; // enable endpoint
 
-    // Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
     if (dir == TUSB_DIR_IN && total_bytes != 0) {
-      dwc2->diepempmsk |= (1u << epnum); //-V629
+      const uint16_t xferred_bytes = epin_write_tx_fifo(rhport, epnum);
+
+      // Enable TXFE interrupt if there are still data to be sent
+      // EP0 only sends one packet at a time, so no need to check for EP0
+      if ((epnum != 0) && (xfer->total_len - xferred_bytes > 0)) {
+         dwc2->diepempmsk |= (1u << epnum);
+      }
     }
   }
 }
@@ -601,6 +651,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
     xfer->buffer = buffer;
     xfer->ff = NULL;
     xfer->total_len = total_bytes;
+    xfer->iso_retry = xfer->interval; // Reset ISO retry counter to interval value
 
     // EP0 can only handle one packet
     if (epnum == 0) {
@@ -639,6 +690,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t
     xfer->buffer = NULL;
     xfer->ff = ff;
     xfer->total_len = total_bytes;
+    xfer->iso_retry = xfer->interval; // Reset ISO retry counter to interval value
 
     // Schedule packets to be sent within interrupt
     // TODO xfer fifo may only available for slave mode
@@ -741,7 +793,7 @@ static void handle_bus_reset(uint8_t rhport) {
     dwc2->epout[0].doeptsiz |= (3 << DOEPTSIZ_STUPCNT_Pos);
   }
 
-  dwc2->gintmsk |= GINTMSK_OEPINT | GINTMSK_IEPINT;
+  dwc2->gintmsk |= GINTMSK_OEPINT | GINTMSK_IEPINT | GINTMSK_IISOIXFRM;
 }
 
 static void handle_enum_done(uint8_t rhport) {
@@ -838,11 +890,9 @@ static void handle_rxflvl_irq(uint8_t rhport) {
         const dwc2_ep_tsize_t tsiz = {.value = epout->tsiz};
         xfer->total_len -= tsiz.xfer_size;
         if (epnum == 0) {
-          xfer->total_len -= _dcd_data.ep0_pending[TUSB_DIR_OUT];
           _dcd_data.ep0_pending[TUSB_DIR_OUT] = 0;
         }
       }
-
       break;
     }
 
@@ -902,32 +952,10 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
   // - 64 bytes or
   // - Half/Empty of TX FIFO size (configured by GAHBCFG.TXFELVL)
   if (diepint_bm.txfifo_empty && tu_bit_test(dwc2->diepempmsk, epnum)) {
-    dwc2_ep_tsize_t tsiz = {.value = epin->tsiz};
-    const uint16_t remain_packets = tsiz.packet_count;
-
-    // Process every single packet (only whole packets can be written to fifo)
-    for (uint16_t i = 0; i < remain_packets; i++) {
-      tsiz.value = epin->tsiz;
-      const uint16_t remain_bytes = (uint16_t) tsiz.xfer_size;
-      const uint16_t xact_bytes = tu_min16(remain_bytes, xfer->max_size);
-
-      // Check if dtxfsts has enough space available
-      if (xact_bytes > ((epin->dtxfsts & DTXFSTS_INEPTFSAV_Msk) << 2)) {
-        break;
-      }
-
-      // Push packet to Tx-FIFO
-      if (xfer->ff != NULL) {
-        volatile uint32_t* tx_fifo = dwc2->fifo[epnum];
-        tu_fifo_read_n_const_addr_full_words(xfer->ff, (void*)(uintptr_t)tx_fifo, xact_bytes);
-      } else {
-        dfifo_write_packet(dwc2, epnum, xfer->buffer, xact_bytes);
-        xfer->buffer += xact_bytes;
-      }
-    }
+    epin_write_tx_fifo(rhport, epnum);
 
     // Turn off TXFE if all bytes are written.
-    tsiz.value = epin->tsiz;
+    dwc2_ep_tsize_t tsiz = {.value = epin->tsiz};
     if (tsiz.xfer_size == 0) {
       dwc2->diepempmsk &= ~(1u << epnum);
     }
@@ -1040,6 +1068,43 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
   }
 }
 
+static void handle_incomplete_iso_in(uint8_t rhport) {
+  dwc2_regs_t      *dwc2    = DWC2_REG(rhport);
+  const dwc2_dsts_t dsts    = {.value = dwc2->dsts};
+  const uint32_t    odd_now = dsts.frame_number & 1u;
+
+  // Loop over all IN endpoints
+  const uint8_t ep_count = dwc2_ep_count(dwc2);
+  for (uint8_t epnum = 0; epnum < ep_count; epnum++) {
+    dwc2_dep_t   *epin   = &dwc2->epin[epnum];
+    dwc2_depctl_t depctl = {.value = epin->diepctl};
+    // Read DSTS and DIEPCTLn for all isochronous endpoints. If the current EP is enabled and the read value of
+    // DSTS.SOFFN is the targeted uframe number for this EP, then this EP has an incomplete transfer.
+    if (depctl.enable && depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS && depctl.dpid_iso_odd == odd_now) {
+      xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, TUSB_DIR_IN);
+      if (xfer->iso_retry > 0) {
+        xfer->iso_retry--;
+        // Restart ISO transfe: re-write TSIZ and CTL
+        dwc2_ep_tsize_t deptsiz = {.value = 0};
+        deptsiz.xfer_size       = xfer->total_len;
+        deptsiz.packet_count    = tu_div_ceil(xfer->total_len, xfer->max_size);
+        epin->tsiz              = deptsiz.value;
+
+        if (odd_now) {
+          depctl.set_data0_iso_even = 1;
+        } else {
+          depctl.set_data1_iso_odd = 1;
+        }
+        epin->diepctl = depctl.value;
+      } else {
+        // too many retries, give up
+        edpt_disable(rhport, epnum | TUSB_DIR_IN_MASK, false);
+        dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, 0, XFER_RESULT_FAILED, true);
+      }
+    }
+  }
+}
+
 /* Interrupt Hierarchy
                  DIEPINT  DIEPINT
                     \       /
@@ -1139,6 +1204,12 @@ void dcd_int_handler(uint8_t rhport) {
     // IEPINT bit read-only, clear using DIEPINTn
     handle_ep_irq(rhport, TUSB_DIR_IN);
   }
+
+  // Incomplete isochronous IN transfer interrupt handling.
+  if (gintsts & GINTSTS_IISOIXFR) {
+    dwc2->gintsts = GINTSTS_IISOIXFR;
+    handle_incomplete_iso_in(rhport);
+  }
 }
 
 #if CFG_TUD_TEST_MODE
diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h
index dc204f578..428304ba9 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.h
+++ b/src/portable/synopsys/dwc2/dwc2_common.h
@@ -94,13 +94,13 @@ void dwc2_core_handle_common_irq(uint8_t rhport, bool in_isr);
 TU_ATTR_ALWAYS_INLINE static inline void dfifo_flush_tx(dwc2_regs_t* dwc2, uint8_t fnum) {
   // flush TX fifo and wait for it cleared
   dwc2->grstctl = GRSTCTL_TXFFLSH | (fnum << GRSTCTL_TXFNUM_Pos);
-  while (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk) {}
+  while (0 != (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk)) {}
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void dfifo_flush_rx(dwc2_regs_t* dwc2) {
   // flush RX fifo and wait for it cleared
   dwc2->grstctl = GRSTCTL_RXFFLSH;
-  while (dwc2->grstctl & GRSTCTL_RXFFLSH_Msk) {}
+  while (0 != (dwc2->grstctl & GRSTCTL_RXFFLSH_Msk)) {}
 }
 
 void dfifo_read_packet(dwc2_regs_t* dwc2, uint8_t* dst, uint16_t len);
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index adcc579e3..7693ce02a 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -92,6 +92,16 @@ enum {
 };
 
 enum {
+  GUSBCFG_PHYSEL_HIGHSPEED = 0,
+  GUSBCFG_PHYSEL_FULLSPEED = 1,
+};
+
+enum {
+  GUSBCFG_PHYHS_UTMI = 0,
+  GUSBCFG_PHYHS_ULPI = 1,
+};
+
+enum {
   GHWCFG2_OPMODE_HNP_SRP         = 0,
   GHWCFG2_OPMODE_SRP             = 1,
   GHWCFG2_OPMODE_NON_HNP_NON_SRP = 2,
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index e4ab16d9d..b92448685 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -32,19 +32,19 @@
 #error DWC2 require either CFG_TUH_DWC2_SLAVE_ENABLE or CFG_TUH_DWC2_DMA_ENABLE to be enabled
 #endif
 
-// Debug level for DWC2
-#define DWC2_DEBUG    2
-
 #include "host/hcd.h"
 #include "host/usbh.h"
 #include "dwc2_common.h"
 
-// Max number of endpoints application can open, can be larger than DWC2_CHANNEL_COUNT_MAX
-#ifndef CFG_TUH_DWC2_ENDPOINT_MAX
-#define CFG_TUH_DWC2_ENDPOINT_MAX 16
-#endif
+  // Debug level for DWC2
+  #define DWC2_DEBUG 2
 
-#define DWC2_CHANNEL_COUNT_MAX    16 // absolute max channel count
+  // Max number of endpoints application can open, can be larger than DWC2_CHANNEL_COUNT_MAX
+  #ifndef CFG_TUH_DWC2_ENDPOINT_MAX
+    #define CFG_TUH_DWC2_ENDPOINT_MAX 16u
+  #endif
+
+  #define DWC2_CHANNEL_COUNT_MAX 16u // absolute max channel count
 TU_VERIFY_STATIC(CFG_TUH_DWC2_ENDPOINT_MAX <= 255, "currently only use 8-bit for index");
 
 enum {
@@ -79,7 +79,8 @@ typedef struct {
     uint32_t speed           : 2;
     uint32_t next_pid        : 2; // PID for next transfer
     uint32_t next_do_ping    : 1; // Do PING for next transfer if possible (highspeed OUT)
-    // uint32_t : 9;
+    uint32_t closing         : 1; // endpoint is closing
+    // uint32_t : 8;
   };
 
   uint32_t uframe_countdown; // micro-frame count down to transfer for periodic, only need 18-bit
@@ -96,6 +97,7 @@ typedef struct {
     uint8_t err_count : 3;
     uint8_t period_split_nyet_count : 3;
     uint8_t halted_nyet : 1;
+    uint8_t closing : 1; // closing channel
   };
   uint8_t result;
 
@@ -195,8 +197,21 @@ TU_ATTR_ALWAYS_INLINE static inline void channel_dealloc(dwc2_regs_t* dwc2, uint
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool channel_disable(const dwc2_regs_t* dwc2, dwc2_channel_t* channel) {
-  // disable also require request queue
-  TU_ASSERT(req_queue_avail(dwc2, channel_is_periodic(channel->hcchar)));
+  const bool is_period = channel_is_periodic(channel->hcchar);
+  if (dma_host_enabled(dwc2)) {
+    // In buffer DMA or external DMA mode:
+    // - Channel disable must not be programmed for non-split periodic channels. At the end of the next uframe/frame (in
+    //   the worst case), the controller generates a channel halted and disables the channel automatically.
+    // - For split enabled channels (both non-periodic and periodic), channel disable must not be programmed randomly.
+    //   However, channel disable can be programmed for specific scenarios such as NAK and FrmOvrn.
+    if (is_period && (channel->hcsplt & HCSPLT_SPLITEN)) {
+      return true;
+    }
+  } else {
+    while (0 == req_queue_avail(dwc2, is_period)) {
+      // blocking wait for request queue available
+    }
+  }
   channel->hcintmsk |= HCINT_HALTED;
   channel->hcchar |= HCCHAR_CHDIS | HCCHAR_CHENA; // must set both CHDIS and CHENA
   return true;
@@ -204,7 +219,9 @@ TU_ATTR_ALWAYS_INLINE static inline bool channel_disable(const dwc2_regs_t* dwc2
 
 // attempt to send IN token to receive data
 TU_ATTR_ALWAYS_INLINE static inline bool channel_send_in_token(const dwc2_regs_t* dwc2, dwc2_channel_t* channel) {
-  TU_ASSERT(req_queue_avail(dwc2, channel_is_periodic(channel->hcchar)));
+  while (0 == req_queue_avail(dwc2, channel_is_periodic(channel->hcchar))) {
+    // blocking wait for request queue available
+  }
   channel->hcchar |= HCCHAR_CHENA;
   return true;
 }
@@ -237,13 +254,37 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t edpt_alloc(void) {
   return TUSB_INDEX_INVALID_8;
 }
 
-// Find a endpoint that is opened previously with hcd_edpt_open()
+TU_ATTR_ALWAYS_INLINE static inline void edpt_dealloc(hcd_endpoint_t *edpt) {
+  edpt->hcchar_bm.enable = 0;
+}
+
+// close an opened endpoint
+static void edpt_close(dwc2_regs_t *dwc2, uint8_t ep_id) {
+  hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+  edpt->closing        = 1; // mark endpoint as closing
+
+  // disable active channel belong to this endpoint
+  for (uint8_t ch_id = 0; ch_id < DWC2_CHANNEL_COUNT_MAX; ch_id++) {
+    hcd_xfer_t *xfer = &_hcd_data.xfer[ch_id];
+    if (xfer->allocated && xfer->ep_id == ep_id) {
+      dwc2_channel_t *channel = &dwc2->channel[ch_id];
+      xfer->closing           = 1;
+      channel_disable(dwc2, channel);
+      return; // only 1 active channel per endpoint
+    }
+  }
+
+  edpt_dealloc(edpt); // no active channel, safe to de-alloc now
+}
+
+// Find an endpoint that is opened previously with hcd_edpt_open()
 // Note: EP0 is bidirectional
 TU_ATTR_ALWAYS_INLINE static inline uint8_t edpt_find_opened(uint8_t dev_addr, uint8_t ep_num, uint8_t ep_dir) {
   for (uint8_t i = 0; i < (uint8_t)CFG_TUH_DWC2_ENDPOINT_MAX; i++) {
-    const dwc2_channel_char_t* hcchar_bm = &_hcd_data.edpt[i].hcchar_bm;
-    if (hcchar_bm->enable && hcchar_bm->dev_addr == dev_addr &&
-        hcchar_bm->ep_num == ep_num && (ep_num == 0 || hcchar_bm->ep_dir == ep_dir)) {
+    const hcd_endpoint_t     *edpt      = &_hcd_data.edpt[i];
+    const dwc2_channel_char_t hcchar_bm = edpt->hcchar_bm;
+    if (hcchar_bm.enable && hcchar_bm.dev_addr == dev_addr && hcchar_bm.ep_num == ep_num &&
+        (ep_num == 0 || hcchar_bm.ep_dir == ep_dir)) {
       return i;
     }
   }
@@ -259,8 +300,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t cal_packet_count(uint16_t len, uint
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t cal_next_pid(uint8_t pid, uint8_t packet_count) {
-  if (packet_count & 0x01) {
-    return pid ^ 0x02; // toggle DATA0 and DATA1
+  if (packet_count & 0x01u) {
+    return pid ^ 0x02u; // toggle DATA0 and DATA1
   } else {
     return pid;
   }
@@ -456,11 +497,11 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
 
 // HCD closes all opened endpoints belong to this device
 void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
-  (void) rhport;
-  for (uint8_t i = 0; i < (uint8_t) CFG_TUH_DWC2_ENDPOINT_MAX; i++) {
-    hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
+  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+  for (uint8_t ep_id = 0; ep_id < CFG_TUH_DWC2_ENDPOINT_MAX; ep_id++) {
+    const hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
     if (edpt->hcchar_bm.enable && edpt->hcchar_bm.dev_addr == dev_addr) {
-      tu_memclr(edpt, sizeof(hcd_endpoint_t));
+      edpt_close(dwc2, ep_id);
     }
   }
 }
@@ -503,25 +544,39 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t*
 
   edpt->speed = bus_info.speed;
   edpt->next_pid = HCTSIZ_PID_DATA0;
-  if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) {
-    edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
-    if (bus_info.speed == TUSB_SPEED_FULL) {
-      edpt->uframe_interval <<= 3;
-    }
-  } else if (desc_ep->bmAttributes.xfer == TUSB_XFER_INTERRUPT) {
-    if (bus_info.speed == TUSB_SPEED_HIGH) {
+  switch (desc_ep->bmAttributes.xfer) {
+    case TUSB_XFER_ISOCHRONOUS:
       edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
-    } else {
-      edpt->uframe_interval = desc_ep->bInterval << 3;
-    }
+      if (bus_info.speed == TUSB_SPEED_FULL) {
+        edpt->uframe_interval <<= 3;
+      }
+      break;
+
+    case TUSB_XFER_INTERRUPT:
+      if (bus_info.speed == TUSB_SPEED_HIGH) {
+        edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
+      } else {
+        edpt->uframe_interval = desc_ep->bInterval << 3;
+      }
+      break;
+
+    default:
+      break;
   }
 
   return true;
 }
 
 bool hcd_edpt_close(uint8_t rhport, uint8_t daddr, uint8_t ep_addr) {
-  (void) rhport; (void) daddr; (void) ep_addr;
-  return false; // TODO not implemented yet
+  dwc2_regs_t  *dwc2   = DWC2_REG(rhport);
+  const uint8_t ep_num = tu_edpt_number(ep_addr);
+  const uint8_t ep_dir = tu_edpt_dir(ep_addr);
+  const uint8_t ep_id  = edpt_find_opened(daddr, ep_num, ep_dir);
+  TU_ASSERT(ep_id < CFG_TUH_DWC2_ENDPOINT_MAX);
+
+  edpt_close(dwc2, ep_id);
+
+  return true;
 }
 
 // clean up channel after part of transfer is done but the whole urb is not complete
@@ -590,8 +645,7 @@ static bool channel_xfer_start(dwc2_regs_t* dwc2, uint8_t ch_id) {
   channel->hcint = 0xFFFFFFFFU; // clear all channel interrupts
 
   if (dma_host_enabled(dwc2)) {
-    uint32_t hcintmsk = HCINT_HALTED;
-    channel->hcintmsk = hcintmsk;
+    channel->hcintmsk = HCINT_HALTED;
     dwc2->haintmsk |= TU_BIT(ch_id);
 
     channel->hcdma = (uint32_t) edpt->buffer;
@@ -646,7 +700,6 @@ static bool edpt_xfer_kickoff(dwc2_regs_t* dwc2, uint8_t ep_id) {
   return channel_xfer_start(dwc2, ch_id);
 }
 
-// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   const uint8_t ep_num = tu_edpt_number(ep_addr);
@@ -654,7 +707,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 
   uint8_t ep_id = edpt_find_opened(dev_addr, ep_num, ep_dir);
   TU_ASSERT(ep_id < CFG_TUH_DWC2_ENDPOINT_MAX);
-  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+  hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+  TU_VERIFY(edpt->closing == 0); // skip if endpoint is closing
 
   edpt->buffer = buffer;
   edpt->buflen = buflen;
@@ -754,7 +808,7 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
       edpt->next_pid = hctsiz.pid; // save PID
       edpt->uframe_countdown = edpt->uframe_interval - ucount;
       // enable SOF interrupt if not already enabled
-      if (!(dwc2->gintmsk & GINTMSK_SOFM)) {
+      if (0 == (dwc2->gintmsk & GINTMSK_SOFM)) {
         dwc2->gintsts = GINTSTS_SOF;
         dwc2->gintmsk |= GINTMSK_SOFM;
       }
@@ -801,7 +855,7 @@ static void handle_rxflvl_irq(uint8_t rhport) {
       TU_ASSERT(xfer->ep_id < CFG_TUH_DWC2_ENDPOINT_MAX,);
       hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
 
-      if (byte_count) {
+      if (byte_count > 0) {
         dfifo_read_packet(dwc2, edpt->buffer + xfer->xferred_bytes, byte_count);
         xfer->xferred_bytes += byte_count;
         xfer->fifo_bytes = byte_count;
@@ -837,8 +891,8 @@ static bool handle_txfifo_empty(dwc2_regs_t* dwc2, bool is_periodic) {
     dwc2_channel_t* channel = &dwc2->channel[ch_id];
     const dwc2_channel_char_t hcchar = {.value = channel->hcchar};
     // skip writing to FIFO if channel is expecting halted.
-    if (!(channel->hcintmsk & HCINT_HALTED) && (hcchar.ep_dir == TUSB_DIR_OUT)) {
-      hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+    if (0 == (channel->hcintmsk & HCINT_HALTED) && (hcchar.ep_dir == TUSB_DIR_OUT)) {
+      hcd_xfer_t *xfer = &_hcd_data.xfer[ch_id];
       TU_ASSERT(xfer->ep_id < CFG_TUH_DWC2_ENDPOINT_MAX);
       hcd_endpoint_t* edpt = &_hcd_data.edpt[xfer->ep_id];
       const dwc2_channel_tsize_t hctsiz = {.value = channel->hctsiz};
@@ -899,6 +953,8 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
     } else if (hcint & HCINT_XACT_ERR) {
       xfer->err_count++;
       channel->hcintmsk |= HCINT_ACK;
+    } else {
+      // nothing to do
     }
 
     channel_disable(dwc2, channel);
@@ -910,7 +966,7 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
     channel_disable(dwc2, channel);
   } else if (hcint & HCINT_NAK) {
     // NAK received, disable channel to flush all posted request and try again
-    if (hcsplt.split_en) {
+    if (hcsplt.split_en == 1u) {
       hcsplt.split_compl = 0; // restart with start-split
       channel->hcsplt = hcsplt.value;
     }
@@ -919,8 +975,8 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
   } else if (hcint & HCINT_ACK) {
     xfer->err_count = 0;
 
-    if (hcsplt.split_en) {
-      if (!hcsplt.split_compl) {
+    if (hcsplt.split_en == 1u) {
+      if (hcsplt.split_compl == 0) {
         // start split is ACK --> do complete split
         channel->hcintmsk |= HCINT_NYET;
         hcsplt.split_compl = 1;
@@ -932,7 +988,7 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
     } else {
       // ACK with data
       const uint16_t remain_packets = hctsiz.packet_count;
-      if (remain_packets) {
+      if (remain_packets > 0) {
         // still more packet to receive, also reset to start split
         hcsplt.split_compl = 0;
         channel->hcsplt = hcsplt.value;
@@ -945,6 +1001,8 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
       is_done = true;
     } else if (xfer->err_count == HCD_XFER_ERROR_MAX) {
       xfer->result = XFER_RESULT_FAILED;
+      is_done      = true;
+    } else if (xfer->closing == 1) {
       is_done = true;
     } else {
       // got here due to NAK or NYET
@@ -953,6 +1011,8 @@ static bool handle_channel_in_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t h
   } else if (hcint & HCINT_DATATOGGLE_ERR) {
     xfer->err_count = 0;
     TU_ASSERT(false);
+  } else {
+    // nothing to do
   }
   return is_done;
 }
@@ -977,7 +1037,7 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
     channel_disable(dwc2, channel);
   } else if (hcint & HCINT_NYET) {
     xfer->err_count = 0;
-    if (hcsplt.split_en) {
+    if (hcsplt.split_en == 1u) {
       // retry complete split
       hcsplt.split_compl = 1;
       channel->hcsplt = hcsplt.value;
@@ -1005,6 +1065,8 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
       is_done = true;
     } else if (xfer->err_count == HCD_XFER_ERROR_MAX) {
       xfer->result = XFER_RESULT_FAILED;
+      is_done      = true;
+    } else if (xfer->closing == 1) {
       is_done = true;
     } else {
       // Got here due to NAK or NYET
@@ -1013,8 +1075,8 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
   } else if (hcint & HCINT_ACK) {
     xfer->err_count = 0;
     channel->hcintmsk &= ~HCINT_ACK;
-    if (hcsplt.split_en) {
-      if (!hcsplt.split_compl) {
+    if (hcsplt.split_en == 1u) {
+      if (hcsplt.split_compl == 0) {
         // ACK for start split --> do complete split
         hcsplt.split_compl = 1;
         channel->hcsplt = hcsplt.value;
@@ -1026,6 +1088,8 @@ static bool handle_channel_out_slave(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t
       channel->hctsiz &= ~HCTSIZ_DOPING; // HC already cleared PING bit, but we clear anyway
       channel->hcchar |= HCCHAR_CHENA;
     }
+  } else {
+    // nothing to do
   }
 
   if (is_done) {
@@ -1122,6 +1186,10 @@ static bool handle_channel_in_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
       // retry start-split in next binterval
       channel_xfer_in_retry(dwc2, ch_id, hcint);
     }
+
+    if (xfer->closing == 1) {
+      is_done = true;
+    }
   }
 
   return is_done;
@@ -1182,6 +1250,10 @@ static bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hc
         channel->hcchar |= HCCHAR_CHENA;
       }
     }
+
+    if (xfer->closing == 1) {
+      is_done = true;
+    }
   } else if (hcint & HCINT_ACK) {
     xfer->err_count = 0;
     channel->hcintmsk &= ~HCINT_ACK;
@@ -1226,12 +1298,17 @@ static void handle_channel_irq(uint8_t rhport, bool in_isr) {
         } else {
           is_done = handle_channel_in_slave(dwc2, ch_id, hcint);
         }
-        #endif
+  #endif
       }
 
       if (is_done) {
-        const uint8_t ep_addr = tu_edpt_addr(hcchar.ep_num, hcchar.ep_dir);
-        hcd_event_xfer_complete(hcchar.dev_addr, ep_addr, xfer->xferred_bytes, (xfer_result_t)xfer->result, in_isr);
+        if (xfer->closing == 1) {
+          hcd_endpoint_t *edpt = &_hcd_data.edpt[xfer->ep_id];
+          edpt_dealloc(edpt);
+        } else {
+          const uint8_t ep_addr = tu_edpt_addr(hcchar.ep_num, hcchar.ep_dir);
+          hcd_event_xfer_complete(hcchar.dev_addr, ep_addr, xfer->xferred_bytes, (xfer_result_t)xfer->result, in_isr);
+        }
         channel_dealloc(dwc2, ch_id);
       }
     }
@@ -1250,16 +1327,18 @@ static bool handle_sof_irq(uint8_t rhport, bool in_isr) {
   const uint32_t ucount = (hprt_speed_get(dwc2) == TUSB_SPEED_HIGH ? 1 : 8);
 
   for(uint8_t ep_id = 0; ep_id < CFG_TUH_DWC2_ENDPOINT_MAX; ep_id++) {
-    hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
-    if (edpt->hcchar_bm.enable && channel_is_periodic(edpt->hcchar) && edpt->uframe_countdown > 0) {
-      edpt->uframe_countdown -= tu_min32(ucount, edpt->uframe_countdown);
-      if (edpt->uframe_countdown == 0) {
-        if (!edpt_xfer_kickoff(dwc2, ep_id)) {
-          edpt->uframe_countdown = ucount; // failed to start, try again next frame
+    hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+    if (edpt->closing == 0) {
+      if (edpt->hcchar_bm.enable && channel_is_periodic(edpt->hcchar) && edpt->uframe_countdown > 0) {
+        edpt->uframe_countdown -= tu_min32(ucount, edpt->uframe_countdown);
+        if (edpt->uframe_countdown == 0) {
+          if (!edpt_xfer_kickoff(dwc2, ep_id)) {
+            edpt->uframe_countdown = ucount; // failed to start, try again next frame
+          }
         }
-      }
 
-      more_isr = true;
+        more_isr = true;
+      }
     }
   }
 
@@ -1271,9 +1350,9 @@ static void port0_enable(dwc2_regs_t* dwc2, tusb_speed_t speed) {
   uint32_t hcfg = dwc2->hcfg & ~HCFG_FSLS_PHYCLK_SEL;
 
   const dwc2_gusbcfg_t gusbcfg = {.value = dwc2->gusbcfg};
-  uint32_t phy_clock;
+  uint32_t             phy_clock;
 
-  if (gusbcfg.phy_sel) {
+  if (gusbcfg.phy_sel == GUSBCFG_PHYSEL_FULLSPEED) {
     phy_clock = 48; // dedicated FS is 48Mhz
     if (speed == TUSB_SPEED_LOW) {
       hcfg |= HCFG_FSLS_PHYCLK_SEL_6MHZ;
@@ -1281,7 +1360,7 @@ static void port0_enable(dwc2_regs_t* dwc2, tusb_speed_t speed) {
       hcfg |= HCFG_FSLS_PHYCLK_SEL_48MHZ;
     }
   } else {
-    if (gusbcfg.ulpi_utmi_sel) {
+    if (gusbcfg.ulpi_utmi_sel == GUSBCFG_PHYHS_ULPI) {
       phy_clock = 60; // ULPI 8-bit is 60Mhz
     } else {
       // UTMI+ 16-bit is 30Mhz, 8-bit is 60Mhz
@@ -1320,20 +1399,20 @@ static void handle_hprt_irq(uint8_t rhport, bool in_isr) {
   const dwc2_hprt_t hprt_bm = {.value = dwc2->hprt};
   uint32_t hprt = hprt_bm.value & ~HPRT_W1_MASK;
 
-  if (hprt_bm.conn_detected) {
+  if (hprt_bm.conn_detected == 1u) {
     // Port Connect Detect
     hprt |= HPRT_CONN_DETECT;
 
-    if (hprt_bm.conn_status) {
+    if (hprt_bm.conn_status == 1u) {
       hcd_event_device_attach(rhport, in_isr);
     }
   }
 
-  if (hprt_bm.enable_change) {
+  if (hprt_bm.enable_change == 1u) {
     // Port enable change
     hprt |= HPRT_ENABLE_CHANGE;
 
-    if (hprt_bm.enable) {
+    if (hprt_bm.enable == 1u) {
       // Port enable
       const tusb_speed_t speed = hprt_speed_get(dwc2);
       port0_enable(dwc2, speed);
@@ -1392,7 +1471,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
     // Device disconnected
     dwc2->gintsts = GINTSTS_DISCINT;
 
-    if (!(dwc2->hprt & HPRT_CONN_STATUS)) {
+    if (0 == (dwc2->hprt & HPRT_CONN_STATUS)) {
       hcd_event_device_remove(rhport, in_isr);
     }
   }
diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
index 10c7d78c5..5f4b139d8 100644
--- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
+++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
@@ -333,11 +333,20 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   return true;
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport; (void) ep_addr;
-  // TODO implement dcd_edpt_close()
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
 }
 
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
+}
+
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
@@ -823,5 +832,4 @@ void dcd_int_handler(uint8_t rhport)
   }
 
 }
-
 #endif
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.c b/src/portable/valentyusb/eptri/dcd_eptri.c
index 760f3c90a..1b555b3b7 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.c
+++ b/src/portable/valentyusb/eptri/dcd_eptri.c
@@ -438,9 +438,17 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport; (void) ep_addr;
-  // TODO implement dcd_edpt_close()
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void)rhport;
+  (void)ep_addr;
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
 void dcd_edpt_close_all (uint8_t rhport)
@@ -660,5 +668,4 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
 }
-
 #endif
diff --git a/src/portable/wch/dcd_ch32_usbfs.c b/src/portable/wch/dcd_ch32_usbfs.c
index eb2ebd868..5cd25e33e 100644
--- a/src/portable/wch/dcd_ch32_usbfs.c
+++ b/src/portable/wch/dcd_ch32_usbfs.c
@@ -283,10 +283,17 @@ void dcd_edpt_close_all(uint8_t rhport) {
   // TODO optional
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void) rhport;
   (void) ep_addr;
-  // TODO optional
+  (void)largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
+  (void)rhport;
+  (void)desc_ep;
+  return false;
 }
 
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr) {
@@ -345,5 +352,4 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
     }
   }
 }
-
 #endif
diff --git a/src/portable/wch/dcd_ch32_usbhs.c b/src/portable/wch/dcd_ch32_usbhs.c
index a18eb3e81..11734de37 100644
--- a/src/portable/wch/dcd_ch32_usbhs.c
+++ b/src/portable/wch/dcd_ch32_usbhs.c
@@ -27,13 +27,14 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBHS) && defined(CFG_TUD_WCH_USBIP_USBHS) && CFG_TUD_WCH_USBIP_USBHS
-#include "ch32_usbhs_reg.h"
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBHS) && defined(CFG_TUD_WCH_USBIP_USBHS) && \
+  (CFG_TUD_WCH_USBIP_USBHS == 1)
+  #include "ch32_usbhs_reg.h"
 
-#include "device/dcd.h"
+  #include "device/dcd.h"
 
-// Max number of bi-directional endpoints including EP0
-#define EP_MAX  16
+  // Max number of bi-directional endpoints including EP0
+  #define EP_MAX 16
 
 typedef struct {
   uint8_t* buffer;
@@ -288,6 +289,21 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
   }
 }
 
+  #if 0
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
+}
+  #endif
+
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   (void) rhport;
 
@@ -420,5 +436,4 @@ void dcd_int_handler(uint8_t rhport) {
     USBHSD->INT_FG = USBHS_SUSPEND_FLAG; /* Clear flag */
   }
 }
-
 #endif
diff --git a/src/tusb.c b/src/tusb.c
index 7313a2c20..3852da76b 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -354,8 +354,8 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
   return true;
 }
 
-bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) {
-  (void) s;
+bool tu_edpt_stream_deinit(tu_edpt_stream_t *s) {
+  (void)s;
   #if OSAL_MUTEX_REQUIRED
   if (s->ff.mutex_wr) {
     osal_mutex_delete(s->ff.mutex_wr);
@@ -363,7 +363,7 @@ bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) {
   if (s->ff.mutex_rd) {
     osal_mutex_delete(s->ff.mutex_rd);
   }
-#endif
+  #endif
   return true;
 }
 
@@ -412,7 +412,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool stream_release(uint8_t hwid, tu_edpt_st
 bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint32_t last_xferred_bytes) {
   // ZLP condition: no pending data, last transferred bytes is multiple of packet size
   const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
-  TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes > 0 && (0 == (last_xferred_bytes & (mps - 1))));
+  TU_VERIFY(tu_fifo_empty(&s->ff) && last_xferred_bytes > 0 && (0 == (last_xferred_bytes & (mps - 1))));
   TU_VERIFY(stream_claim(hwid, s));
   TU_ASSERT(stream_xfer(hwid, s, 0));
   return true;
@@ -424,7 +424,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
   TU_VERIFY(stream_claim(hwid, s), 0);
 
   // Pull data from FIFO -> EP buf
-  uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
+  const uint16_t count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
 
   if (count > 0) {
     TU_ASSERT(stream_xfer(hwid, s, count), 0);
@@ -437,7 +437,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
   }
 }
 
-uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buffer, uint32_t bufsize) {
+uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t *s, const void *buffer, uint32_t bufsize) {
   TU_VERIFY(bufsize > 0); // TODO support ZLP
 
   if (0 == tu_fifo_depth(&s->ff)) {
@@ -517,7 +517,7 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
 }
 
 uint32_t tu_edpt_stream_read(uint8_t hwid, tu_edpt_stream_t* s, void* buffer, uint32_t bufsize) {
-  uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t) bufsize);
+  const uint32_t num_read = tu_fifo_read_n(&s->ff, buffer, (uint16_t)bufsize);
   tu_edpt_stream_read_xfer(hwid, s);
   return num_read;
 }
diff --git a/src/tusb_option.h b/src/tusb_option.h
index b90df2724..c8265f898 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -31,7 +31,7 @@
 
 // Version is release as major.minor.revision eg 1.0.0
 #define TUSB_VERSION_MAJOR     0
-#define TUSB_VERSION_MINOR     19
+#define TUSB_VERSION_MINOR     20
 #define TUSB_VERSION_REVISION  0
 
 #define TUSB_VERSION_NUMBER    (TUSB_VERSION_MAJOR * 10000 + TUSB_VERSION_MINOR * 100 + TUSB_VERSION_REVISION)
@@ -485,6 +485,10 @@
   #define CFG_TUD_ENDPOINT0_SIZE  64
 #endif
 
+#ifndef CFG_TUD_ENDPOINT0_BUFSIZE
+  #define CFG_TUD_ENDPOINT0_BUFSIZE  CFG_TUD_ENDPOINT0_SIZE
+#endif
+
 #ifndef CFG_TUD_INTERFACE_MAX
   #define CFG_TUD_INTERFACE_MAX   16
 #endif