diff options
| author | hathach <[email protected]> | 2024-11-13 13:08:30 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-11-13 13:08:30 +0700 |
| commit | aeae2966a2afa669068e54eef7c4dd2dceffaa0d (patch) | |
| tree | ec965825374576319936bbd1c861b8e90ab6cc77 /src | |
| parent | 839ec1729252d81aa631ba7ea4653c5591f6fb6f (diff) | |
hil add stm32f723disco, add test flags for device/host/dual
Diffstat (limited to 'src')
| -rw-r--r-- | src/portable/synopsys/dwc2/hcd_dwc2.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c index f9fc5ca8e..53583426f 100644 --- a/src/portable/synopsys/dwc2/hcd_dwc2.c +++ b/src/portable/synopsys/dwc2/hcd_dwc2.c @@ -1181,8 +1181,7 @@ static bool handle_sof_irq(uint8_t rhport, bool in_isr) { } // Config HCFG FS/LS clock and HFIR for SOF interval according to link speed (value is in PHY clock unit) -static void port0_enable(dwc2_regs_t* dwc2) { - const tusb_speed_t speed = hprt_speed_get(dwc2); +static void port0_enable(dwc2_regs_t* dwc2, tusb_speed_t speed) { uint32_t hcfg = dwc2->hcfg & ~HCFG_FSLS_PHYCLK_SEL; const dwc2_gusbcfg_t gusbcfg_bm = dwc2->gusbcfg_bm; @@ -1252,7 +1251,8 @@ static void handle_hprt_irq(uint8_t rhport, bool in_isr) { if (hprt_bm.enable) { // Port enable - port0_enable(dwc2); + const tusb_speed_t speed = hprt_speed_get(dwc2); + port0_enable(dwc2, speed); } else { // TU_ASSERT(false, ); } |
