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authorhathach <[email protected]>2025-11-19 13:36:32 +0700
committerhathach <[email protected]>2025-11-19 13:36:32 +0700
commitb2dc419270d17f100ec04cd18e764fe66d298f77 (patch)
tree2e47e3be1c4717be2071ed924437313bbc089c37 /src
parent1df116adfc70bb6d86f6046b46560d5c42762c28 (diff)
rename CFG_TUD_ENDPOINT0_BUFSIZE to make it more consistent
use uint8_t for dfu state and status to reduce size
Diffstat (limited to 'src')
-rw-r--r--src/class/dfu/dfu_device.c10
-rw-r--r--src/device/usbd_control.c8
-rw-r--r--src/tusb_option.h4
3 files changed, 10 insertions, 12 deletions
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index ffe5941e8..d3cc53918 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -50,19 +50,17 @@
typedef struct {
uint8_t attrs;
uint8_t alt;
+ uint8_t state;
+ uint8_t status;
- dfu_state_t state;
- dfu_status_t status;
-
- bool flashing_in_progress;
+ bool flashing_in_progress;
uint16_t block;
uint16_t length;
} dfu_state_ctx_t;
-// Only a single dfu state is allowed
static dfu_state_ctx_t _dfu_ctx;
-CFG_TUD_MEM_ALIGN uint8_t _transfer_buf[CFG_TUD_DFU_XFER_BUFSIZE];
+TU_ATTR_ALIGNED(4) uint8_t _transfer_buf[CFG_TUD_DFU_XFER_BUFSIZE];
static void reset_state(void) {
_dfu_ctx.state = DFU_IDLE;
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 745530f69..996e7387f 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -60,7 +60,7 @@ typedef struct {
static usbd_control_xfer_t _ctrl_xfer;
CFG_TUD_MEM_SECTION static struct {
- TUD_EPBUF_DEF(buf, CFG_TUD_EP0_BUFSIZE);
+ TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_BUFSIZE);
} _ctrl_epbuf;
//--------------------------------------------------------------------+
@@ -88,13 +88,13 @@ bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) {
// Each transaction has up to Endpoint0's max packet size.
// This function can also transfer an zero-length packet
static bool data_stage_xact(uint8_t rhport) {
- const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_EP0_BUFSIZE);
+ const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_BUFSIZE);
uint8_t ep_addr = EDPT_CTRL_OUT;
if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
ep_addr = EDPT_CTRL_IN;
if (0u != xact_len) {
- TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_EP0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
+ TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
}
}
@@ -179,7 +179,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
// Data Stage is complete when all request's length are transferred or
// a short packet is sent including zero-length packet.
if ((_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) ||
- (xferred_bytes < CFG_TUD_EP0_BUFSIZE)) {
+ (xferred_bytes < CFG_TUD_ENDPOINT0_BUFSIZE)) {
// DATA stage is complete
bool is_ok = true;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 4937b2502..eed14214d 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -485,8 +485,8 @@
#define CFG_TUD_ENDPOINT0_SIZE 64
#endif
-#ifndef CFG_TUD_EP0_BUFSIZE
- #define CFG_TUD_EP0_BUFSIZE CFG_TUD_ENDPOINT0_SIZE
+#ifndef CFG_TUD_ENDPOINT0_BUFSIZE
+ #define CFG_TUD_ENDPOINT0_BUFSIZE CFG_TUD_ENDPOINT0_SIZE
#endif
#ifndef CFG_TUD_INTERFACE_MAX