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authorhathach <[email protected]>2019-11-27 14:49:19 +0700
committerhathach <[email protected]>2019-11-27 14:49:19 +0700
commitbc21714c7ee7767c0aae6d782b6b72b954dddcdf (patch)
tree13891810f2a9552d53771610f796cd132ea71e13 /src
parent302746d02cd2824eecee4e0e947122ca9fb53b9d (diff)
detect bus reset
Diffstat (limited to 'src')
-rw-r--r--src/portable/microchip/samg/dcd_samg.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index 9b9ebad7b..3eb64eb1a 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -41,10 +41,10 @@
*------------------------------------------------------------------*/
// Set up endpoint 0, clear all other endpoints
-//static void bus_reset(void)
-//{
-//
-//}
+static void bus_reset(void)
+{
+
+}
// Initialize controller to device mode
void dcd_init (uint8_t rhport)
@@ -133,9 +133,18 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
//--------------------------------------------------------------------+
void dcd_isr(uint8_t rhport)
{
- (void) rhport;
+ uint32_t const intr_mask = UDP->UDP_IMR;
+ uint32_t const intr_status = UDP->UDP_ISR & intr_mask;
+ // clear interrupt
+ UDP->UDP_ICR = intr_status;
+ // Bus reset
+ if (intr_status & UDP_ISR_ENDBUSRES)
+ {
+ bus_reset();
+ dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true);
+ }
}
#endif