Correct dedicated FIFO SRAM size to 1024

add note for up to 5 active IN endpoints (including EP0 IN)

1 files changed, 6 insertions, 2 deletions

diff --git a/src/portable/espressif/esp32s2/dcd_esp32s2.c b/src/portable/espressif/esp32s2/dcd_esp32s2.c
index 26895c204..099f3af3e 100644
--- a/src/portable/espressif/esp32s2/dcd_esp32s2.c
+++ b/src/portable/espressif/esp32s2/dcd_esp32s2.c
@@ -46,9 +46,13 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-// FIFO size in bytes TODO need confirmation from Espressif
+// Max number of bi-directional endpoints including EP0
+// Note: ESP32S2 specs say there are only up to 5 IN active endpoints include EP0
+// We should probably prohibit enabling Endpoint IN > 4 (not done yet)
 #define EP_MAX            USB_OUT_EP_NUM
-#define EP_FIFO_SIZE      1280
+
+// FIFO size in bytes
+#define EP_FIFO_SIZE      1024
 
 typedef struct {
     uint8_t *buffer;