diff options
| author | HiFiPhile <[email protected]> | 2026-02-20 13:57:34 +0100 |
|---|---|---|
| committer | HiFiPhile <[email protected]> | 2026-02-20 13:57:34 +0100 |
| commit | c5ec572396d3f5bae05d4f0baa2c026598604f48 (patch) | |
| tree | 7bca78e7a6775e57074649e45f209ce62243b612 /src | |
| parent | 7e6177097166073579418ce1ff98aa2185f48396 (diff) | |
refactor config option
Signed-off-by: HiFiPhile <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/host/usbh.h | 7 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dwc2_common.c | 9 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/dwc2_common.h | 3 | ||||
| -rw-r--r-- | src/portable/synopsys/dwc2/hcd_dwc2.c | 13 |
4 files changed, 15 insertions, 17 deletions
diff --git a/src/host/usbh.h b/src/host/usbh.h index 03577ba3f..2f332b442 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -93,10 +93,10 @@ typedef struct { // ConfigID for tuh_configure() enum { TUH_CFGID_INVALID = 0, - TUH_CFGID_PHY_SPEED = 10, // cfg_param: tusb_speed_t TUH_CFGID_RPI_PIO_USB_CONFIGURATION = 100, // cfg_param: pio_usb_configuration_t TUH_CFGID_MAX3421 = 200, TUH_CFGID_FSDEV = 300, + TUH_CFGID_DWC2 = 400 }; typedef struct { @@ -109,10 +109,15 @@ typedef struct { uint8_t max_nak; // max NAK per endpoint per frame to save CPU usage (0=unlimited) } tuh_configure_fsdev_t; +typedef struct { + bool use_hs_phy; // Always use high-speed ULPI/UTMI phy even working at full-speed +} tuh_configure_dwc2_t; + typedef union { // For TUH_CFGID_RPI_PIO_USB_CONFIGURATION use pio_usb_configuration_t tuh_configure_max3421_t max3421; tuh_configure_fsdev_t fsdev; + tuh_configure_dwc2_t dwc2; } tuh_configure_param_t; //--------------------------------------------------------------------+ diff --git a/src/portable/synopsys/dwc2/dwc2_common.c b/src/portable/synopsys/dwc2/dwc2_common.c index 8c2324283..5429af440 100644 --- a/src/portable/synopsys/dwc2/dwc2_common.c +++ b/src/portable/synopsys/dwc2/dwc2_common.c @@ -187,13 +187,8 @@ bool dwc2_core_is_highspeed_phy(dwc2_regs_t* dwc2, tusb_role_t role) { } #endif #if CFG_TUH_ENABLED - if (role == TUSB_ROLE_HOST) { - if (_hcd_cfg_phy_speed == TUSB_SPEED_HIGH) - return true; - if (_hcd_cfg_phy_speed < TUSB_SPEED_HIGH) - return false; - if (!TUH_OPT_HIGH_SPEED) - return false; + if (role == TUSB_ROLE_HOST && !TUH_OPT_HIGH_SPEED) { + return false; } #endif diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h index 16a18c673..b03fecad9 100644 --- a/src/portable/synopsys/dwc2/dwc2_common.h +++ b/src/portable/synopsys/dwc2/dwc2_common.h @@ -76,9 +76,6 @@ enum { //--------------------------------------------------------------------+ // Core/Controller //--------------------------------------------------------------------+ - -extern tusb_speed_t _hcd_cfg_phy_speed; - TU_ATTR_ALWAYS_INLINE static inline dwc2_regs_t* DWC2_REG(uint8_t rhport) { if (rhport >= DWC2_CONTROLLER_COUNT) { // user mis-configured, ignore and use first controller diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c index 9f8133196..0fbb55191 100644 --- a/src/portable/synopsys/dwc2/hcd_dwc2.c +++ b/src/portable/synopsys/dwc2/hcd_dwc2.c @@ -111,8 +111,9 @@ typedef struct { hcd_endpoint_t edpt[CFG_TUH_DWC2_ENDPOINT_MAX]; } hcd_data_t; -hcd_data_t _hcd_data; -tusb_speed_t _hcd_cfg_phy_speed = TUSB_SPEED_AUTO; +static hcd_data_t _hcd_data; + +static tuh_configure_dwc2_t _tuh_cfg = {.use_hs_phy = TUH_OPT_HIGH_SPEED}; //-------------------------------------------------------------------- // @@ -393,8 +394,8 @@ static void dfifo_host_init(uint8_t rhport) { // optional hcd configuration, called by tuh_configure() bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) { (void) rhport; - TU_VERIFY(cfg_id == TUH_CFGID_PHY_SPEED && cfg_param != NULL); - _hcd_cfg_phy_speed = *(const tusb_speed_t *)cfg_param; + TU_VERIFY(cfg_id == TUH_CFGID_DWC2 && cfg_param != NULL); + _tuh_cfg = *(const tuh_configure_dwc2_t *)cfg_param; return true; } @@ -405,7 +406,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { tu_memclr(&_hcd_data, sizeof(_hcd_data)); // Core Initialization - const bool highspeed_phy = dwc2_core_is_highspeed_phy(dwc2, TUSB_ROLE_HOST); + const bool highspeed_phy = dwc2_core_is_highspeed_phy(dwc2, TUSB_ROLE_HOST) || _tuh_cfg.use_hs_phy; const bool is_dma = dma_host_enabled(dwc2); TU_ASSERT(dwc2_core_init(rhport, highspeed_phy, is_dma)); @@ -428,7 +429,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { dwc2_stm32_gccfg_cfg(dwc2, false, true); #endif - if (highspeed_phy && rh_init->speed < TUSB_SPEED_HIGH) { + if (rh_init->speed < TUSB_SPEED_HIGH || !TUH_OPT_HIGH_SPEED) { // disable high speed mode dwc2->hcfg |= HCFG_FSLS_ONLY; } else { |
