diff options
| author | hathach <[email protected]> | 2024-04-05 20:31:55 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-04-05 20:31:55 +0700 |
| commit | c97c3418c741a26666942e184ca514f5dbdafcfa (patch) | |
| tree | a2dd5a58be1d24673a6c85dc8b2a7de613343ce3 /src | |
| parent | 757a1726e8c6eb52f959e5f42a7ae22f769c19c3 (diff) | |
minor update bsp
Diffstat (limited to 'src')
| -rw-r--r-- | src/portable/chipidea/ci_fs/ci_fs_mcx.h | 20 | ||||
| -rw-r--r-- | src/portable/chipidea/ci_fs/dcd_ci_fs.c | 2 |
2 files changed, 10 insertions, 12 deletions
diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcx.h b/src/portable/chipidea/ci_fs/ci_fs_mcx.h index 3f2b13323..4b93a03a7 100644 --- a/src/portable/chipidea/ci_fs/ci_fs_mcx.h +++ b/src/portable/chipidea/ci_fs/ci_fs_mcx.h @@ -30,29 +30,27 @@ #include "fsl_device_registers.h" #if CFG_TUSB_MCU == OPT_MCU_MCXN9 - #define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) - #define USB0_IRQN USB0_FS_IRQn + #define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) + #define CIFS_IRQN USB0_FS_IRQn #elif CFG_TUSB_MCU == OPT_MCU_MCXA15 - #define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) - #define USB0_IRQN USB0_IRQn + #define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) + #define CIFS_IRQN USB0_IRQn #else #error "MCU is not supported" #endif -#define CI_REG CI_FS_REG(0) +#define CI_REG CI_FS_REG(0) -void dcd_int_enable(uint8_t rhport) -{ +void dcd_int_enable(uint8_t rhport) { (void) rhport; - NVIC_EnableIRQ(USB0_IRQN); + NVIC_EnableIRQ(CIFS_IRQN); } -void dcd_int_disable(uint8_t rhport) -{ +void dcd_int_disable(uint8_t rhport) { (void) rhport; - NVIC_DisableIRQ(USB0_IRQN); + NVIC_DisableIRQ(CIFS_IRQN); } #endif diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c index a68ecf8c9..02f813ab5 100644 --- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -295,7 +295,7 @@ void dcd_init(uint8_t rhport) CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK; dcd_connect(rhport); - // NVIC_ClearPendingIRQ(USB0_IRQn); + // NVIC_ClearPendingIRQ(CIFS_IRQN); } void dcd_set_address(uint8_t rhport, uint8_t dev_addr) |