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authorhathach <[email protected]>2021-11-04 16:16:51 +0700
committerhathach <[email protected]>2021-11-04 16:16:51 +0700
commitf90f5ea3699facfd5681c3bf21e0500f169f8f07 (patch)
tree564b78118eb331072a31162d579f19a3119937c5 /src
parent8b3708b44f69a50817ffa9e8a5360e587f3e3fe2 (diff)
adding g4 family with g474nucleo, able to blink led and button
Diffstat (limited to 'src')
-rw-r--r--src/device/dcd_attr.h3
-rw-r--r--src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c16
-rw-r--r--src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h4
-rw-r--r--src/tusb_option.h22
4 files changed, 34 insertions, 11 deletions
diff --git a/src/device/dcd_attr.h b/src/device/dcd_attr.h
index 952a8b8c8..1d34b94ba 100644
--- a/src/device/dcd_attr.h
+++ b/src/device/dcd_attr.h
@@ -119,6 +119,9 @@
#define DCD_ATTR_ENDPOINT_MAX 9
#define DCD_ATTR_DWC2_STM32
+#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+ #define DCD_ATTR_ENDPOINT_MAX 8
+
#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
#define DCD_ATTR_ENDPOINT_MAX 8
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 933f352a2..177a7ad2a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -110,7 +110,7 @@
#endif
#if TUSB_OPT_DEVICE_ENABLED && \
- ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1) || \
+ ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32G4) || \
(TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) \
)
@@ -296,8 +296,10 @@ void dcd_int_enable (uint8_t rhport)
__ISB();
#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0
NVIC_EnableIRQ(USB_IRQn);
+
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
NVIC_EnableIRQ(USB_LP_IRQn);
+
#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
// Some STM32F302/F303 devices allow to remap the USB interrupt vectors from
// shared USB/CAN IRQs to separate CAN and USB IRQs.
@@ -320,6 +322,12 @@ void dcd_int_enable (uint8_t rhport)
NVIC_EnableIRQ(USB_HP_CAN1_TX_IRQn);
NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
NVIC_EnableIRQ(USBWakeUp_IRQn);
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
+ NVIC_EnableIRQ(USB_HP_IRQn);
+ NVIC_EnableIRQ(USB_LP_IRQn);
+ NVIC_EnableIRQ(USBWakeUp_IRQn);
+
#else
#error Unknown arch in USB driver
#endif
@@ -356,6 +364,12 @@ void dcd_int_disable(uint8_t rhport)
NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn);
NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
NVIC_DisableIRQ(USBWakeUp_IRQn);
+
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
+ NVIC_DisableIRQ(USB_HP_IRQn);
+ NVIC_DisableIRQ(USB_LP_IRQn);
+ NVIC_DisableIRQ(USBWakeUp_IRQn);
+
#else
#error Unknown arch in USB driver
#endif
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index eca8bf575..596f7be6c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -87,6 +87,10 @@
#include "stm32l1xx.h"
#define PMA_LENGTH (512u)
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
+ #include "stm32g4xx.h"
+ #define PMA_LENGTH (1024u)
+
#else
#error You are using an untested or unimplemented STM32 variant. Please update the driver.
// This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 4da07e241..c1fc8a71c 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -68,16 +68,18 @@
#define OPT_MCU_SAMX7X 207 ///< MicroChip SAME70, S70, V70, V71 family
// STM32
-#define OPT_MCU_STM32F0 300 ///< ST STM32F0
-#define OPT_MCU_STM32F1 301 ///< ST STM32F1
-#define OPT_MCU_STM32F2 302 ///< ST STM32F2
-#define OPT_MCU_STM32F3 303 ///< ST STM32F3
-#define OPT_MCU_STM32F4 304 ///< ST STM32F4
-#define OPT_MCU_STM32F7 305 ///< ST STM32F7
-#define OPT_MCU_STM32H7 306 ///< ST STM32H7
-#define OPT_MCU_STM32L0 307 ///< ST STM32L0
-#define OPT_MCU_STM32L1 308 ///< ST STM32L1
-#define OPT_MCU_STM32L4 309 ///< ST STM32L4
+#define OPT_MCU_STM32F0 300 ///< ST F0
+#define OPT_MCU_STM32F1 301 ///< ST F1
+#define OPT_MCU_STM32F2 302 ///< ST F2
+#define OPT_MCU_STM32F3 303 ///< ST F3
+#define OPT_MCU_STM32F4 304 ///< ST F4
+#define OPT_MCU_STM32F7 305 ///< ST F7
+#define OPT_MCU_STM32H7 306 ///< ST H7
+#define OPT_MCU_STM32L1 308 ///< ST L1
+#define OPT_MCU_STM32L0 307 ///< ST L0
+#define OPT_MCU_STM32L4 309 ///< ST L4
+#define OPT_MCU_STM32G0 310 ///< ST G0
+#define OPT_MCU_STM32G4 311 ///< ST G4
// Sony
#define OPT_MCU_CXD56 400 ///< SONY CXD56