diff options
| author | hathach <[email protected]> | 2019-11-22 12:34:41 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2019-11-22 12:34:41 +0700 |
| commit | fca4653b95038d1ed1905d5a4731f758a1023eaa (patch) | |
| tree | fef68279c62cf41172cb29f5d3e8a45fdef4d99e /src | |
| parent | 2ead26a12d8ec1a3c229d2afdb3f36fdde444162 (diff) | |
able to compile dcd 18/43 with rt1064
Diffstat (limited to 'src')
| -rw-r--r-- | src/portable/nxp/lpc18_43/dcd_lpc18_43.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c index 6e3e993d2..4972446b6 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c @@ -38,11 +38,13 @@ #if CFG_TUSB_MCU == OPT_MCU_RT10XX #include "fsl_device_registers.h" - #define DCD_REGS_BASE { (dcd_registers_t*) USB1_BASE, (dcd_registers_t*) USB2_BASE } + #define DCD_REGS_BASE { (dcd_registers_t*) USB1_BASE, (dcd_registers_t*) USB2_BASE } + IRQn_Type DCD_IRQn[] = { USB_OTG1_IRQn, USB_OTG2_IRQn }; #else #include "chip.h" - #define DCD_REGS_BASE { (dcd_registers_t*) LPC_USB0_BASE, (dcd_registers_t*) LPC_USB1_BASE } + #define DCD_REGS_BASE { (dcd_registers_t*) LPC_USB0_BASE, (dcd_registers_t*) LPC_USB1_BASE } + IRQn_Type DCD_IRQn[] = { USB0_IRQn, USB1_IRQn }; #endif //--------------------------------------------------------------------+ @@ -270,12 +272,12 @@ void dcd_init(uint8_t rhport) void dcd_int_enable(uint8_t rhport) { - NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_EnableIRQ(DCD_IRQn[rhport]); } void dcd_int_disable(uint8_t rhport) { - NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_DisableIRQ(DCD_IRQn[rhport]); } void dcd_set_address(uint8_t rhport, uint8_t dev_addr) |