summaryrefslogtreecommitdiff
path: root/tests/test
diff options
context:
space:
mode:
authorhathach <[email protected]>2013-03-07 16:06:28 +0700
committerhathach <[email protected]>2013-03-07 16:06:28 +0700
commit66586ffb08d1ffab5324a9e03b0ea922905cd22b (patch)
tree5089b837de9e1a12ebe11297a6c6a91f4919df95 /tests/test
parentef08654e736f751bf07dd2f062c6916ffdbe1801 (diff)
re-layout ehci_data_t to get better memory consumption
Diffstat (limited to 'tests/test')
-rw-r--r--tests/test/host/ehci/test_ehci_pipe.c19
-rw-r--r--tests/test/host/ehci/test_ehci_pipe_xfer.c10
2 files changed, 24 insertions, 5 deletions
diff --git a/tests/test/host/ehci/test_ehci_pipe.c b/tests/test/host/ehci/test_ehci_pipe.c
index 7c15b5ca8..897d9f1a3 100644
--- a/tests/test/host/ehci/test_ehci_pipe.c
+++ b/tests/test/host/ehci/test_ehci_pipe.c
@@ -305,3 +305,22 @@ void test_open_interrupt_qhd_non_hs(void)
TEST_ASSERT_EQUAL(0x1c, p_qhd->non_hs_interrupt_cmask);
}
+
+//--------------------------------------------------------------------+
+// TODO ISOCRHONOUS PIPE
+//--------------------------------------------------------------------+
+tusb_descriptor_endpoint_t const desc_ept_iso_in =
+{
+ .bLength = sizeof(tusb_descriptor_endpoint_t),
+ .bDescriptorType = TUSB_DESC_ENDPOINT,
+ .bEndpointAddress = 0x83,
+ .bmAttributes = { .xfer = TUSB_XFER_BULK },
+ .wMaxPacketSize = 1024,
+ .bInterval = 1
+};
+
+void test_open_isochronous(void)
+{
+ pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in);
+ TEST_ASSERT_EQUAL(0, pipe_hdl.dev_addr);
+}
diff --git a/tests/test/host/ehci/test_ehci_pipe_xfer.c b/tests/test/host/ehci/test_ehci_pipe_xfer.c
index 7abf8b3f0..06098620d 100644
--- a/tests/test/host/ehci/test_ehci_pipe_xfer.c
+++ b/tests/test/host/ehci/test_ehci_pipe_xfer.c
@@ -151,9 +151,9 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
//------------- Code Under TEST -------------//
hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
- p_setup = &ehci_data.addr0.qtd[0];
- p_data = &ehci_data.addr0.qtd[1];
- p_status = &ehci_data.addr0.qtd[2];
+ p_setup = &ehci_data.addr0_qtd[0];
+ p_data = &ehci_data.addr0_qtd[1];
+ p_status = &ehci_data.addr0_qtd[2];
TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
@@ -161,7 +161,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
TEST_ASSERT_TRUE( p_status->next.terminate );
- verify_qtd(p_setup, &ehci_data.addr0.request, 8);
+ verify_qtd(p_setup, &ehci_data.control_request[0], 8);
}
@@ -180,7 +180,7 @@ void test_control_xfer_get(void)
TEST_ASSERT_TRUE( p_status->next.terminate );
//------------- SETUP -------------//
- uint8_t* p_request = (uint8_t *) &ehci_data.device[dev_addr].control.request;
+ uint8_t* p_request = (uint8_t *) &ehci_data.control_request[dev_addr];
verify_qtd(p_setup, p_request, 8);
TEST_ASSERT_EQUAL_MEMORY(&request_get_dev_desc, p_request, sizeof(tusb_std_request_t));