diff options
| author | hathach <[email protected]> | 2013-07-06 14:52:02 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2013-07-06 14:52:02 +0700 |
| commit | 25304d142fa04edb35be956e35163541b9f900e2 (patch) | |
| tree | 7f922cfd1d1570b9d9eb6de27f6ad36d5f785dfa /tests | |
| parent | 68da489c2e57f379f0ce19bcc001d3f96b4dd4f6 (diff) | |
refractor qhd_xfer_error_isr (omit xfer_type para)
add accumulated total xferred byte for an endpoint until transfer with IOC set
- control xfer will have length of data phase in usbh_xfer_isr callback
Diffstat (limited to 'tests')
3 files changed, 16 insertions, 3 deletions
diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c index 6a30e64f8..babee4482 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c @@ -209,11 +209,12 @@ void test_bulk_xfer_complete_isr(void) ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail; - usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)); + usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)+sizeof(xfer_data)); //------------- Code Under Test -------------// ehci_controller_run(hostid); + TEST_ASSERT_EQUAL(0, p_qhd_bulk->total_xferred_bytes); TEST_ASSERT_TRUE(p_qhd_bulk->qtd_overlay.next.terminate); TEST_ASSERT_FALSE(p_head->used); TEST_ASSERT_FALSE(p_tail->used); diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c index 85b51af6c..17a08f2b8 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c @@ -155,6 +155,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void) p_data = &ehci_data.addr0_qtd[1]; p_status = &ehci_data.addr0_qtd[2]; + TEST_ASSERT_EQUAL(0 , p_qhd->total_xferred_bytes); TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address ); TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head); TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address); @@ -227,11 +228,12 @@ void test_control_xfer_complete_isr(void) { TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) ); - usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE, 0); + usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE, 18); //------------- Code Under TEST -------------// ehci_controller_run(hostid); + TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes); TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_head); TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_tail); @@ -249,6 +251,8 @@ void test_control_xfer_error_isr(void) //------------- Code Under TEST -------------// ehci_controller_run_error(hostid); + + TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes); } void test_control_xfer_error_stall(void) @@ -259,4 +263,6 @@ void test_control_xfer_error_stall(void) //------------- Code Under TEST -------------// ehci_controller_run_stall(hostid); + + TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes); } diff --git a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c index 8222a3d86..21d7b3f7b 100644 --- a/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c +++ b/tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c @@ -201,7 +201,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void) TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) ); - usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)); + usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE, sizeof(xfer_data)+sizeof(data2)); ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail; @@ -209,6 +209,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void) //------------- Code Under Test -------------// ehci_controller_run(hostid); + TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes); check_qhd_after_complete(p_qhd_interrupt); TEST_ASSERT_FALSE(p_head->used); TEST_ASSERT_FALSE(p_tail->used); @@ -230,6 +231,7 @@ void test_interrupt_xfer_complete_isr_interval_2ms(void) //------------- Code Under Test -------------// ehci_controller_run(hostid); + TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes); check_qhd_after_complete(p_qhd_2ms); TEST_ASSERT_FALSE(p_head->used); TEST_ASSERT_FALSE(p_tail->used); @@ -244,6 +246,8 @@ void test_interrupt_xfer_error_isr(void) //------------- Code Under TEST -------------// ehci_controller_run_error(hostid); + + TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes); } void test_interrupt_xfer_error_stall(void) @@ -254,5 +258,7 @@ void test_interrupt_xfer_error_stall(void) //------------- Code Under TEST -------------// ehci_controller_run_stall(hostid); + + TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes); } |
