diff options
| author | hathach <[email protected]> | 2013-01-17 14:40:46 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2013-01-17 14:40:46 +0700 |
| commit | c16632da0bf8d042388018c667cfbc176ed56436 (patch) | |
| tree | ceb00f2f4207ba42928430239a61ce607b5bcc02 /tinyusb/hal/hal_lpc43xx.c | |
| parent | 480ddb4fecb96c79cc046f3e4d03ec73a04abca0 (diff) | |
add UART support for ea4357 (tested)
Diffstat (limited to 'tinyusb/hal/hal_lpc43xx.c')
| -rw-r--r-- | tinyusb/hal/hal_lpc43xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tinyusb/hal/hal_lpc43xx.c b/tinyusb/hal/hal_lpc43xx.c index 2fcd885f5..2b60d29c3 100644 --- a/tinyusb/hal/hal_lpc43xx.c +++ b/tinyusb/hal/hal_lpc43xx.c @@ -43,7 +43,7 @@ TUSB_Error_t hal_init() { /* Set up USB0 clock */ CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE); /* Disable PLL first */ - ASSERT_MESSAGE( CGU_SetPLL0() == CGU_ERROR_SUCCESS, tERROR_FAILED, "set PLL failed"); /* the usb core require output clock = 480MHz */ + ASSERT_INT( CGU_ERROR_SUCCESS, CGU_SetPLL0(), tERROR_FAILED); /* the usb core require output clock = 480MHz */ CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0); CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE); /* Enable PLL after all setting is done */ LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */ |