diff options
| author | hathach <[email protected]> | 2013-04-10 01:13:31 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2013-04-10 01:18:32 +0700 |
| commit | e14aa4197d290fc7f294d42d4886fb5892c9f360 (patch) | |
| tree | 20743d8b56c7cb9b9f66b83987235fe45e17772f /tinyusb/hal | |
| parent | e6a44b3fe9a0af6ce33f8340c8703bf0bbc43d5a (diff) | |
change osal_queue_send(osal_queue_handle_t const queue_hdl, uint32_t data) signature to osal_queue_send(osal_queue_handle_t const queue_hdl, const void * data)
- support any size queue message (instead of fixed uint32_t)
Diffstat (limited to 'tinyusb/hal')
| -rw-r--r-- | tinyusb/hal/hal_lpc43xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tinyusb/hal/hal_lpc43xx.c b/tinyusb/hal/hal_lpc43xx.c index 5a86c23dd..ff55f76d0 100644 --- a/tinyusb/hal/hal_lpc43xx.c +++ b/tinyusb/hal/hal_lpc43xx.c @@ -78,7 +78,7 @@ tusb_error_t hal_init(void) #if TUSB_CFG_CONTROLLER1_MODE /* connect CLK_USB1 to 60 MHz clock */ CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */ - LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */ + //LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */ LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY #if TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST |