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authorhathach <[email protected]>2013-04-08 03:45:31 +0700
committerhathach <[email protected]>2013-04-08 03:45:31 +0700
commitef850984dae94b424959ebba5563aedeeeb3f52b (patch)
tree7033a2016df5b9bdc234f16d3ed1feba9b689740 /tinyusb/host
parent95df92055c355b8184675663a2d4c66ad6c21d51 (diff)
move MCU define to tusb_option.h, fix the ATTR with USB RAM
hack: add delay before the very first xfer when enumerating (finalize later after reading USB 2.0 specs)
Diffstat (limited to 'tinyusb/host')
-rw-r--r--tinyusb/host/usbh.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/tinyusb/host/usbh.c b/tinyusb/host/usbh.c
index 8c3b20703..0902c8ed9 100644
--- a/tinyusb/host/usbh.c
+++ b/tinyusb/host/usbh.c
@@ -273,6 +273,13 @@ OSAL_TASK_DECLARE(usbh_enumeration_task)
TASK_ASSERT_STATUS( usbh_pipe_control_open(0, 8) );
usbh_devices[0].state = TUSB_DEVICE_STATE_ADDRESSED;
+#ifndef _TEST_
+ // TODO finalize delay after reset, hack delay 100 ms, otherwise speed is detected as LOW in most cases
+ volatile uint32_t delay_us = 10000;
+ delay_us *= (SystemCoreClock / 1000000) / 3;
+ while(delay_us--);
+#endif
+
//------------- Get first 8 bytes of device descriptor to get Control Endpoint Size -------------//
OSAL_SUBTASK_INVOKED_AND_WAIT(
usbh_control_xfer_subtask(