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authorhathach <[email protected]>2018-03-14 22:01:16 +0700
committerhathach <[email protected]>2018-03-14 22:01:16 +0700
commit4a521711b96d3ea4a9946a128c065de72e832af6 (patch)
tree3a6fc96e192b9452fded43b1f6a24f0fa95128b0 /tinyusb
parent7707fe194fbd81d8970933b1ae8d7f0a2951c41b (diff)
add usbd_control_xfer_substak
seperate control xfer Data and Status phase
Diffstat (limited to 'tinyusb')
-rw-r--r--tinyusb/common/verify.h4
-rw-r--r--tinyusb/device/usbd.c53
-rw-r--r--tinyusb/tusb_dcd.h2
3 files changed, 51 insertions, 8 deletions
diff --git a/tinyusb/common/verify.h b/tinyusb/common/verify.h
index f43e0f0a4..69c2a8053 100644
--- a/tinyusb/common/verify.h
+++ b/tinyusb/common/verify.h
@@ -106,13 +106,13 @@
#define VERIFY_STS_HDLR_2ARGS(sts, _handler) \
do { \
uint32_t _status = (uint32_t)(sts); \
- if ( 0 != _status ) { _VERIFY_MESS(_status) _handler; return _status; }\
+ if ( 0 != _status ) { tusb_hal_dbg_breakpoint(); _VERIFY_MESS(_status) _handler; return _status; }\
} while(0)
#define VERIFY_STS_HDLR_3ARGS(sts, _handler, _error) \
do { \
uint32_t _status = (uint32_t)(sts); \
- if ( 0 != _status ) { _VERIFY_MESS(_status) _handler; return _error; }\
+ if ( 0 != _status ) { tusb_hal_dbg_breakpoint(); _VERIFY_MESS(_status) _handler; return _error; }\
} while(0)
#define VERIFY_STATUS_HDLR(...) GET_4TH_ARG(__VA_ARGS__, VERIFY_STS_HDLR_3ARGS, VERIFY_STS_HDLR_2ARGS)(__VA_ARGS__)
diff --git a/tinyusb/device/usbd.c b/tinyusb/device/usbd.c
index f2763209a..ed72a2000 100644
--- a/tinyusb/device/usbd.c
+++ b/tinyusb/device/usbd.c
@@ -99,6 +99,16 @@ static usbd_class_driver_t const usbd_class_drivers[] =
enum { USBD_CLASS_DRIVER_COUNT = sizeof(usbd_class_drivers) / sizeof(usbd_class_driver_t) };
+
+
+//tusb_descriptor_device_qualifier_t _device_qual =
+//{
+// .bLength = sizeof(tusb_descriptor_device_qualifier_t),
+// .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER,
+// .bcdUSB = 0x0200,
+// .bDeviceClass =
+//};
+
//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
@@ -244,7 +254,7 @@ static tusb_error_t usbd_body_subtask(void)
if ( USBD_EVENTID_SETUP_RECEIVED == event.event_id )
{
- OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_control_request_subtask(event.port, &event.setup_received), error );
+ OSAL_SUBTASK_INVOKED( usbd_control_request_subtask(event.port, &event.setup_received), error );
}else if (USBD_EVENTID_XFER_DONE == event.event_id)
{
// Call class handling function, Class that endpoint not belong to should check and return
@@ -276,6 +286,29 @@ static tusb_error_t usbd_body_subtask(void)
//--------------------------------------------------------------------+
// CONTROL REQUEST
//--------------------------------------------------------------------+
+tusb_error_t usbd_control_xfer_substak(uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length)
+{
+ OSAL_SUBTASK_BEGIN
+
+ tusb_error_t error;
+
+ // Data
+ if ( length )
+ {
+ tusb_dcd_control_xfer(port, dir, buffer, length, true);
+ osal_semaphore_wait( usbd_control_xfer_sem_hdl, 100, &error );
+
+ SUBTASK_ASSERT_STATUS( error );
+ }
+
+ // Status opposite direction with Zero Length
+ tusb_dcd_control_xfer(port, (tusb_dir_t) (1-dir), NULL, 0, true);
+
+ // no need to blocking wait for status to complete
+
+ OSAL_SUBTASK_END
+}
+
tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t const * const p_request)
{
OSAL_SUBTASK_BEGIN
@@ -296,13 +329,17 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
if ( TUSB_ERROR_NONE == error )
{
- tusb_dcd_control_xfer(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
+// tusb_dcd_control_xfer(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
+ OSAL_SUBTASK_INVOKED ( usbd_control_xfer_substak(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length ), error );;
}
}
else if ( TUSB_REQUEST_SET_ADDRESS == p_request->bRequest )
{
tusb_dcd_set_address(port, (uint8_t) p_request->wValue);
usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED;
+
+ // TODO hack nrf52 auto handle set address
+ SUBTASK_RETURN(TUSB_ERROR_NONE);
}
else if ( TUSB_REQUEST_SET_CONFIGURATION == p_request->bRequest )
{
@@ -323,7 +360,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
if ( (class_code > 0) && (class_code < USBD_CLASS_DRIVER_COUNT) &&
usbd_class_drivers[class_code].control_request_subtask )
{
- OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_class_drivers[class_code].control_request_subtask(port, p_request), error );
+ OSAL_SUBTASK_INVOKED( usbd_class_drivers[class_code].control_request_subtask(port, p_request), error );
}else
{
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@@ -344,10 +381,10 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
if(TUSB_ERROR_NONE != error)
{ // Response with Protocol Stall if request is not supported
tusb_dcd_control_stall(port);
- // ASSERT(error == TUSB_ERROR_NONE, VOID_RETURN);
}else if (p_request->wLength == 0)
{
- tusb_dcd_control_xfer(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, NULL, 0, false); // zero length for non-data
+ // zero length for non-data
+ tusb_dcd_control_xfer(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, NULL, 0, false);
}
OSAL_SUBTASK_END
@@ -427,6 +464,12 @@ static tusb_error_t get_descriptor(uint8_t port, tusb_control_request_t const *
(*p_length) = p_data[0]; // first byte of descriptor is its size
break;
+ case TUSB_DESC_DEVICE_QUALIFIER:
+ // TODO If not highspeed capable stall this request otherwise
+ // return the descriptor that could work in highspeed
+ return TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
+ break;
+
// TODO Report Descriptor (HID Generic)
// TODO HID Descriptor
diff --git a/tinyusb/tusb_dcd.h b/tinyusb/tusb_dcd.h
index 084ab04b5..635522b95 100644
--- a/tinyusb/tusb_dcd.h
+++ b/tinyusb/tusb_dcd.h
@@ -80,7 +80,7 @@ void tusb_dcd_xfer_complete (uint8_t port, uint8_t edpt_addr, uint32_t xferre
*------------------------------------------------------------------*/
//------------- Control Endpoint -------------//
-bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
+bool tusb_dcd_control_xfer (uint8_t port, tusb_dir_t dir, uint8_t * buffer, uint16_t length, bool int_on_complete);
void tusb_dcd_control_stall (uint8_t port);
//------------- Other Endpoints -------------//