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authorzhiqiang <[email protected]>2025-07-07 14:13:15 +0800
committerzhiqiang <[email protected]>2025-07-07 14:13:15 +0800
commit73bf9aeaa6e1ffd453b7bffa4dd3818773e6a763 (patch)
tree2ced76d8c5d9b0475c0bc7323127ed20883202cc /tools
parentb012e95dfe40c6cd73cde7a6917848c4131dc548 (diff)
support at32 mcu
Diffstat (limited to 'tools')
-rwxr-xr-xtools/get_deps.py21
1 files changed, 21 insertions, 0 deletions
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 6a36ef35d..9a5fa37d9 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -208,6 +208,27 @@ deps_optional = {
'hw/mcu/wch/ch32f20x': ['https://github.com/openwch/ch32f20x.git',
'77c4095087e5ed2c548ec9058e655d0b8757663b',
'ch32f20x'],
+ 'hw/mcu/artery/at32f403a_407': ['https://github.com/ArteryTek/AT32F403A_407_Firmware_Library.git',
+ 'f2cb360c3d28fada76b374308b8c4c61d37a090b',
+ 'at32f403a_407'],
+ 'hw/mcu/artery/at32f415': ['https://github.com/ArteryTek/AT32F415_Firmware_Library.git',
+ '716f545aa1290ff144ccf023a8e797b951e1bc8e',
+ 'at32f415'],
+ 'hw/mcu/artery/at32f435_437': ['https://github.com/ArteryTek/AT32F435_437_Firmware_Library.git',
+ '25439cc6650a8ae0345934e8707a5f38c7ae41f8',
+ 'at32f435_437'],
+ 'hw/mcu/artery/at32f423': ['https://github.com/ArteryTek/AT32F423_Firmware_Library.git',
+ '2afa7f12852e57a9e8aab3a892c641e1a8635a18',
+ 'at32f423'],
+ 'hw/mcu/artery/at32f402_405': ['https://github.com/ArteryTek/AT32F402_405_Firmware_Library.git',
+ '4424515c2663e82438654e0947695295df2abdfe',
+ 'at32f402_405'],
+ 'hw/mcu/artery/at32f425': ['https://github.com/ArteryTek/AT32F425_Firmware_Library.git',
+ '620233e1357d5c1b7e2bde6b9dd5196822b91817',
+ 'at32f425'],
+ 'hw/mcu/artery/at32f413': ['https://github.com/ArteryTek/AT32F413_Firmware_Library.git',
+ 'f6fe62dfec9fd40c5b63d92fc5ef2c2b5e77a450',
+ 'at32f413'],
'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
'2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '